Fix LDR and LDL instructions
PATCH 1/1 Fix LDR and LDL instructions
Hi,
The trivial patch below fixes the LDR and LDL instructions. Before modifying a register, it is better to load it :)
With this patch I am able to boot a 64-bit MIPS kernel on the emulated Malta board up to the start of INIT. Then I get:
Freeing unused kernel memory: 168k freed
modprobe: FATAL: Could not load /lib/modules/2.6.21.1/modules.dep: No such file or directory
INIT: version 2.86 booting
schedule_timeout: wrong timeout value 7ffffffffffffffe
Call Trace: [<ffffffff80107700>] dump_stack+0x8/0x38 [<ffffffff803f9ce4>] schedule_timeout+0xdc/0x108 [<ffffffff80194828>] do_select+0x428/0x548 [<ffffffff801bbbfc>] compat_core_sys_select+0x1a4/0x230 [<ffffffff801bdb64>] compat_sys_select+0x104/0x1f0 [<ffffffff80115108>] handle_sys+0x108/0x124
This call trace is then printed in loop.
Note that the kernel part of the 64-bit boot log is now the same as the 32-bit one, except for the addresses. The 64-bit specific error messages (for example the USB ones) are fixed with this patch.
Bye,
Aurelien
Index: target-mips/translate.c
===================================================================
RCS file: /sources/qemu/qemu/target-mips/translate.c,v retrieving revision 1.80
translate.c +2 -0
@@ -761,6 +761,7 @@ static void gen_ldst (DisasContext *ctx, opn ="scd" ;break ;case OPC_LDL : +GEN_LOAD_REG_TN (T1 , rt);op_ldst (ldl);GEN_STORE_TN_REG (rt,T0 ); opn ="ldl" ;
@@ -771,6 +772,7 @@ static void gen_ldst (DisasContext *ctx, opn ="sdl" ;break ;case OPC_LDR : +GEN_LOAD_REG_TN (T1 , rt);op_ldst (ldr);GEN_STORE_TN_REG (rt,T0 ); opn ="ldr" ;
Signature · 4 lines
.''`. Aurelien Jarno | GPG: 1024D/F1BCDB73 : :' : Debian developer | Electrical Engineer `. `' [email protected] | [email protected] `- people.debian.org/~aurel32 | www.aurel32.net