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PowerPC 440EPx: Sequoia board support

PATCH In review Valentine Barshak 7 participants 15 messages Jul 30, 2007 – Oct 5, 2007

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#0 lore raw

PATCH 5/6 PowerPC 440EPx: Sequoia board support

AMCC 440EPx Sequoia board support.

---
 arch/powerpc/kernel/cputable.c       |   36 +++++++++++++++++++
 arch/powerpc/kernel/head_44x.S       |    2 -
 arch/powerpc/platforms/44x/Kconfig   |   17 ++++++++-
 arch/powerpc/platforms/44x/Makefile  |    1 
 arch/powerpc/platforms/44x/sequoia.c |   66 +++++++++++++++++++++++++++++++++++
 5 files changed, 120 insertions(+), 2 deletions(-)
arch/powerpc/kernel/cputable.c +36 -0
diff -ruN linux.orig/arch/powerpc/kernel/cputable.c linux/arch/powerpc/kernel/cputable.c
@@ -1132,6 +1132,42 @@
 		.dcache_bsize		= 32,
 		.platform		= "ppc440",
 	},
+	{ /* 440EPX  - with Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008D0,
+		.cpu_name		= "440EPX - with Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, /* 440EPX has an FPU */
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},
+	{ /* 440EPX  - without Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008D4,
+		.cpu_name		= "440EPX - no Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, /* 440EPX has an FPU */
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},
+	{ /* 440GRX  - with Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008D8,
+		.cpu_name		= "440GRX - with Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE, /* 440GRX has no FPU */
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},
+	{ /* 440GRX  - without Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008DC,
+		.cpu_name		= "440GRX - no Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE, /* 440GRX has no FPU */
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},
 	{	/* 440GP Rev. B */
 		.pvr_mask		= 0xf0000fff,
 		.pvr_value		= 0x40000440,
arch/powerpc/kernel/head_44x.S +1 -1
diff -ruN linux.orig/arch/powerpc/kernel/head_44x.S linux/arch/powerpc/kernel/head_44x.S
@@ -217,7 +217,7 @@
 	lis	r4,interrupt_base@h	/* IVPR only uses the high 16-bits */
 	mtspr	SPRN_IVPR,r4
 
-#ifdef CONFIG_440EP
+#if defined(CONFIG_440EP) || defined(CONFIG_440EPX)
 	/* Clear DAPUIB flag in CCR0 (enable APU between CPU and FPU) */
 	mfspr	r2,SPRN_CCR0
 	lis	r3,0xffef
arch/powerpc/platforms/44x/Kconfig +16 -1
diff -ruN linux.orig/arch/powerpc/platforms/44x/Kconfig linux/arch/powerpc/platforms/44x/Kconfig
@@ -14,6 +14,14 @@
 	help
 	  This option enables support for the IBM PPC440GP evaluation board.
 
+config SEQUOIA
+	bool "Sequoia"
+	depends on 44x
+	default n
+	select 440EPX
+	help
+	  This option enables support for the AMCC PPC440EPX evaluation board.
+
 #config LUAN
 #	bool "Luan"
 #	depends on 44x
@@ -36,6 +44,13 @@
 	select PPC_FPU
 	select IBM440EP_ERR42
 
+config 440EPX
+	bool
+	select PPC_FPU
+# Disabled until the new EMAC Driver is merged.
+#	select IBM_NEW_EMAC_EMAC4
+#	select IBM_NEW_EMAC_ZMII
+
 config 440GP
 	bool
 # Disabled until the new EMAC Driver is merged.
@@ -49,7 +64,7 @@
 
 config 440A
 	bool
-	depends on 440GX
+	depends on 440GX || 440EPX
 	default y
 
 # 44x errata/workaround config symbols, selected by the CPU models above
arch/powerpc/platforms/44x/Makefile +1 -0
diff -ruN linux.orig/arch/powerpc/platforms/44x/Makefile linux/arch/powerpc/platforms/44x/Makefile
@@ -1,2 +1,3 @@
 obj-$(CONFIG_44x)	:= misc_44x.o
 obj-$(CONFIG_EBONY)	+= ebony.o
+obj-$(CONFIG_SEQUOIA)	+= sequoia.o
arch/powerpc/platforms/44x/sequoia.c +66 -0

66 lines not on this page · raw message

#1 lore raw
Quoted 26 lines · Valentine Barshak

AMCC 440EPx Sequoia board support.

---
 arch/powerpc/kernel/cputable.c       |   36 +++++++++++++++++++
 arch/powerpc/kernel/head_44x.S       |    2 -
 arch/powerpc/platforms/44x/Kconfig   |   17 ++++++++-
 arch/powerpc/platforms/44x/Makefile  |    1 
 arch/powerpc/platforms/44x/sequoia.c |   66 +++++++++++++++++++++++++++++++++++
 5 files changed, 120 insertions(+), 2 deletions(-)

diff -ruN linux.orig/arch/powerpc/kernel/cputable.c linux/arch/powerpc/kernel/cputable.c

arch/powerpc/kernel/cputable.c +8 -0
@@ -1132,6 +1132,42 @@
 		.dcache_bsize		= 32,
 		.platform		= "ppc440",
 	},
+	{ /* 440EPX  - with Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008D0,
+		.cpu_name		= "440EPX - with Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, /* 440EPX has an FPU */
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,

arch/powerpc/kernel/cputable.c line 1152

Quoted 10 lines
arch/powerpc/kernel/cputable.c +10 -0
+	},
+	{ /* 440EPX  - without Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008D4,
+		.cpu_name		= "440EPX - no Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, /* 440EPX has an FPU */
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},

Since the with/without Security/Kasumi versions have no differences in their cputable entry other than the PVR, couldn't you just remove the relevant PVR bit from the mask and use a single entry?

Signature · 4 lines
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson
#2 lore raw
Quoted 6 lines
Quoted 6 lines
arch/powerpc/kernel/cputable.c +6 -0
+	{ /* 440EPX  - without Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008D4,
+		.cpu_name		= "440EPX - no Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, /* 
Quoted 8 lines

arch/powerpc/kernel/cputable.c line 1143

Quoted 4 lines

440EPX has an FPU */

arch/powerpc/kernel/cputable.c +3 -0
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},

Since the with/without Security/Kasumi versions have no differences in their cputable entry other than the PVR, couldn't you just remove the relevant PVR bit from the mask and use a single entry?

And get rid of the stupid "has an FPU" comment at the same time please :-)

Segher

#3 lore raw
Quoted 15 lines · Segher Boessenkool
Quoted 6 lines
Quoted 6 lines
arch/powerpc/kernel/cputable.c +6 -0
+	{ /* 440EPX  - without Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008D4,
+		.cpu_name		= "440EPX - no Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, /* 
Quoted 8 lines

arch/powerpc/kernel/cputable.c line 1143

Quoted 4 lines

440EPX has an FPU */

arch/powerpc/kernel/cputable.c +3 -0
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},

Since the with/without Security/Kasumi versions have no differences in their cputable entry other than the PVR, couldn't you just remove the relevant PVR bit from the mask and use a single entry?

Quoted 2 lines

And get rid of the stupid "has an FPU" comment at the same time please :-)

Actually that comment may be worthwhile if expanded a little. I think the point is that 440EPx *unlike most other 4xx chips* has an FPU. So the point of the comment is not explaining the feature bit, which is obvious, but as a "no, really, it does".

Signature · 4 lines
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson
#4 lore raw
Quoted 16 lines · On Wed, 1 Aug 2007 15:05:42 +1000 David Gibson <[email protected]>…
Quoted 15 lines · Segher Boessenkool
Quoted 14 lines

arch/powerpc/kernel/cputable.c line 1143

Quoted 10 lines
arch/powerpc/kernel/cputable.c +6 -0
+	{ /* 440EPX  - without Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008D4,
+		.cpu_name		= "440EPX - no Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, /* 

440EPX has an FPU */

arch/powerpc/kernel/cputable.c +3 -0
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},

Since the with/without Security/Kasumi versions have no differences in their cputable entry other than the PVR, couldn't you just remove the relevant PVR bit from the mask and use a single entry?

Quoted 7 lines
Quoted 2 lines

And get rid of the stupid "has an FPU" comment at the same time please :-)

Actually that comment may be worthwhile if expanded a little. I think the point is that 440EPx *unlike most other 4xx chips* has an FPU. So the point of the comment is not explaining the feature bit, which is obvious, but as a "no, really, it does".

Right. 440EP(x) are the only currently available 44x chips that contain an FPU, so I also think the comment can stay.

josh

#5 lore raw
Quoted 23 lines · Josh Boyer
Quoted 20 lines · On Wed, 1 Aug 2007 15:05:42 +1000 David Gibson <[email protected]>…
Quoted 18 lines · Segher Boessenkool
Quoted 7 lines
Quoted 7 lines
arch/powerpc/kernel/cputable.c +6 -0
+	{ /* 440EPX  - without Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008D4,
+		.cpu_name		= "440EPX - no Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE |  

PPC_FEATURE_HAS_FPU, /*

Quoted 8 lines

arch/powerpc/kernel/cputable.c line 1143

Quoted 4 lines

440EPX has an FPU */

arch/powerpc/kernel/cputable.c +3 -0
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},

Since the with/without Security/Kasumi versions have no differences in their cputable entry other than the PVR, couldn't you just remove the relevant PVR bit from the mask and use a single entry?

And get rid of the stupid "has an FPU" comment at the same time please :-)

Quoted 7 lines
Quoted 4 lines

Actually that comment may be worthwhile if expanded a little. I think the point is that 440EPx *unlike most other 4xx chips* has an FPU. So the point of the comment is not explaining the feature bit, which is obvious, but as a "no, really, it does".

Right. 440EP(x) are the only currently available 44x chips that contain an FPU, so I also think the comment can stay.

I agree w/Segher the comment is redundant. Just make a note of the fact that we really have FPU in the commit message.

- k

#6 lore raw
Quoted 35 lines · On Fri, 3 Aug 2007 03:39:23 -0500 Kumar Gala <[email protected]> wrote:
Quoted 32 lines · Josh Boyer
Quoted 28 lines · On Wed, 1 Aug 2007 15:05:42 +1000 David Gibson <[email protected]>…
Quoted 18 lines · Segher Boessenkool
Quoted 9 lines
Quoted 9 lines
arch/powerpc/kernel/cputable.c +6 -0
+	{ /* 440EPX  - without Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008D4,
+		.cpu_name		= "440EPX - no Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE |  

PPC_FEATURE_HAS_FPU, /*
440EPX has an FPU */

(quoted diff) +1 -0
+		.icache_bsize		= 32,
Quoted 8 lines

Review

Quoted 2 lines
(quoted diff) +2 -0
+		.dcache_bsize		= 32,
+	},

Since the with/without Security/Kasumi versions have no differences in
their cputable entry other than the PVR, couldn't you just remove the
relevant PVR bit from the mask and use a single entry?

Quoted 2 lines

And get rid of the stupid "has an FPU" comment at the same time please :-)

Actually that comment may be worthwhile if expanded a little. I think
the point is that 440EPx *unlike most other 4xx chips* has an FPU. So
the point of the comment is not explaining the feature bit, which is obvious, but as a "no, really, it does".

Quoted 5 lines
Quoted 2 lines

Right. 440EP(x) are the only currently available 44x chips that contain an FPU, so I also think the comment can stay.

I agree w/Segher the comment is redundant. Just make a note of the fact that we really have FPU in the commit message.

Fine. I don't really care either way because in the grand scheme of things, it has no significant impact either way. It's just a comment.

josh

#7 lore raw
In reply to Valentine Barshak
Quoted 33 lines · On Mon, 30 Jul 2007 19:16:28 +0400 Valentine Barshak <[email protected]>…

diff -ruN linux.orig/arch/powerpc/kernel/cputable.c linux/arch/powerpc/kernel/cputable.c

arch/powerpc/kernel/cputable.c +26 -0
@@ -1132,6 +1132,42 @@
 		.dcache_bsize		= 32,
 		.platform		= "ppc440",
 	},
+	{ /* 440EPX  - with Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008D0,
+		.cpu_name		= "440EPX - with Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, /* 440EPX has an FPU */
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},
+	{ /* 440EPX  - without Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008D4,
+		.cpu_name		= "440EPX - no Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, /* 440EPX has an FPU */
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},
+	{ /* 440GRX  - with Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008D8,
+		.cpu_name		= "440GRX - with Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE, /* 440GRX has no FPU */
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,

arch/powerpc/kernel/cputable.c line 1170

Quoted 10 lines
arch/powerpc/kernel/cputable.c +10 -0
+	},
+	{ /* 440GRX  - without Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008DC,
+		.cpu_name		= "440GRX - no Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE, /* 440GRX has no FPU */
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},

Should the 440GRX PVR additions be done in a separate patch? Or is the PVR and cpu features truly the only difference between 440EPx and 440GRx?

arch/powerpc/platforms/44x/sequoia.c line 9

Quoted 13 lines

diff -ruN linux.orig/arch/powerpc/platforms/44x/sequoia.c linux/arch/powerpc/platforms/44x/sequoia.c

arch/powerpc/platforms/44x/sequoia.c +9 -0
@@ -0,0 +1,66 @@
+/*
+ * Sequoia board specific routines
+ *
+ * Wade Farnsworth <[email protected]>
+ * Copyright 2004-2007 MontaVista Software Inc.
+ *
+ * Rewritten and ported to the merged powerpc tree:
+ * Josh Boyer <[email protected]>
+ * Copyright 2007 IBM Corporation

I didn't really do this. Might want to give yourself credit instead :).

josh

#8 lore raw
Quoted 38 lines · Josh Boyer

On Mon, 30 Jul 2007 19:16:28 +0400

Quoted 37 lines

+0400 +++ linux/arch/powerpc/kernel/cputable.c 2007-07-27
20:44:26.000000000 +0400 @@ -1132,6 +1132,42 @@

arch/powerpc/kernel/cputable.c +6 -0
 		.dcache_bsize		= 32,
 		.platform		= "ppc440",
 	},
+	{ /* 440EPX  - with Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008D0,
+		.cpu_name		= "440EPX - with Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, /*

440EPX has an FPU */ + .icache_bsize = 32,

arch/powerpc/kernel/cputable.c +8 -0
+		.dcache_bsize		= 32,
+	},
+	{ /* 440EPX  - without Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008D4,
+		.cpu_name		= "440EPX - no Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, /*

440EPX has an FPU */ + .icache_bsize = 32,

arch/powerpc/kernel/cputable.c +16 -0
+		.dcache_bsize		= 32,
+	},
+	{ /* 440GRX  - with Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008D8,
+		.cpu_name		= "440GRX - with Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE, /* 440GRX has no FPU */
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},
+	{ /* 440GRX  - without Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008DC,
+		.cpu_name		= "440GRX - no Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
Quoted 8 lines

arch/powerpc/kernel/cputable.c line 1161

Quoted 4 lines
arch/powerpc/kernel/cputable.c +4 -0
+		.cpu_user_features	= COMMON_USER_BOOKE, /* 440GRX has no FPU */
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},

Should the 440GRX PVR additions be done in a separate patch? Or is the PVR and cpu features truly the only difference between 440EPx and 440GRx?

I think it makes sense to add the 440GRx with this patchset too. The 440GRx is a subset of the 440EPx, missing some stuff like USB, FPU. And the AMCC Rainier 440GRx eval board is a subset of the Sequoia eval board. So no new board specific sources should be necessary to support the Rainier, just a different defconfig file.

Best regards,
Stefan

#9 lore raw
Quoted 47 lines · Stefan Roese
Quoted 37 lines · Josh Boyer

On Mon, 30 Jul 2007 19:16:28 +0400

Quoted 36 lines

+0400 +++ linux/arch/powerpc/kernel/cputable.c 2007-07-27
20:44:26.000000000 +0400 @@ -1132,6 +1132,42 @@

arch/powerpc/kernel/cputable.c +6 -0
 		.dcache_bsize		= 32,
 		.platform		= "ppc440",
 	},
+	{ /* 440EPX  - with Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008D0,
+		.cpu_name		= "440EPX - with Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, /*

440EPX has an FPU */ + .icache_bsize = 32,

arch/powerpc/kernel/cputable.c +8 -0
+		.dcache_bsize		= 32,
+	},
+	{ /* 440EPX  - without Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008D4,
+		.cpu_name		= "440EPX - no Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, /*

440EPX has an FPU */ + .icache_bsize = 32,

arch/powerpc/kernel/cputable.c +15 -0
+		.dcache_bsize		= 32,
+	},
+	{ /* 440GRX  - with Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008D8,
+		.cpu_name		= "440GRX - with Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE, /* 440GRX has no FPU */
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},
+	{ /* 440GRX  - without Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008DC,
+		.cpu_name		= "440GRX - no Security/Kasumi",
Quoted 8 lines

arch/powerpc/kernel/cputable.c line 1161

Quoted 5 lines
arch/powerpc/kernel/cputable.c +5 -0
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE, /* 440GRX has no FPU */
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},

Should the 440GRX PVR additions be done in a separate patch? Or is the PVR and cpu features truly the only difference between 440EPx and 440GRx?

Quoted 4 lines

I think it makes sense to add the 440GRx with this patchset too. The 440GRx is a subset of the 440EPx, missing some stuff like USB, FPU. And the AMCC Rainier 440GRx eval board is a subset of the Sequoia eval board. So no new board specific sources should be necessary to support the Rainier, just a different defconfig file.

Best regards,
Stefan

I have a Rainier 440GRx board and the PVR is equal to the 440EPx one (0x200008D0). This has to be handled somehow, since the PPC_FEATURE_HAS_FPU flag should *not* be set for 440GRx. I'm really not sure how though. Any ideas are greatly appreciated :)
Is it a h/w bug?
Thanks,
Valentine.

#10 lore raw
Quoted 10 lines · Valentine Barshak
Quoted 10 lines
Quoted 3 lines

Should the 440GRX PVR additions be done in a separate patch? Or is the PVR and cpu features truly the only difference between 440EPx and 440GRx?

I think it makes sense to add the 440GRx with this patchset too. The 440GRx is a subset of the 440EPx, missing some stuff like USB, FPU. And the AMCC Rainier 440GRx eval board is a subset of the Sequoia eval board. So no new board specific sources should be necessary to support the Rainier, just a different defconfig file.

Quoted 8 lines
Quoted 2 lines

Best regards,
Stefan

I have a Rainier 440GRx board and the PVR is equal to the 440EPx one (0x200008D0). This has to be handled somehow, since the PPC_FEATURE_HAS_FPU flag should *not* be set for 440GRx. I'm really not sure how though. Any ideas are greatly appreciated :) Is it a h/w bug?

Depends on interpretation. IIRC currently the same die is used for 440EPx and 440GRx. I could be wrong here though and it is just a bug in the chip. But anyway we should support this somehow. Could be that I missed this in the current 440GRx (Rainier) arch/ppc support too. I have to admit, that no clever solution comes to my mind right away though.

Best regards,
Stefan

#11 lore raw
Quoted 6 lines

Depends on interpretation. IIRC currently the same die is used for 440EPx and 440GRx. I could be wrong here though and it is just a bug in the chip. But anyway we should support this somehow. Could be that I missed this in the current 440GRx (Rainier) arch/ppc support too. I have to admit, that no clever solution comes to my mind right away though.

We can always come up with some kind of runtime detection, by turning on MSR:FP, issuing an fp instruction and catching the illegal instruction fault if any :-)

Ben.

#12 lore raw
Quoted 9 lines · Benjamin Herrenschmidt
Quoted 1 line

Depends on interpretation. IIRC currently the same die is used for 440EPx and 440GRx. I could be wrong here though and it is just a bug in the chip. But anyway we should support this somehow. Could be that I missed this in the current 440GRx (Rainier) arch/ppc support too. I have to admit, that no clever solution comes to my mind right away though.

We can always come up with some kind of runtime detection, by turning on MSR:FP, issuing an fp instruction and catching the illegal instruction fault if any :-)

Ben.

Is it OK to workaround the GRX/EPX having the same PVR issue using device tree?
Say, check the PVR value and if we have 440EPx PVR, but 440GRX node in the device tree, fix the cputable entry and omit FPU initialization code. Thanks,
Valentine.

#13 lore raw
Quoted 11 lines · Valentine Barshak
Quoted 10 lines · Benjamin Herrenschmidt
Quoted 5 lines

Depends on interpretation. IIRC currently the same die is used for 440EPx and 440GRx. I could be wrong here though and it is just a bug in the chip. But anyway we should support this somehow. Could be that I missed this in the current 440GRx (Rainier) arch/ppc support too. I have to admit, that no clever solution comes to my mind right away though.

We can always come up with some kind of runtime detection, by turning on MSR:FP, issuing an fp instruction and catching the illegal instruction fault if any :-)

Quoted 8 lines
Quoted 3 lines

Ben.

Is it OK to workaround the GRX/EPX having the same PVR issue using device tree?
Say, check the PVR value and if we have 440EPx PVR, but 440GRX node in the device tree, fix the cputable entry and omit FPU initialization code.

Fixing the CPU features based on the tree is definitely legit. We do that on pseries. In fact, with paulus latest patch, the cputable is __initdata and the cur CPU features is a -copy- which makes it even more legitimate to whack it.

Ben.

#14 lore raw
In reply to Josh Boyer
Quoted 42 lines · Josh Boyer
Quoted 39 lines · On Mon, 30 Jul 2007 19:16:28 +0400 Valentine Barshak <[email protected]>…

diff -ruN linux.orig/arch/powerpc/kernel/cputable.c linux/arch/powerpc/kernel/cputable.c

arch/powerpc/kernel/cputable.c +32 -0
@@ -1132,6 +1132,42 @@
 		.dcache_bsize		= 32,
 		.platform		= "ppc440",
 	},
+	{ /* 440EPX  - with Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008D0,
+		.cpu_name		= "440EPX - with Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, /* 440EPX has an FPU */
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},
+	{ /* 440EPX  - without Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008D4,
+		.cpu_name		= "440EPX - no Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, /* 440EPX has an FPU */
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},
+	{ /* 440GRX  - with Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008D8,
+		.cpu_name		= "440GRX - with Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE, /* 440GRX has no FPU */
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},
+	{ /* 440GRX  - without Security/Kasumi  */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x200008DC,
+		.cpu_name		= "440GRX - no Security/Kasumi",
+		.cpu_features		= CPU_FTRS_44X,
Quoted 8 lines

arch/powerpc/kernel/cputable.c line 1161

Quoted 4 lines
arch/powerpc/kernel/cputable.c +4 -0
+		.cpu_user_features	= COMMON_USER_BOOKE, /* 440GRX has no FPU */
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},

Should the 440GRX PVR additions be done in a separate patch? Or is the PVR and cpu features truly the only difference between 440EPx and 440GRx?

440GRx Doesn't have USB (host/device) controllers and and FPU. Actually, I have a 440GRx board with the same PVR valus as 440EPx has. HW bug may be?
I think I'll remove 440GRx for now.

Quoted 17 lines
Quoted 5 lines

diff -ruN linux.orig/arch/powerpc/platforms/44x/sequoia.c linux/arch/powerpc/platforms/44x/sequoia.c

arch/powerpc/platforms/44x/sequoia.c line 9

Quoted 9 lines
arch/powerpc/platforms/44x/sequoia.c +9 -0
@@ -0,0 +1,66 @@
+/*
+ * Sequoia board specific routines
+ *
+ * Wade Farnsworth <[email protected]>
+ * Copyright 2004-2007 MontaVista Software Inc.
+ *
+ * Rewritten and ported to the merged powerpc tree:
+ * Josh Boyer <[email protected]>
+ * Copyright 2007 IBM Corporation

I didn't really do this. Might want to give yourself credit instead :).

Quoted 1 line

josh

I'll change it to "base on Bamboo code by Josh" :)