8xx/82xx patches
Subsystems (4)
cover 8xx/82xx patches
This is the latest set of 8xx/82xx patches; please apply for 2.6.24.
Kumar, sorry if you got this twice, but my mailer was misconfigured last time, and thus it didn't get to the list.
-Scott
PATCH 1/28 CPM: Change from fsl,brg-frequency to brg/clock-frequency
As suggested by David Gibson, now that we have a separate node for the baud rate generators, it's better to use the standard clock-frequency property than a cpm-node-level fsl,brg-frequency property.
This patch updates existing places where fsl,brg-frequency is used.
Signed-off-by Scott Wood <[email protected]>
--- arch/powerpc/boot/cuboot-8xx.c | 8 +++++--- arch/powerpc/boot/cuboot-pq2.c | 8 +++++--- arch/powerpc/sysdev/fsl_soc.c | 24 ++++++++++++++---------- 3 files changed, 24 insertions(+), 16 deletions(-)
arch/powerpc/boot/cuboot-8xx.c +5 -3
@@ -29,10 +29,12 @@ static void platform_fixups(void)dt_fixup_cpu_clocks (bd.bi_intfreq, bd.bi_busfreq /16 , bd.bi_busfreq); node =finddevice ("/soc/cpm" ); -if (node) { +if (node)setprop (node,"clock-frequency" , &bd.bi_busfreq,4 ); -setprop (node,"fsl,brg-frequency" , &bd.bi_busfreq,4 ); - } + + node =finddevice ("/soc/cpm/brg" ); +if (node) +setprop (node,"clock-frequency" , &bd.bi_busfreq,4 ); } void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
arch/powerpc/boot/cuboot-pq2.c +5 -3
@@ -264,10 +264,12 @@ static void pq2_platform_fixups(void)dt_fixup_cpu_clocks (bd.bi_intfreq, bd.bi_busfreq /4 , bd.bi_busfreq); node =finddevice ("/soc/cpm" ); -if (node) { +if (node)setprop (node,"clock-frequency" , &bd.bi_cpmfreq,4 ); -setprop (node,"fsl,brg-frequency" , &bd.bi_brgfreq,4 ); - } + + node =finddevice ("/soc/cpm/brg" ); +if (node) +setprop (node,"clock-frequency" , &bd.bi_brgfreq,4 );update_cs_ranges ();fixup_pci ();
arch/powerpc/sysdev/fsl_soc.c +14 -10
@@ -73,22 +73,26 @@ static u32 brgfreq = -1;u32 get_brgfreq (void ) {struct device_node *node; +const unsigned int *prop; +int size;if (brgfreq !=-1 )return brgfreq; - node =of_find_compatible_node (NULL ,NULL ,"fsl,cpm1" ); -if (!node) - node =of_find_compatible_node (NULL ,NULL ,"fsl,cpm2" ); -if (!node) - node =of_find_node_by_type (NULL ,"cpm" ); + node =of_find_compatible_node (NULL ,NULL ,"fsl,cpm-brg" );if (node) { -int size; -const unsigned int *prop; + prop =of_get_property (node,"clock-frequency" , &size); +if (prop && size ==4 ) + brgfreq = *prop; - prop =of_get_property (node,"fsl,brg-frequency" , &size); -if (!prop) - prop =of_get_property (node,"brg-frequency" , &size); +of_node_put (node); +return brgfreq; + } + +/* Legacy device binding -- will go away when no users are left. */ + node =of_find_node_by_type (NULL ,"cpm" ); +if (node) { + prop =of_get_property (node,"brg-frequency" , &size);if (prop && size ==4 ) brgfreq = *prop;
Signature · 1 line
1.5.3.1
Re: [PATCH 01/28] CPM: Change from fsl, brg-frequency to brg/clock-frequency
Quoted 9 lines · Scott Wood
As suggested by David Gibson, now that we have a separate node for the baud rate generators, it's better to use the standard clock-frequency property than a cpm-node-level fsl,brg-frequency property.
This patch updates existing places where fsl,brg-frequency is used.
Signed-off-by Scott Wood <[email protected]>
[snip]
Quoted 28 lines
arch/powerpc/sysdev/fsl_soc.c +6
-8@@ -73,22 +73,26 @@ static u32 brgfreq = -1;u32 get_brgfreq (void ) {struct device_node *node; +const unsigned int *prop; +int size;if (brgfreq !=-1 )return brgfreq; - node =of_find_compatible_node (NULL ,NULL ,"fsl,cpm1" ); -if (!node) - node =of_find_compatible_node (NULL ,NULL ,"fsl,cpm2" ); -if (!node) - node =of_find_node_by_type (NULL ,"cpm" ); + node =of_find_compatible_node (NULL ,NULL ,"fsl,cpm-brg" );if (node) { -int size; -const unsigned int *prop; + prop =of_get_property (node,"clock-frequency" , &size); +if (prop && size ==4 ) + brgfreq = *prop; - prop =of_get_property (node,"fsl,brg-frequency" , &size);
arch/powerpc/sysdev/fsl_soc.c static u32 brgfreq = -1; · line 95
Quoted 10 lines
arch/powerpc/sysdev/fsl_soc.c +8
-2-if (!prop) - prop =of_get_property (node,"brg-frequency" , &size); +of_node_put (node); +return brgfreq; + } + +/* Legacy device binding -- will go away when no users are left. */ + node =of_find_node_by_type (NULL ,"cpm" ); +if (node) { + prop =of_get_property (node,"brg-frequency" , &size);
Shouldn't you check for "fsl,brg-frequency" here, in case of old device trees?
Quoted 3 lines
arch/powerpc/sysdev/fsl_soc.c +0
-0if (prop && size ==4 ) brgfreq = *prop;
Signature · 4 lines
David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
Re: [PATCH 01/28] CPM: Change from fsl, brg-frequency to brg/clock-frequency
Quoted 7 lines · David Gibson
arch/powerpc/sysdev/fsl_soc.c static u32 brgfreq = -1; · line 95
Quoted 4 lines
arch/powerpc/sysdev/fsl_soc.c +4
-0+/* Legacy device binding -- will go away when no users are left. */ + node =of_find_node_by_type (NULL ,"cpm" ); +if (node) { + prop =of_get_property (node,"brg-frequency" , &size);Shouldn't you check for "fsl,brg-frequency" here, in case of old device trees?
What old device trees? fsl,brg-frequency has never hit mainline; it's only been in Kumar's tree for a week or so.
-Scott
Re: [PATCH 01/28] CPM: Change from fsl, brg-frequency to brg/clock-frequency
Quoted 11 lines · Scott Wood
Quoted 7 lines · David Gibson
arch/powerpc/sysdev/fsl_soc.c static u32 brgfreq = -1; · line 95
Quoted 4 lines
arch/powerpc/sysdev/fsl_soc.c +4
-0+/* Legacy device binding -- will go away when no users are left. */ + node =of_find_node_by_type (NULL ,"cpm" ); +if (node) { + prop =of_get_property (node,"brg-frequency" , &size);Shouldn't you check for "fsl,brg-frequency" here, in case of old device trees?
What old device trees? fsl,brg-frequency has never hit mainline; it's only been in Kumar's tree for a week or so.
Ah, ok. I didn't realise.
Signature · 4 lines
David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
PATCH 2/28 Introduce new CPM device bindings.
In reply to Scott WoodThis introduces a new device binding for the CPM and other devices on these boards. Some of the changes include:
1. Proper namespace scoping for Freescale compatibles and properties.
2. Use compatible rather than things like device_type and model to determine which particular variant of a device is present.
3. Give the drivers the relevant CPM command word directly, rather than requiring it to have a lookup table based on device-id, SCC v. SMC, and CPM version.
4. Specify the CPCR and the usable DPRAM region in the CPM's reg property.
Boards that do not require the legacy bindings should select CONFIG_PPC_CPM_NEW_BINDING to enable the of_platform CPM devices. Once all existing boards are converted and tested, the config option can become default y to prevent new boards from using the old model. Once arch/ppc is gone, the config option can be removed altogether.
Signed-off-by Scott Wood <[email protected]>
--- Documentation/powerpc/booting-without-of.txt | 171 +++++++++++++++++++++++++- arch/powerpc/platforms/Kconfig | 11 ++ arch/powerpc/sysdev/fsl_soc.c | 2 + 3 files changed, 183 insertions(+), 1 deletions(-)
Documentation/powerpc/booting-without-of.txt +170 -1
@@ -1510,7 +1510,10 @@ platforms are moved over to use the flattened-device-tree model. i) Freescale QUICC Engine module (QE) This represents qe module that is installed on PowerQUICC II Pro. - Hopefully it will merge backward compatibility with CPM/CPM2. + + NOTE: This is an interim binding; it should be updated to fit + in with the CPM binding later in this document. + Basically, it is a bus of devices, that could act more or less as a complete entity (UCC, USB etc ). All of them should be siblings on the "root" qe node, using the common properties from there.
@@ -1848,6 +1851,172 @@ platforms are moved over to use the flattened-device-tree model. fsl,has-rstcr; }; + l) Freescale Communications Processor Module + + NOTE: This is an interim binding, and will likely change slightly, + as more devices are supported. The QE bindings especially are + incomplete. + + i) Root CPM node + + Properties: + - compatible : "fsl,cpm1", "fsl,cpm2", or "fsl,qe". + - reg : The first resource is a 48-byte region beginning with + CPCR. The second is the available general-purpose + DPRAM. + + Example: + cpm@119c0 { + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <2>; + compatible = "fsl,mpc8272-cpm", "fsl,cpm2"; + reg = <119c0 30 0 2000>; + } + + ii) Properties common to mulitple CPM/QE devices + + - fsl,cpm-command : This value is ORed with the opcode and command flag + to specify the device on which a CPM command operates. + + - fsl,cpm-brg : Indicates which baud rate generator the device + is associated with. If absent, an unused BRG + should be dynamically allocated. If zero, the + device uses an external clock rather than a BRG. + + - reg : Unless otherwise specified, the first resource represents the + scc/fcc/ucc registers, and the second represents the device's + parameter RAM region (if it has one). + + iii) Serial + + Currently defined compatibles: + - fsl,cpm1-smc-uart + - fsl,cpm2-smc-uart + - fsl,cpm1-scc-uart + - fsl,cpm2-scc-uart + - fsl,qe-uart + + Example: + + serial@11a00 { + device_type = "serial"; + compatible = "fsl,mpc8272-scc-uart", + "fsl,cpm2-scc-uart"; + reg = <11a00 20 8000 100>; + interrupts = <28 8>; + interrupt-parent = <&PIC>; + fsl,cpm-brg = <1>; + fsl,cpm-command = <00800000>; + }; + + iii) Network + + Currently defined compatibles: + - fsl,cpm1-scc-enet + - fsl,cpm2-scc-enet + - fsl,cpm1-fec-enet + - fsl,cpm2-fcc-enet (third resource is GFEMR) + - fsl,qe-enet + + Example: + + ethernet@11300 { + device_type = "network"; + compatible = "fsl,mpc8272-fcc-enet", + "fsl,cpm2-fcc-enet"; + reg = <11300 20 8400 100 11390 1>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <20 8>; + interrupt-parent = <&PIC>; + phy-handle = <&PHY0>; + linux,network-index = <0>; + fsl,cpm-command = <12000300>; + }; + + iv) MDIO + + Currently defined compatibles: + fsl,pq1-fec-mdio (reg is same as first resource of FEC device) + fsl,cpm2-mdio-bitbang (reg is port C registers) + + Properties for fsl,cpm2-mdio-bitbang: + fsl,mdio-pin : pin of port C controlling mdio data + fsl,mdc-pin : pin of port C controlling mdio clock + + Example: + + mdio@10d40 { + device_type = "mdio"; + compatible = "fsl,mpc8272ads-mdio-bitbang", + "fsl,mpc8272-mdio-bitbang", + "fsl,cpm2-mdio-bitbang"; + reg = <10d40 14>; + #address-cells = <1>; + #size-cells = <0>; + fsl,mdio-pin = <12>; + fsl,mdc-pin = <13>; + }; + + v) Baud Rate Generators + + Currently defined compatibles: + fsl,cpm-brg + fsl,cpm1-brg + fsl,cpm2-brg + + Properties: + - reg : There may be an arbitrary number of reg resources; BRG + numbers are assigned to these in order. + - clock-frequency : Specifies the base frequency driving + the BRG. + + Example: + + brg@119f0 { + compatible = "fsl,mpc8272-brg", + "fsl,cpm2-brg", + "fsl,cpm-brg"; + reg = <119f0 10 115f0 10>; + clock-frequency = <d#25000000>; + }; + + vi) Interrupt Controllers + + Currently defined compatibles: + - fsl,cpm1-pic + - only one interrupt cell + - fsl,pq1-pic + - fsl,cpm2-pic + - second interrupt cell is level/sense: + - 2 is falling edge + - 8 is active low + + Example: + + interrupt-controller@10c00 { + #interrupt-cells = <2>; + interrupt-controller; + reg = <10c00 80>; + compatible = "mpc8272-pic", "fsl,cpm2-pic"; + }; + + vii) USB (Universal Serial Bus Controller) + + Properties: + - compatible : "fsl,cpm1-usb", "fsl,cpm2-usb", "fsl,qe-usb" + + Example: + usb@11bc0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,cpm2-usb"; + reg = <11b60 18 8b00 100>; + interrupts = <b 8>; + interrupt-parent = <&PIC>; + fsl,cpm-command = <2e600000>; + }; + More devices will be defined as this spec matures. VII - Specifying interrupt information for devices
arch/powerpc/platforms/Kconfig +11 -0
@@ -283,6 +283,17 @@ config CPM2 you wish to build a kernel for a machine with a CPM2 coprocessor on it (826x, 827x, 8560). +config PPC_CPM_NEW_BINDING + bool + depends on CPM1 || CPM2 + help + Select this if your board has been converted to use the new + device tree bindings for CPM, and no longer needs the + ioport callbacks or the platform device glue code. + + The fs_enet and cpm_uart drivers will be built as + of_platform devices. + config AXON_RAM tristate "Axon DDR2 memory device driver" depends on PPC_IBM_CELL_BLADE
arch/powerpc/sysdev/fsl_soc.c +2 -0
@@ -665,6 +665,7 @@ err:arch_initcall (fsl_usb_of_init); +#ifndef CONFIG_PPC_CPM_NEW_BINDING #ifdef CONFIG_CPM2 extern void init_scc_ioports (struct fs_uart_platform_info *);
@@ -1204,6 +1205,7 @@ err:arch_initcall (cpm_smc_uart_of_init);#endif /* CONFIG_8xx */ +#endif /* CONFIG_PPC_CPM_NEW_BINDING */ int __init fsl_spi_init(struct spi_board_info *board_infos, unsigned int num_board_infos,
Signature · 1 line
1.5.3.1
Re: [PATCH 02/28] Introduce new CPM device bindings.
Quoted 14 lines · Scott Wood
This introduces a new device binding for the CPM and other devices on these boards. Some of the changes include:
1. Proper namespace scoping for Freescale compatibles and properties.
2. Use compatible rather than things like
device_typeand model to determine which particular variant of a device is present.3. Give the drivers the relevant CPM command word directly, rather than requiring it to have a lookup table based on device-id, SCC v. SMC, and CPM version.
4. Specify the CPCR and the usable DPRAM region in the CPM's reg property.
Quoted 7 lines
Boards that do not require the legacy bindings should select
CONFIG_PPC_CPM_NEW_BINDINGto enable theof_platformCPM devices. Once all existing boards are converted and tested, the config option can become default y to prevent new boards from using the old model. Oncearch/ppcis gone, the config option can be removed altogether.Signed-off-by Scott Wood <[email protected]>
Acked-by David Gibson <[email protected]>
Signature · 4 lines
David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
PATCH 3/28 Document local bus nodes in the device tree.
In reply to Scott Woodcuboot-pq2 is updated to match the binding, and get rid of phandle linkage.
Signed-off-by Scott Wood <[email protected]>
--- Documentation/powerpc/booting-without-of.txt | 38 ++++++++++++++++++++++++++ arch/powerpc/boot/cuboot-pq2.c | 29 +++++-------------- 2 files changed, 46 insertions(+), 21 deletions(-)
Documentation/powerpc/booting-without-of.txt +38 -0
@@ -2017,6 +2017,44 @@ platforms are moved over to use the flattened-device-tree model. fsl,cpm-command = <2e600000>; }; + m) Chipselect/Local Bus + + Properties: + - name : Should be localbus + - #address-cells : Should be either two or three. The first cell is the + chipselect number, and the remaining cells are the + offset into the chipselect. + - #size-cells : Either one or two, depending on how large each chipselect + can be. + - ranges : Each range should correspond to a single chipselect, and cover + the entire access window as configured. + + Example: + localbus@f0010100 { + compatible = "fsl,mpc8272ads-localbus", + "fsl,mpc8272-localbus", + "fsl,pq2-localbus"; + #address-cells = <2>; + #size-cells = <1>; + reg = <f0010100 40>; + + ranges = <0 0 fe000000 02000000 + 1 0 f4500000 00008000>; + + flash@0,0 { + compatible = "jedec-flash"; + reg = <0 0 2000000>; + bank-width = <4>; + device-width = <1>; + }; + + board-control@1,0 { + reg = <1 0 20>; + compatible = "fsl,mpc8272ads-bcsr"; + }; + }; + + More devices will be defined as this spec matures. VII - Specifying interrupt information for devices
arch/powerpc/boot/cuboot-pq2.c +8 -21
@@ -43,22 +43,21 @@ struct pci_range pci_ranges_buf[MAX_PROP_LEN / sizeof(struct pci_range)];* some don't set up the PCI PIC at all, so we assume the device tree is * sane and update the BRx registers appropriately. * -* For any node defined as compatible with fsl,pq2-chipselect, -* #address/#size must be 2/1 for chipselect bus, 1/1 for parent bus, -* and ranges must be for whole chip selects. +* For any node defined as compatible with fsl,pq2-localbus, +* #address/#size must be 2/1 for the localbus, and 1/1 for the parent bus. +* Ranges must be for whole chip selects. */ static void update_cs_ranges (void ) { -u32 ctrl_ph; -void *ctrl_node, *bus_node, *parent_node; +void *bus_node, *parent_node;u32 *ctrl_addr;unsigned long ctrl_size;u32 naddr, nsize;int len;int i; - bus_node =finddevice ("/chipselect" ); -if (!bus_node || !dt_is_compatible (bus_node,"fsl,pq2-chipselect" )) + bus_node =finddevice ("/localbus" ); +if (!bus_node || !dt_is_compatible (bus_node,"fsl,pq2-localbus" ))return ;dt_get_reg_format (bus_node, &naddr, &nsize);
@@ -73,19 +72,7 @@ static void update_cs_ranges(void)if (naddr !=1 || nsize !=1 ) goto err; - len =getprop (bus_node,"fsl,ctrl" , &ctrl_ph,4 ); -if (len !=4 ) - goto err; - - ctrl_node =find_node_by_prop_value (NULL ,"linux,phandle" , - (char *)&ctrl_ph,4 ); -if (!ctrl_node) - goto err; - -if (!dt_is_compatible (ctrl_node,"fsl,pq2-chipselect-ctrl" )) - goto err; - -if (!dt_xlate_reg (ctrl_node,0 , (unsigned long *)&ctrl_addr, +if (!dt_xlate_reg (bus_node,0 , (unsigned long *)&ctrl_addr, &ctrl_size)) goto err;
@@ -122,7 +109,7 @@ static void update_cs_ranges(void)return ; err: -printf ("Bad /chipselect or fsl,pq2-chipselect-ctrl node\r\n" ); +printf ("Bad /localbus node\r\n" ); }/* Older u-boots don't set PCI up properly. Update the hardware to match
Signature · 1 line
1.5.3.1
Re: [PATCH 03/28] Document local bus nodes in the device tree.
Quoted 1 line · Scott Wood
cuboot-pq2 is updated to match the binding, and get rid of phandle linkage.
A slight more descriptive commit message is desired.
- k
Quoted 8 lines
Signed-off-by Scott Wood <[email protected]>--- Documentation/powerpc/booting-without-of.txt | 38 +++++++++++++++ +++++++++++ arch/powerpc/boot/cuboot-pq2.c | 29 ++++ +-------------- 2 files changed, 46 insertions(+), 21 deletions(-)
PATCH 4/28 Add early debug console for CPM serial ports.
In reply to Scott WoodThis code assumes that the ports have been previously set up, with buffers in DPRAM.
Signed-off-by Scott Wood <[email protected]>
--- arch/powerpc/Kconfig.debug | 21 ++++++++++++++++ arch/powerpc/kernel/head_32.S | 16 ++++++++++++ arch/powerpc/kernel/udbg.c | 2 + arch/powerpc/platforms/8xx/Kconfig | 1 + arch/powerpc/platforms/Kconfig | 4 +++ arch/powerpc/sysdev/Makefile | 1 + arch/powerpc/sysdev/cpm_common.c | 46 ++++++++++++++++++++++++++++++++++++ include/asm-powerpc/udbg.h | 1 + 8 files changed, 92 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/sysdev/cpm_common.c
arch/powerpc/Kconfig.debug +21 -0
@@ -221,6 +221,15 @@ config PPC_EARLY_DEBUG_44x Select this to enable early debugging for IBM 44x chips via the inbuilt serial port. +config PPC_EARLY_DEBUG_CPM + bool "Early serial debugging for Freescale CPM-based serial ports" + depends on SERIAL_CPM + select PIN_TLB if PPC_8xx + help + Select this to enable early debugging for Freescale chips + using a CPM-based serial port. This assumes that the bootwrapper + has run, and set up the CPM in a particular way. + endchoice config PPC_EARLY_DEBUG_44x_PHYSLOW
@@ -233,4 +242,16 @@ config PPC_EARLY_DEBUG_44x_PHYSHIGH depends PPC_EARLY_DEBUG_44x default "0x1" +config PPC_EARLY_DEBUG_CPM_ADDR + hex "CPM UART early debug transmit descriptor address" + depends on PPC_EARLY_DEBUG_CPM + default "0xfa202808" if PPC_EP88XC + default "0xf0000808" if CPM2 + default "0xff002808" if CPM1 + help + This specifies the address of the transmit descriptor + used for early debug output. Because it is needed before + platform probing is done, all platforms selected must + share the same address. + endmenu
arch/powerpc/kernel/head_32.S +16 -0
@@ -149,6 +149,9 @@ __after_mmu_off: #if defined(CONFIG_BOOTX_TEXT) bl setup_disp_bat #endif +#ifdef CONFIG_PPC_EARLY_DEBUG_CPM + bl setup_cpm_bat +#endif /* * Call setup_cpu for CPU 0 and initialize 6xx Idle
@@ -1245,6 +1248,19 @@ setup_disp_bat: blr #endif /* CONFIG_BOOTX_TEXT */ +#ifdef CONFIG_PPC_EARLY_DEBUG_CPM +setup_cpm_bat: + lis r8, 0xf000 + ori r8, r8, 0x002a + mtspr SPRN_DBAT1L, r8 + + lis r11, 0xf000 + ori r11, r11, (BL_1M << 2) | 2 + mtspr SPRN_DBAT1U, r11 + + blr +#endif + #ifdef CONFIG_8260 /* Jump into the system reset for the rom. * We first disable the MMU, and then jump to the ROM reset address.
arch/powerpc/kernel/udbg.c +2 -0
@@ -54,6 +54,8 @@ void __init udbg_early_init(void)#elif defined(CONFIG_PPC_EARLY_DEBUG_44x)/* PPC44x debug */ udbg_init_44x_as1 (); +#elif defined(CONFIG_PPC_EARLY_DEBUG_CPM ) +udbg_init_cpm ();#endif }
arch/powerpc/platforms/8xx/Kconfig +1 -0
@@ -3,6 +3,7 @@ config FADS config CPM1 bool + select CPM choice prompt "8xx Machine Type"
arch/powerpc/platforms/Kconfig +4 -0
@@ -277,6 +277,7 @@ config QUICC_ENGINE config CPM2 bool default n + select CPM help The CPM2 (Communications Processor Module) is a coprocessor on embedded CPUs made by Freescale. Selecting this option means that
@@ -313,4 +314,7 @@ config FSL_ULI1575 Freescale reference boards. The boards all use the ULI in pretty much the same way. +config CPM + bool + endmenu
arch/powerpc/sysdev/Makefile +1 -0
@@ -34,6 +34,7 @@ endif # Temporary hack until we have migrated to asm-powerpc ifeq ($(ARCH),powerpc) +obj-$(CONFIG_CPM) += cpm_common.o obj-$(CONFIG_CPM2) += cpm2_common.o cpm2_pic.o obj-$(CONFIG_8xx) += mpc8xx_pic.o commproc.o obj-$(CONFIG_UCODE_PATCH) += micropatch.o
arch/powerpc/sysdev/cpm_common.c new file +46 -0
46 lines not on this page · raw message
include/asm-powerpc/udbg.h +1 -0
@@ -48,6 +48,7 @@ extern void __init udbg_init_rtas_console(void);extern void __init udbg_init_debug_beat (void );extern void __init udbg_init_btext (void );extern void __init udbg_init_44x_as1 (void ); +extern void __init udbg_init_cpm (void );#endif /* __KERNEL__ */ #endif /* _ASM_POWERPC_UDBG_H */
Signature · 1 line
1.5.3.1
Re: [PATCH 04/28] Add early debug console for CPM serial ports.
Quoted 4 lines · Scott Wood
This code assumes that the ports have been previously set up, with buffers in DPRAM.
Signed-off-by Scott Wood <[email protected]>
Looks sane as far as I can see.
Acked-by David Gibson <[email protected]>
Signature · 4 lines
David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
PATCH 5/28 bootwrapper: Support all-in-one PCI nodes in cuboot-pq2.
In reply to Scott WoodConsensus was reached to put PCI nodes at the root of the tree (and not under /soc), but the phandle to a control node was rejected in favor of simply not worrying about /pci/reg overlapping /soc/ranges.
This updates cuboot-82xx to not look for the phandle.
Signed-off-by Scott Wood <[email protected]>
--- arch/powerpc/boot/cuboot-pq2.c | 25 ++++++++----------------- 1 files changed, 8 insertions(+), 17 deletions(-)
arch/powerpc/boot/cuboot-pq2.c +8 -17
@@ -126,11 +126,11 @@ static void fixup_pci(void)u32 *pci_regs[3 ];u8 *soc_regs;int i, len; -void *ctrl_node, *bus_node, *parent_node, *soc_node; -u32 naddr, nsize, bus_ph, mem_log2; +void *node, *parent_node, *soc_node; +u32 naddr, nsize, mem_log2; - ctrl_node =finddevice ("/soc/pci" ); -if (!ctrl_node || !dt_is_compatible (ctrl_node,"fsl,pq2-pci" )) + node =finddevice ("/pci" ); +if (!node || !dt_is_compatible (node,"fsl,pq2-pci" ))return ; soc_node =finddevice ("/soc" );
@@ -138,27 +138,18 @@ static void fixup_pci(void) goto err;for (i =0 ; i <3 ; i++) -if (!dt_xlate_reg (ctrl_node, i, +if (!dt_xlate_reg (node, i, (unsigned long *)&pci_regs[i],NULL )) goto err;if (!dt_xlate_reg (soc_node,0 , (unsigned long *)&soc_regs,NULL )) goto err; - len =getprop (ctrl_node,"fsl,bus" , &bus_ph,4 ); -if (len !=4 ) - goto err; - - bus_node =find_node_by_prop_value (NULL ,"linux,phandle" , - (char *)&bus_ph,4 ); -if (!bus_node) - goto err; - -dt_get_reg_format (bus_node, &naddr, &nsize); +dt_get_reg_format (node, &naddr, &nsize);if (naddr !=3 || nsize !=2 ) goto err; - parent_node =get_parent (bus_node); + parent_node =get_parent (node);if (!parent_node) goto err;
@@ -166,7 +157,7 @@ static void fixup_pci(void)if (naddr !=1 || nsize !=1 ) goto err; - len =getprop (bus_node,"ranges" , pci_ranges_buf, + len =getprop (node,"ranges" , pci_ranges_buf,sizeof (pci_ranges_buf));for (i =0 ; i < len /sizeof (struct pci_range ); i++) {
Signature · 1 line
1.5.3.1
Re: [PATCH 05/28] bootwrapper: Support all-in-one PCI nodes in cuboot-pq2.
Quoted 5 lines · Scott Wood
Consensus was reached to put PCI nodes at the root of the tree (and not under /soc), but the phandle to a control node was rejected in favor of simply not worrying about /pci/reg overlapping /soc/ranges.
This updates cuboot-82xx to not look for the phandle.
I preferred the split-node method, but as you say, this consensus has been reached for now.
Acked-by David Gibson <[email protected]>
Signature · 4 lines
David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
PATCH 6/28 bootwrapper: Add PlanetCore firmware support.
In reply to Scott WoodThis is a library that board code can use to extract information from the PlanetCore configuration keys. PlanetCore is used on various boards from Embedded Planet.
Signed-off-by Scott Wood <[email protected]>
--- arch/powerpc/boot/Makefile | 2 +- arch/powerpc/boot/planetcore.c | 175 ++++++++++++++++++++++++++++++++++++++++ arch/powerpc/boot/planetcore.h | 49 +++++++++++ 3 files changed, 225 insertions(+), 1 deletions(-) create mode 100644 arch/powerpc/boot/planetcore.c create mode 100644 arch/powerpc/boot/planetcore.h
arch/powerpc/boot/Makefile +1 -1
@@ -45,7 +45,7 @@ src-wlib := string.S crt0.S stdio.c main.c flatdevtree.c flatdevtree_misc.c \ ns16550.c serial.c simple_alloc.c div64.S util.S \ gunzip_util.c elf_util.c $(zlib) devtree.c oflib.c ofconsole.c \ 4xx.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c cuboot.c bamboo.c \ - cpm-serial.c stdlib.c + cpm-serial.c stdlib.c planetcore.c src-plat := of.c cuboot-83xx.c cuboot-85xx.c holly.c \ cuboot-ebony.c treeboot-ebony.c prpmc2800.c \ ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
arch/powerpc/boot/planetcore.c new file +175 -0
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arch/powerpc/boot/planetcore.h new file +49 -0
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Signature · 1 line
1.5.3.1
Re: [PATCH 06/28] bootwrapper: Add PlanetCore firmware support.
Quoted 5 lines · Scott Wood
This is a library that board code can use to extract information from the PlanetCore configuration keys. PlanetCore is used on various boards from Embedded Planet.
Signed-off-by Scott Wood <[email protected]>
[snip]
Quoted 18 lines
arch/powerpc/boot/planetcore.c new file +18
-0+void planetcore_set_mac_addrs (const char *table) +{ +char addr[4 ][6 ]; +u64 int_addr; +u32 i; +int j; +void *node; + +if (!planetcore_get_hex (table,PLANETCORE_KEY_MAC_ADDR , &int_addr)) +return ; + +for (i =0 ; i <4 ; i++) { +u64 this_dev_addr = int_addr | mac_table[i]; + +for (j =5 ; j >=0 ; j--) { + addr[i][j] = this_dev_addr &0xff ; + this_dev_addr >>=8 ; + }
arch/powerpc/boot/planetcore.c line 109
Quoted 10 lines
arch/powerpc/boot/planetcore.c new file +10
-0+ + node =find_node_by_prop_value (NULL ,"linux,network-index" , + (void *)&i,4 ); +if (node) { +printf ("ENET%u: local-mac-address <-" +" %02x:%02x:%02x:%02x:%02x:%02x\n\r" , i, + addr[i][0 ], addr[i][1 ], addr[i][2 ], + addr[i][3 ], addr[i][4 ], addr[i][5 ]); + +setprop (node,"local-mac-address" , addr[i],6 );
Hrm. When I said to extract the logic of fixup_mac_addrs(), I meant to create a new one-address version of the function in devtree.c then use it both here and in the fixup_mac_addrs() function. Rather than duplicating it inline here.
Signature · 4 lines
David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
PATCH 7/28 bootwrapper: Add fsl_get_immr() and 8xx/pq2 clock functions.
In reply to Scott Woodfsl_get_immr() uses /soc/ranges to determine the immr.
mpc885_get_clock() transforms a crystal frequency into a system frequency according to the PLL register settings.
pq2_get_clocks() does the same as the above for the PowerQUICC II, except that it produces several different clocks.
The mpc8xx/pq2 set_clocks() functions modify common properties in the device tree based on the given clock data.
The mpc885/pq2 fixup_clocks() functions call get_clocks(), and pass the results to set_clocks().
Signed-off-by Scott Wood <[email protected]>
--- arch/powerpc/boot/Makefile | 2 +- arch/powerpc/boot/fsl-soc.c | 57 ++++++++++++++++++++++++ arch/powerpc/boot/fsl-soc.h | 8 +++ arch/powerpc/boot/mpc8xx.c | 82 ++++++++++++++++++++++++++++++++++ arch/powerpc/boot/mpc8xx.h | 11 +++++ arch/powerpc/boot/pq2.c | 102 +++++++++++++++++++++++++++++++++++++++++++ arch/powerpc/boot/pq2.h | 11 +++++ 7 files changed, 272 insertions(+), 1 deletions(-) create mode 100644 arch/powerpc/boot/fsl-soc.c create mode 100644 arch/powerpc/boot/fsl-soc.h create mode 100644 arch/powerpc/boot/mpc8xx.c create mode 100644 arch/powerpc/boot/mpc8xx.h create mode 100644 arch/powerpc/boot/pq2.c create mode 100644 arch/powerpc/boot/pq2.h
arch/powerpc/boot/Makefile +1 -1
@@ -45,7 +45,7 @@ src-wlib := string.S crt0.S stdio.c main.c flatdevtree.c flatdevtree_misc.c \ ns16550.c serial.c simple_alloc.c div64.S util.S \ gunzip_util.c elf_util.c $(zlib) devtree.c oflib.c ofconsole.c \ 4xx.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c cuboot.c bamboo.c \ - cpm-serial.c stdlib.c planetcore.c + cpm-serial.c stdlib.c planetcore.c fsl-soc.c mpc8xx.c pq2.c src-plat := of.c cuboot-83xx.c cuboot-85xx.c holly.c \ cuboot-ebony.c treeboot-ebony.c prpmc2800.c \ ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
arch/powerpc/boot/fsl-soc.c new file +57 -0
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arch/powerpc/boot/fsl-soc.h new file +8 -0
@@ -0,0 +1,8 @@ +#ifndef _PPC_BOOT_FSL_SOC_H_ +#define _PPC_BOOT_FSL_SOC_H_ + +#include "types.h" + +u32 *fsl_get_immr (void ); + +#endif
arch/powerpc/boot/mpc8xx.c new file +82 -0
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arch/powerpc/boot/mpc8xx.h new file +11 -0
@@ -0,0 +1,11 @@ +#ifndef _PPC_BOOT_MPC8xx_H_ +#define _PPC_BOOT_MPC8xx_H_ + +#include "types.h" + +void mpc8xx_set_clocks (u32 sysclk); + +u32 mpc885_get_clock (u32 crystal); +int mpc885_fixup_clocks (u32 crystal); + +#endif
arch/powerpc/boot/pq2.c new file +102 -0
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arch/powerpc/boot/pq2.h new file +11 -0
@@ -0,0 +1,11 @@ +#ifndef _PPC_BOOT_PQ2_H_ +#define _PPC_BOOT_PQ2_H_ + +#include "types.h" + +int pq2_get_clocks (u32 crystal,u32 *sysfreq,u32 *corefreq, +u32 *timebase,u32 *brgfreq); +void pq2_set_clocks (u32 sysfreq,u32 corefreq,u32 timebase,u32 brgfreq); +int pq2_fixup_clocks (u32 crystal); + +#endif
Signature · 1 line
1.5.3.1
Re: [PATCH 07/28] bootwrapper: Add fsl_get_immr() and 8xx/pq2 clock functions.
Quoted 8 lines · Scott Wood
fsl_get_immr()uses /soc/ranges to determine the immr.
mpc885_get_clock()transforms a crystal frequency into a system frequency according to the PLL register settings.
pq2_get_clocks()does the same as the above for the PowerQUICC II, except that it produces several different clocks.
Quoted 7 lines
The mpc8xx/pq2
set_clocks()functions modify common properties in the device tree based on the given clock data.The mpc885/pq2
fixup_clocks()functions callget_clocks(), and pass the results toset_clocks().Signed-off-by Scott Wood <[email protected]>
Acked-by David Gibson <[email protected]>
Signature · 4 lines
David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
PATCH 8/28 bootwrapper: Use fsl_get_immr() in cuboot-pq2.c.
In reply to Scott WoodSigned-off-by Scott Wood <[email protected]>
--- arch/powerpc/boot/cuboot-pq2.c | 10 ++++------ 1 files changed, 4 insertions(+), 6 deletions(-)
arch/powerpc/boot/cuboot-pq2.c +4 -6
@@ -15,6 +15,7 @@#include "stdio.h" #include "cuboot.h" #include "io.h" +#include "fsl-soc.h" #define TARGET_CPM2 #define TARGET_HAS_ETH1
@@ -126,23 +127,20 @@ static void fixup_pci(void)u32 *pci_regs[3 ];u8 *soc_regs;int i, len; -void *node, *parent_node, *soc_node; +void *node, *parent_node;u32 naddr, nsize, mem_log2; node =finddevice ("/pci" );if (!node || !dt_is_compatible (node,"fsl,pq2-pci" ))return ; - soc_node =finddevice ("/soc" ); -if (!soc_node || !dt_is_compatible (soc_node,"fsl,pq2-soc" )) - goto err; -for (i =0 ; i <3 ; i++)if (!dt_xlate_reg (node, i, (unsigned long *)&pci_regs[i],NULL )) goto err; -if (!dt_xlate_reg (soc_node,0 , (unsigned long *)&soc_regs,NULL )) + soc_regs = (u8 *)fsl_get_immr (); +if (!soc_regs) goto err;dt_get_reg_format (node, &naddr, &nsize);
Signature · 1 line
1.5.3.1
Re: [PATCH 08/28] bootwrapper: Use fsl_get_immr() in cuboot-pq2.c.
On Mon, Sep 17, 2007 at 11:57:37AM -0500, Scott Wood wrote:
Needs a commit comment
Quoted 7 lines
Signed-off-by Scott Wood <[email protected]>--- arch/powerpc/boot/cuboot-pq2.c | 10 ++++------ 1 files changed, 4 insertions(+), 6 deletions(-)
Signature · 4 lines
David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
PATCH 9/28 cpm_uart: Be an of_platform device when CONFIG_PPC_CPM_NEW_BINDING is set.
In reply to Scott WoodThe existing OF glue code was crufty and broken. Rather than fix it, it has been removed, and the serial driver now talks to the device tree directly.
The non-CONFIG_PPC_CPM_NEW_BINDING code can go away once CPM platforms are dropped from arch/ppc (which will hopefully be soon), and existing arch/powerpc boards that I wasn't able to test on for this patchset get converted (which should be even sooner).
Signed-off-by Scott Wood <[email protected]>
--- drivers/serial/cpm_uart/cpm_uart.h | 6 +- drivers/serial/cpm_uart/cpm_uart_core.c | 241 ++++++++++++++++++++++++++++--- drivers/serial/cpm_uart/cpm_uart_cpm1.c | 16 ++- drivers/serial/cpm_uart/cpm_uart_cpm1.h | 2 + drivers/serial/cpm_uart/cpm_uart_cpm2.c | 18 +++- drivers/serial/cpm_uart/cpm_uart_cpm2.h | 2 + 6 files changed, 260 insertions(+), 25 deletions(-)
drivers/serial/cpm_uart/cpm_uart.h +5 -1
@@ -80,14 +80,18 @@ struct uart_cpm_port {int is_portb;/* wait on close if needed */ int wait_closing; +/* value to combine with opcode to form cpm command */ +u32 command; }; +#ifndef CONFIG_PPC_CPM_NEW_BINDING extern int cpm_uart_port_map[UART_NR ]; +#endif extern int cpm_uart_nr;extern struct uart_cpm_port cpm_uart_ports[UART_NR ];/* these are located in their respective files */ -void cpm_line_cr_cmd (int line,int cmd); +void cpm_line_cr_cmd (struct uart_cpm_port *port,int cmd);int cpm_uart_init_portdesc (void );int cpm_uart_allocbuf (struct uart_cpm_port *pinfo,unsigned int is_con);void cpm_uart_freebuf (struct uart_cpm_port *pinfo);
drivers/serial/cpm_uart/cpm_uart_core.c +219 -22
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drivers/serial/cpm_uart/cpm_uart_cpm1.c +15 -1
@@ -49,9 +49,20 @@/**************************************************************/ -void cpm_line_cr_cmd (int line,int cmd) +#ifdef CONFIG_PPC_CPM_NEW_BINDING +void cpm_line_cr_cmd (struct uart_cpm_port *port,int cmd) +{ +u16 __iomem *cpcr = &cpmp->cp_cpcr; + +out_be16 (cpcr, port->command | (cmd <<8 ) |CPM_CR_FLG ); +while (in_be16 (cpcr) &CPM_CR_FLG ) + ; +} +#else +void cpm_line_cr_cmd (struct uart_cpm_port *port,int cmd) {ushort val; +int line = port - cpm_uart_ports;volatile cpm8xx_t *cp = cpmp;switch (line) {
@@ -114,6 +125,7 @@ void scc4_lineif(struct uart_cpm_port *pinfo)/* XXX SCC4: insert port configuration here */ pinfo->brg = 4; } +#endif /* * Allocate DP-Ram and memory buffers. We need to allocate a transmit and
@@ -184,6 +196,7 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo)cpm_dpfree (pinfo->dp_addr); } +#ifndef CONFIG_PPC_CPM_NEW_BINDING /* Setup any dynamic params in the uart desc */ int cpm_uart_init_portdesc (void ) {
@@ -279,3 +292,4 @@ int cpm_uart_init_portdesc(void)#endif return 0; } +#endif
drivers/serial/cpm_uart/cpm_uart_cpm1.h +2 -0
@@ -13,12 +13,14 @@#include <asm/commproc.h> /* defines for IRQs */ +#ifndef CONFIG_PPC_CPM_NEW_BINDING #define SMC1_IRQ (CPM_IRQ_OFFSET + CPMVEC_SMC1)#define SMC2_IRQ (CPM_IRQ_OFFSET + CPMVEC_SMC2)#define SCC1_IRQ (CPM_IRQ_OFFSET + CPMVEC_SCC1)#define SCC2_IRQ (CPM_IRQ_OFFSET + CPMVEC_SCC2)#define SCC3_IRQ (CPM_IRQ_OFFSET + CPMVEC_SCC3)#define SCC4_IRQ (CPM_IRQ_OFFSET + CPMVEC_SCC4) +#endif static inline void cpm_set_brg (int brg,int baud) {
drivers/serial/cpm_uart/cpm_uart_cpm2.c +17 -1
@@ -49,9 +49,22 @@/**************************************************************/ -void cpm_line_cr_cmd (int line,int cmd) +#ifdef CONFIG_PPC_CPM_NEW_BINDING +void cpm_line_cr_cmd (struct uart_cpm_port *port,int cmd) +{ +cpm_cpm2_t __iomem *cp =cpm2_map (im_cpm); + +out_be32 (&cp->cp_cpcr, port->command | cmd |CPM_CR_FLG ); +while (in_be32 (&cp->cp_cpcr) &CPM_CR_FLG ) + ; + +cpm2_unmap (cp); +} +#else +void cpm_line_cr_cmd (struct uart_cpm_port *port,int cmd) {ulong val; +int line = port - cpm_uart_ports;volatile cpm_cpm2_t *cp =cpm2_map (im_cpm);
@@ -211,6 +224,7 @@ void scc4_lineif(struct uart_cpm_port *pinfo)cpm2_unmap (cpmux); cpm2_unmap(io); } +#endif /* * Allocate DP-Ram and memory buffers. We need to allocate a transmit and
@@ -281,6 +295,7 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo)cpm_dpfree (pinfo->dp_addr); } +#ifndef CONFIG_PPC_CPM_NEW_BINDING /* Setup any dynamic params in the uart desc */ int cpm_uart_init_portdesc (void ) {
@@ -386,3 +401,4 @@ int cpm_uart_init_portdesc(void) return 0; } +#endif
drivers/serial/cpm_uart/cpm_uart_cpm2.h +2 -0
@@ -13,12 +13,14 @@#include <asm/cpm2.h> /* defines for IRQs */ +#ifndef CONFIG_PPC_CPM_NEW_BINDING #define SMC1_IRQ SIU_INT_SMC1#define SMC2_IRQ SIU_INT_SMC2#define SCC1_IRQ SIU_INT_SCC1#define SCC2_IRQ SIU_INT_SCC2#define SCC3_IRQ SIU_INT_SCC3#define SCC4_IRQ SIU_INT_SCC4 +#endif static inline void cpm_set_brg (int brg,int baud) {
Signature · 1 line
1.5.3.1
Re: [PATCH 09/28] cpm_uart: Be an of_platform device when CONFIG_PPC_CPM_NEW_BINDING is set.
drivers/serial/cpm_uart/cpm_uart_core.c line 12
Quoted 6 lines · On Mon, 17 Sep 2007 11:57:38 -0500 Scott Wood <[email protected]> wrote:
+++
b/drivers/serial/cpm_uart/cpm_uart_core.cdrivers/serial/cpm_uart/cpm_uart_core.c +3
-0@@ -10,7 +10,7 @@ + +#ifdef CONFIG_PPC_CPM_NEW_BINDING +#include <asm/of_platform.h>
linux/of_platform.h
Signature · 3 lines
Cheers, Stephen Rothwell [email protected] http://www.canb.auug.org.au/~sfr/
PATCH 10/28 cpm_uart: sparse fixes
In reply to Scott WoodMostly a bunch of direct access to in/out conversions, plus a few cast removals, __iomem annotations, and miscellaneous cleanup.
Signed-off-by Scott Wood <[email protected]>
--- drivers/serial/cpm_uart/cpm_uart.h | 42 +++-- drivers/serial/cpm_uart/cpm_uart_core.c | 299 ++++++++++++++++--------------- drivers/serial/cpm_uart/cpm_uart_cpm1.c | 2 +- drivers/serial/cpm_uart/cpm_uart_cpm1.h | 14 +- drivers/serial/cpm_uart/cpm_uart_cpm2.c | 4 +- drivers/serial/cpm_uart/cpm_uart_cpm2.h | 14 +- 6 files changed, 192 insertions(+), 183 deletions(-)
drivers/serial/cpm_uart/cpm_uart.h +22 -20
@@ -56,21 +56,21 @@ struct uart_cpm_port {u16 rx_fifosize;u16 tx_nrfifos;u16 tx_fifosize; -smc_t *smcp; -smc_uart_t *smcup; -scc_t *sccp; -scc_uart_t *sccup; -volatile cbd_t *rx_bd_base; -volatile cbd_t *rx_cur; -volatile cbd_t *tx_bd_base; -volatile cbd_t *tx_cur; +smc_t __iomem *smcp; +smc_uart_t __iomem *smcup; +scc_t __iomem *sccp; +scc_uart_t __iomem *sccup; +cbd_t __iomem *rx_bd_base; +cbd_t __iomem *rx_cur; +cbd_t __iomem *tx_bd_base; +cbd_t __iomem *tx_cur;unsigned char *tx_buf;unsigned char *rx_buf;u32 flags;void (*set_lineif)(struct uart_cpm_port *);u8 brg;uint dp_addr; -void *mem_addr; +void *mem_addr;dma_addr_t dma_addr;u32 mem_size;/* helpers */
@@ -106,34 +106,36 @@ void scc4_lineif(struct uart_cpm_port *pinfo);/* virtual to phys transtalion */ -static inline unsigned long cpu2cpm_addr (void * addr,struct uart_cpm_port *pinfo) +static inline unsigned long cpu2cpm_addr (void *addr, +struct uart_cpm_port *pinfo) {int offset;u32 val = (u32 )addr; +u32 mem = (u32 )pinfo->mem_addr;/* sane check */ -if (likely ((val >= (u32 )pinfo->mem_addr)) && - (val<((u32 )pinfo->mem_addr + pinfo->mem_size))) { - offset = val - (u32 )pinfo->mem_addr; -return pinfo->dma_addr+offset; +if (likely (val >= mem && val < mem + pinfo->mem_size)) { + offset = val - mem; +return pinfo->dma_addr + offset; }/* something nasty happened */ BUG ();return 0 ; } -static inline void *cpm2cpu_addr (unsigned long addr,struct uart_cpm_port *pinfo) +static inline void *cpm2cpu_addr (unsigned long addr, +struct uart_cpm_port *pinfo) {int offset;u32 val = addr; +u32 dma = (u32 )pinfo->dma_addr;/* sane check */ -if (likely ((val >= pinfo->dma_addr) && - (val<(pinfo->dma_addr + pinfo->mem_size)))) { - offset = val - (u32 )pinfo->dma_addr; -return (void *)(pinfo->mem_addr+offset); +if (likely (val >= dma && val < dma + pinfo->mem_size)) { + offset = val - dma; +return pinfo->mem_addr + offset; }/* something nasty happened */ BUG (); -return 0 ; +return NULL ; }
drivers/serial/cpm_uart/cpm_uart_core.c +153 -146
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drivers/serial/cpm_uart/cpm_uart_cpm1.c +1 -1
@@ -179,7 +179,7 @@ int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con) pinfo->tx_buf = pinfo->rx_buf +L1_CACHE_ALIGN (pinfo->rx_nrfifos * pinfo->rx_fifosize); - pinfo->rx_bd_base = (volatile cbd_t *)dp_mem; + pinfo->rx_bd_base = (cbd_t __iomem __force *)dp_mem; pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos;return 0 ;
drivers/serial/cpm_uart/cpm_uart_cpm1.h +7 -7
@@ -27,18 +27,18 @@ static inline void cpm_set_brg(int brg, int baud) cpm_setbrg(brg, baud); } -static inline void cpm_set_scc_fcr (volatile scc_uart_t * sup) +static inline void cpm_set_scc_fcr (scc_uart_t __iomem * sup) { - sup->scc_genscc.scc_rfcr =SMC_EB ; - sup->scc_genscc.scc_tfcr =SMC_EB ; +out_8 (&sup->scc_genscc.scc_rfcr,SMC_EB ); +out_8 (&sup->scc_genscc.scc_tfcr,SMC_EB ); } -static inline void cpm_set_smc_fcr (volatile smc_uart_t * up) +static inline void cpm_set_smc_fcr (smc_uart_t __iomem * up) { - up->smc_rfcr =SMC_EB ; - up->smc_tfcr =SMC_EB ; +out_8 (&up->smc_rfcr,SMC_EB ); +out_8 (&up->smc_tfcr,SMC_EB ); } -#define DPRAM_BASE ((unsigned char *)&cpmp->cp_dpmem[0]) +#define DPRAM_BASE ((u8 __iomem __force *)&cpmp->cp_dpmem[0])#endif
drivers/serial/cpm_uart/cpm_uart_cpm2.c +2 -2
@@ -278,7 +278,7 @@ int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con) pinfo->tx_buf = pinfo->rx_buf +L1_CACHE_ALIGN (pinfo->rx_nrfifos * pinfo->rx_fifosize); - pinfo->rx_bd_base = (volatile cbd_t *)dp_mem; + pinfo->rx_bd_base = (cbd_t __iomem __force *)dp_mem; pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos;return 0 ;
@@ -289,7 +289,7 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo)dma_free_coherent (NULL ,L1_CACHE_ALIGN (pinfo->rx_nrfifos * pinfo->rx_fifosize) +L1_CACHE_ALIGN (pinfo->tx_nrfifos * - pinfo->tx_fifosize), pinfo->mem_addr, + pinfo->tx_fifosize), (void __force *)pinfo->mem_addr, pinfo->dma_addr);cpm_dpfree (pinfo->dp_addr);
drivers/serial/cpm_uart/cpm_uart_cpm2.h +7 -7
@@ -27,18 +27,18 @@ static inline void cpm_set_brg(int brg, int baud) cpm_setbrg(brg, baud); } -static inline void cpm_set_scc_fcr (volatile scc_uart_t * sup) +static inline void cpm_set_scc_fcr (scc_uart_t __iomem *sup) { - sup->scc_genscc.scc_rfcr =CPMFCR_GBL |CPMFCR_EB ; - sup->scc_genscc.scc_tfcr =CPMFCR_GBL |CPMFCR_EB ; +out_8 (&sup->scc_genscc.scc_rfcr,CPMFCR_GBL |CPMFCR_EB ); +out_8 (&sup->scc_genscc.scc_tfcr,CPMFCR_GBL |CPMFCR_EB ); } -static inline void cpm_set_smc_fcr (volatile smc_uart_t * up) +static inline void cpm_set_smc_fcr (smc_uart_t __iomem *up) { - up->smc_rfcr =CPMFCR_GBL |CPMFCR_EB ; - up->smc_tfcr =CPMFCR_GBL |CPMFCR_EB ; +out_8 (&up->smc_rfcr,CPMFCR_GBL |CPMFCR_EB ); +out_8 (&up->smc_tfcr,CPMFCR_GBL |CPMFCR_EB ); } -#define DPRAM_BASE ((unsigned char *)cpm_dpram_addr(0)) +#define DPRAM_BASE ((u8 __iomem __force *)cpm_dpram_addr(0))#endif
Signature · 1 line
1.5.3.1
PATCH 11/28 cpm_uart: Issue STOP_TX command before initializing console.
In reply to Scott WoodThis prevents some bootloader/bootwrapper characters from being lost.
Signed-off-by Scott Wood <[email protected]>
--- drivers/serial/cpm_uart/cpm_uart_core.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-)
drivers/serial/cpm_uart/cpm_uart_core.c +3 -0
@@ -1325,6 +1325,8 @@ static int __init cpm_uart_console_setup(struct console *co, char *options) udbg_putc =NULL ;#endif +cpm_line_cr_cmd (pinfo,CPM_CR_STOP_TX ); +if (IS_SMC (pinfo)) {clrbits8 (&pinfo->smcp->smc_smcm,SMCM_RX |SMCM_TX );clrbits16 (&pinfo->smcp->smc_smcmr,SMCMR_REN |SMCMR_TEN );
@@ -1346,6 +1348,7 @@ static int __init cpm_uart_console_setup(struct console *co, char *options)cpm_uart_init_scc (pinfo);uart_set_options (port, co, baud, parity, bits, flow); +cpm_line_cr_cmd (pinfo,CPM_CR_RESTART_TX );return 0 ; }
Signature · 1 line
1.5.3.1
PATCH 12/28 8xx: Fix CONFIG_PIN_TLB.
In reply to Scott Wood1. Move CONSISTENT_START on 8xx so that it doesn't overlap the IMMR mapping.
2. The wrong register was being loaded into SPRN_MD_RPN.
Signed-off-by Scott Wood <[email protected]>
--- arch/powerpc/Kconfig | 1 + arch/powerpc/kernel/head_8xx.S | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-)
arch/powerpc/Kconfig +1 -0
@@ -582,6 +582,7 @@ config CONSISTENT_START_BOOL config CONSISTENT_START hex "Base virtual address of consistent memory pool" if CONSISTENT_START_BOOL + default "0xfd000000" if (NOT_COHERENT_CACHE && 8xx) default "0xff100000" if NOT_COHERENT_CACHE config CONSISTENT_SIZE_BOOL
arch/powerpc/kernel/head_8xx.S +2 -2
@@ -727,13 +727,13 @@ initial_mmu: mtspr SPRN_MD_TWC, r9 li r11, MI_BOOTINIT /* Create RPN for address 0 */ addis r11, r11, 0x0080 /* Add 8M */ - mtspr SPRN_MD_RPN, r8 + mtspr SPRN_MD_RPN, r11 addis r8, r8, 0x0080 /* Add 8M */ mtspr SPRN_MD_EPN, r8 mtspr SPRN_MD_TWC, r9 addis r11, r11, 0x0080 /* Add 8M */ - mtspr SPRN_MD_RPN, r8 + mtspr SPRN_MD_RPN, r11 #endif /* Since the cache is enabled according to the information we
Signature · 1 line
1.5.3.1
PATCH 13/28 8xx: Infrastructure code cleanup.
In reply to Scott Wood1. Keep a global mpc8xx_immr mapping, rather than constantly creating temporary mappings.
2. Look for new fsl,cpm1 and fsl,cpm1-pic names.
3. Always reset the CPM when not using the udbg console; this is required in case the firmware initialized a device that is incompatible with one that the kernel is about to use.
4. Remove some superfluous casts and header includes.
5. Change a usage of IMAP_ADDR to get_immrbase().
6. Use phys_addr_t, not uint, for dpram_pbase.
7. Various sparse-related fixes, such as __iomem annotations.
8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything useful beyond the generic cpuinfo handler.
9. Move prototypes for 8xx support functions from board files to sysdev/commproc.h.
Signed-off-by Scott Wood <[email protected]>
--- arch/powerpc/platforms/8xx/m8xx_setup.c | 90 ++++++-------------------- arch/powerpc/platforms/8xx/mpc86xads.h | 3 - arch/powerpc/platforms/8xx/mpc86xads_setup.c | 10 +--- arch/powerpc/platforms/8xx/mpc885ads.h | 3 - arch/powerpc/platforms/8xx/mpc885ads_setup.c | 11 +--- arch/powerpc/sysdev/commproc.c | 67 +++++++++++-------- arch/powerpc/sysdev/commproc.h | 12 ++++ arch/powerpc/sysdev/mpc8xx_pic.c | 19 +++--- include/asm-powerpc/commproc.h | 4 +- include/asm-powerpc/fs_pd.h | 19 +---- 10 files changed, 88 insertions(+), 150 deletions(-) create mode 100644 arch/powerpc/sysdev/commproc.h
arch/powerpc/platforms/8xx/m8xx_setup.c +20 -70
@@ -10,57 +10,33 @@* bootup setup stuff.. */ -#include <linux/errno.h> -#include <linux/sched.h> #include <linux/kernel.h> -#include <linux/mm.h> -#include <linux/stddef.h> -#include <linux/unistd.h> -#include <linux/ptrace.h> #include <linux/slab.h> -#include <linux/user.h> -#include <linux/a.out.h> -#include <linux/tty.h> -#include <linux/major.h> #include <linux/interrupt.h> -#include <linux/reboot.h> #include <linux/init.h> -#include <linux/initrd.h> -#include <linux/ioport.h> -#include <linux/bootmem.h> -#include <linux/seq_file.h> -#include <linux/root_dev.h> #include <linux/time.h> #include <linux/rtc.h> -#include <linux/fsl_devices.h> -#include <asm/mmu.h> -#include <asm/reg.h> #include <asm/io.h> -#include <asm/pgtable.h> #include <asm/mpc8xx.h> #include <asm/8xx_immap.h> -#include <asm/machdep.h> -#include <asm/time.h> #include <asm/prom.h> #include <asm/fs_pd.h> #include <mm/mmu_decl.h> -#include "sysdev/mpc8xx_pic.h" +#include <sysdev/mpc8xx_pic.h> +#include <sysdev/commproc.h> #ifdef CONFIG_PCMCIA_M8XX struct mpc8xx_pcmcia_ops m8xx_pcmcia_ops;#endif void m8xx_calibrate_decr (void ); -#ifdef CONFIG_8xx_WDT -extern void m8xx_wdt_handler_install (bd_t *bp); -#endif extern int cpm_pic_init (void );extern int cpm_get_irq (void );/* A place holder for time base interrupts, if they are ever enabled. */ -irqreturn_t timebase_interrupt (int irq,void * dev) +static irqreturn_t timebase_interrupt (int irq,void *dev) {printk ("timebase_interrupt()\n" );
@@ -77,7 +53,7 @@ static struct irqaction tbint_irqaction = {void __init __attribute__ ((weak))init_internal_rtc (void ) { -sit8xx_t *sys_tmr = (sit8xx_t *)immr_map (im_sit); +sit8xx_t __iomem *sys_tmr =immr_map (im_sit);/* Disable the RTC one second and alarm interrupts. */ clrbits16 (&sys_tmr->sit_rtcsc, (RTCSC_SIE |RTCSC_ALE ));
@@ -116,13 +92,13 @@ static int __init get_freq(char *name, unsigned long *val)void __init mpc8xx_calibrate_decr (void ) {struct device_node *cpu; -cark8xx_t *clk_r1; -car8xx_t *clk_r2; -sitk8xx_t *sys_tmr1; -sit8xx_t *sys_tmr2; +cark8xx_t __iomem *clk_r1; +car8xx_t __iomem *clk_r2; +sitk8xx_t __iomem *sys_tmr1; +sit8xx_t __iomem *sys_tmr2;int irq, virq; - clk_r1 = (cark8xx_t *)immr_map (im_clkrstk); + clk_r1 =immr_map (im_clkrstk);/* Unlock the SCCR. */ out_be32 (&clk_r1->cark_sccrk, ~KAPWR_KEY );
@@ -130,7 +106,7 @@ void __init mpc8xx_calibrate_decr(void)immr_unmap (clk_r1);/* Force all 8xx processors to use divide by 16 processor clock. */ - clk_r2 = (car8xx_t *)immr_map (im_clkrst); + clk_r2 =immr_map (im_clkrst);setbits32 (&clk_r2->car_sccr,0x02000000 );immr_unmap (clk_r2);
@@ -164,7 +140,7 @@ void __init mpc8xx_calibrate_decr(void)* we guarantee the registers are locked, then we unlock them * for our use. */ - sys_tmr1 = (sitk8xx_t *)immr_map (im_sitk); + sys_tmr1 =immr_map (im_sitk);out_be32 (&sys_tmr1->sitk_tbscrk, ~KAPWR_KEY );out_be32 (&sys_tmr1->sitk_rtcsck, ~KAPWR_KEY );out_be32 (&sys_tmr1->sitk_tbk, ~KAPWR_KEY );
@@ -184,20 +160,13 @@ void __init mpc8xx_calibrate_decr(void) virq=irq_of_parse_and_map (cpu,0 ); irq = irq_map[virq].hwirq; - sys_tmr2 = (sit8xx_t *)immr_map (im_sit); + sys_tmr2 =immr_map (im_sit);out_be16 (&sys_tmr2->sit_tbscr, ((1 << (7 - (irq/2 ))) <<8 ) | (TBSCR_TBF |TBSCR_TBE ));immr_unmap (sys_tmr2);if (setup_irq (virq, &tbint_irqaction))panic ("Could not allocate timer IRQ!" ); - -#ifdef CONFIG_8xx_WDT -/* Install watchdog timer handler early because it might be -* already enabled by the bootloader -*/ -m8xx_wdt_handler_install (binfo); -#endif }/* The RTC on the MPC8xx is an internal register.
@@ -207,12 +176,12 @@ void __init mpc8xx_calibrate_decr(void)int mpc8xx_set_rtc_time (struct rtc_time *tm) { -sitk8xx_t *sys_tmr1; -sit8xx_t *sys_tmr2; +sitk8xx_t __iomem *sys_tmr1; +sit8xx_t __iomem *sys_tmr2;int time; - sys_tmr1 = (sitk8xx_t *)immr_map (im_sitk); - sys_tmr2 = (sit8xx_t *)immr_map (im_sit); + sys_tmr1 =immr_map (im_sitk); + sys_tmr2 =immr_map (im_sit); time =mktime (tm->tm_year+1900 , tm->tm_mon+1 , tm->tm_mday, tm->tm_hour, tm->tm_min, tm->tm_sec);
@@ -228,7 +197,7 @@ int mpc8xx_set_rtc_time(struct rtc_time *tm)void mpc8xx_get_rtc_time (struct rtc_time *tm) {unsigned long data; -sit8xx_t *sys_tmr = (sit8xx_t *)immr_map (im_sit); +sit8xx_t __iomem *sys_tmr =immr_map (im_sit);/* Get time from the RTC. */ data =in_be32 (&sys_tmr->sit_rtc);
@@ -241,8 +210,7 @@ void mpc8xx_get_rtc_time(struct rtc_time *tm)void mpc8xx_restart (char *cmd) { - __volatile__ unsigned char dummy; -car8xx_t * clk_r = (car8xx_t *)immr_map (im_clkrst); +car8xx_t __iomem *clk_r =immr_map (im_clkrst);local_irq_disable ();
@@ -252,26 +220,8 @@ void mpc8xx_restart(char *cmd)*/ mtmsr (mfmsr () & ~0x1000 ); - dummy =in_8 (&clk_r->res[0 ]); -printk ("Restart failed\n" ); -while (1 ); -} - -void mpc8xx_show_cpuinfo (struct seq_file *m) -{ -struct device_node *root; -uint memsize = total_memory; -const char *model ="" ; - -seq_printf (m,"Vendor\t\t: Freescale Semiconductor\n" ); - - root =of_find_node_by_path ("/" ); -if (root) - model =of_get_property (root,"model" ,NULL ); -seq_printf (m,"Machine\t\t: %s\n" , model); -of_node_put (root); - -seq_printf (m,"Memory\t\t: %d MB\n" , memsize / (1024 *1024 )); +in_8 (&clk_r->res[0 ]); +panic ("Restart failed\n" ); }static void cpm_cascade (unsigned int irq,struct irq_desc *desc)
arch/powerpc/platforms/8xx/mpc86xads.h +0 -3
@@ -29,9 +29,6 @@#define CFG_PHYDEV_ADDR ((uint)0xff0a0000)#define BCSR5 ((uint)(CFG_PHYDEV_ADDR + 0x300)) -#define IMAP_ADDR (get_immrbase()) -#define IMAP_SIZE ((uint)(64 * 1024)) -#define MPC8xx_CPM_OFFSET (0x9c0)#define CPM_MAP_ADDR (get_immrbase() + MPC8xx_CPM_OFFSET)#define CPM_IRQ_OFFSET 16 // for compability with cpm_uart driver
arch/powerpc/platforms/8xx/mpc86xads_setup.c +1 -9
@@ -37,14 +37,7 @@#include <asm/fs_pd.h> #include <asm/prom.h> -extern void cpm_reset (void ); -extern void mpc8xx_show_cpuinfo (struct seq_file *); -extern void mpc8xx_restart (char *cmd); -extern void mpc8xx_calibrate_decr (void ); -extern int mpc8xx_set_rtc_time (struct rtc_time *tm); -extern void mpc8xx_get_rtc_time (struct rtc_time *tm); -extern void m8xx_pic_init (void ); -extern unsigned int mpc8xx_get_irq (void ); +#include <sysdev/commproc.h> static void init_smc1_uart_ioports (struct fs_uart_platform_info * fpi);static void init_smc2_uart_ioports (struct fs_uart_platform_info * fpi);
@@ -277,7 +270,6 @@ define_machine(mpc86x_ads) { .probe = mpc86xads_probe, .setup_arch = mpc86xads_setup_arch, .init_IRQ = m8xx_pic_init, - .show_cpuinfo = mpc8xx_show_cpuinfo, .get_irq = mpc8xx_get_irq, .restart = mpc8xx_restart, .calibrate_decr = mpc8xx_calibrate_decr,
arch/powerpc/platforms/8xx/mpc885ads.h +0 -3
@@ -29,9 +29,6 @@#define CFG_PHYDEV_ADDR ((uint)0xff0a0000)#define BCSR5 ((uint)(CFG_PHYDEV_ADDR + 0x300)) -#define IMAP_ADDR (get_immrbase()) -#define IMAP_SIZE ((uint)(64 * 1024)) -#define MPC8xx_CPM_OFFSET (0x9c0)#define CPM_MAP_ADDR (get_immrbase() + MPC8xx_CPM_OFFSET)#define CPM_IRQ_OFFSET 16 // for compability with cpm_uart driver
arch/powerpc/platforms/8xx/mpc885ads_setup.c +1 -10
@@ -38,15 +38,6 @@#include <asm/fs_pd.h> #include <asm/prom.h> -extern void cpm_reset (void ); -extern void mpc8xx_show_cpuinfo (struct seq_file *); -extern void mpc8xx_restart (char *cmd); -extern void mpc8xx_calibrate_decr (void ); -extern int mpc8xx_set_rtc_time (struct rtc_time *tm); -extern void mpc8xx_get_rtc_time (struct rtc_time *tm); -extern void m8xx_pic_init (void ); -extern unsigned int mpc8xx_get_irq (void ); -static void init_smc1_uart_ioports (struct fs_uart_platform_info *fpi);static void init_smc2_uart_ioports (struct fs_uart_platform_info *fpi);static void init_scc3_ioports (struct fs_platform_info *ptr);
@@ -428,7 +419,7 @@ define_machine(mpc885_ads) { .name = "MPC885 ADS",.probe = mpc885ads_probe,.setup_arch = mpc885ads_setup_arch,.init_IRQ = - m8xx_pic_init,.show_cpuinfo = mpc8xx_show_cpuinfo,.get_irq = + m8xx_pic_init,.get_irq = mpc8xx_get_irq,.restart = mpc8xx_restart,.calibrate_decr = mpc8xx_calibrate_decr,.set_rtc_time = mpc8xx_set_rtc_time,.get_rtc_time = mpc8xx_get_rtc_time,};
arch/powerpc/sysdev/commproc.c +38 -29
155 lines not on this page · raw message
arch/powerpc/sysdev/commproc.h new file +12 -0
@@ -0,0 +1,12 @@ +#ifndef _POWERPC_SYSDEV_COMMPROC_H +#define _POWERPC_SYSDEV_COMMPROC_H + +extern void cpm_reset (void ); +extern void mpc8xx_restart (char *cmd); +extern void mpc8xx_calibrate_decr (void ); +extern int mpc8xx_set_rtc_time (struct rtc_time *tm); +extern void mpc8xx_get_rtc_time (struct rtc_time *tm); +extern void m8xx_pic_init (void ); +extern unsigned int mpc8xx_get_irq (void ); + +#endif
arch/powerpc/sysdev/mpc8xx_pic.c +9 -10
@@ -22,7 +22,7 @@ extern int cpm_get_irq(struct pt_regs *regs);static struct irq_host *mpc8xx_pic_host;#define NR_MASK_WORDS ((NR_IRQS + 31) / 32)static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS ]; -static sysconf8xx_t *siu_reg; +static sysconf8xx_t __iomem *siu_reg;int cpm_get_irq (struct pt_regs *regs);
@@ -159,13 +159,14 @@ static struct irq_host_ops mpc8xx_pic_host_ops = {int mpc8xx_pic_init (void ) {struct resource res; -struct device_node *np =NULL ; +struct device_node *np;int ret; - np =of_find_node_by_type (np,"mpc8xx-pic" ); - + np =of_find_compatible_node (NULL ,NULL ,"fsl,pq1-pic" ); +if (np ==NULL ) + np =of_find_node_by_type (NULL ,"mpc8xx-pic" );if (np ==NULL ) { -printk (KERN_ERR "Could not find open-pic node\n" ); +printk (KERN_ERR "Could not find fsl,pq1-pic node\n" );return -ENOMEM ; }
@@ -173,11 +174,9 @@ int mpc8xx_pic_init(void)if (ret) goto out; - siu_reg = (void *)ioremap (res.start, res.end - res.start +1 ); -if (siu_reg ==NULL ) { - ret = -EINVAL ; - goto out; - } + siu_reg =ioremap (res.start, res.end - res.start +1 ); +if (siu_reg ==NULL ) +return -EINVAL ; mpc8xx_pic_host =irq_alloc_host (of_node_get (np),IRQ_HOST_MAP_LINEAR ,64 , &mpc8xx_pic_host_ops,64 );
include/asm-powerpc/commproc.h +3 -1
@@ -66,7 +66,7 @@/* Export the base address of the communication processor registers * and dual port ram. */ -extern cpm8xx_t *cpmp;/* Pointer to comm processor */ +extern cpm8xx_t __iomem *cpmp;/* Pointer to comm processor */ extern unsigned long cpm_dpalloc (uint size,uint align);extern int cpm_dpfree (unsigned long offset);extern unsigned long cpm_dpalloc_fixed (unsigned long offset,uint size,uint align);
@@ -689,4 +689,6 @@ typedef struct risc_timer_pram {extern void cpm_install_handler (int vec,void (*handler)(void *),void *dev_id);extern void cpm_free_handler (int vec); +#define IMAP_ADDR (get_immrbase()) +#endif /* __CPM_8XX__ */
include/asm-powerpc/fs_pd.h +4 -15
@@ -45,22 +45,11 @@#include <asm/8xx_immap.h> #include <asm/mpc8xx.h> -#define immr_map (member) \ -({ \ - u32 offset = offsetof(immap_t, member); \ - void *addr = ioremap (IMAP_ADDR + offset, \ - sizeof( ((immap_t*)0)->member)); \ - addr; \ -}) - -#define immr_map_size (member, size) \ -({ \ - u32 offset = offsetof(immap_t, member); \ - void *addr = ioremap (IMAP_ADDR + offset, size); \ - addr; \ -}) +extern immap_t __iomem *mpc8xx_immr; -#define immr_unmap (addr) iounmap(addr) +#define immr_map (member) (&mpc8xx_immr->member) +#define immr_map_size (member, size) (&mpc8xx_immr->member) +#define immr_unmap (addr) do {} while (0)#endif static inline int uart_baudrate (void )
Signature · 1 line
1.5.3.1
Re: [PATCH 13/28] 8xx: Infrastructure code cleanup.
Quoted 2 lines · Scott Wood
1. Keep a global
mpc8xx_immrmapping, rather than constantly creating temporary mappings.
Nice, but again, it seems a bit pointless to leave in all the immr_map() / immr_unmap() pairs now that they do basically nothing.
Signature · 4 lines
David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
Re: [PATCH 13/28] 8xx: Infrastructure code cleanup.
Quoted 6 lines · David Gibson
Quoted 2 lines · Scott Wood
1. Keep a global
mpc8xx_immrmapping, rather than constantly creating temporary mappings.Nice, but again, it seems a bit pointless to leave in all the
immr_map()/immr_unmap()pairs now that they do basically nothing.
One step at a time. :-)
Once arch/ppc is gone, I'd like to do some heavier cleanup of the CPM stuff, including merging with QE. For now, I want to touch code that's shared between the architectures as little as possible.
-Scott
PATCH 14/28 8xx: Add pin and clock setting functions.
In reply to Scott WoodThese let board code set up pins and clocks without having to put magic numbers directly into the registers.
The clock function is mostly duplicated from the cpm2 version; hopefully this stuff can be merged at some point.
Signed-off-by Scott Wood <[email protected]>
--- arch/powerpc/sysdev/commproc.c | 201 ++++++++++++++++++++++++++++++++++++++++ include/asm-powerpc/commproc.h | 49 ++++++++++ 2 files changed, 250 insertions(+), 0 deletions(-)
arch/powerpc/sysdev/commproc.c +201 -0
@@ -397,3 +397,204 @@ uint cpm_dpram_phys(u8 *addr)return (dpram_pbase + (uint)(addr - dpram_vbase)); }EXPORT_SYMBOL (cpm_dpram_addr); + +struct cpm_ioport16 { +__be16 dir, par, sor, dat, intr; +__be16 res[3 ]; +}; + +struct cpm_ioport32 { +__be32 dir, par, sor; +}; + +static void cpm1_set_pin32 (int port,int pin,int flags) +{ +struct cpm_ioport32 __iomem *iop; + pin =1 << (31 - pin); + +if (port ==CPM_PORTB ) + iop = (struct cpm_ioport32 __iomem *) + &mpc8xx_immr->im_cpm.cp_pbdir; +else + iop = (struct cpm_ioport32 __iomem *) + &mpc8xx_immr->im_cpm.cp_pedir; + +if (flags &CPM_PIN_OUTPUT ) +setbits32 (&iop->dir, pin); +else +clrbits32 (&iop->dir, pin); + +if (!(flags &CPM_PIN_GPIO )) +setbits32 (&iop->par, pin); +else +clrbits32 (&iop->par, pin); + +if (port ==CPM_PORTE ) { +if (flags &CPM_PIN_SECONDARY ) +setbits32 (&iop->sor, pin); +else +clrbits32 (&iop->sor, pin); + +if (flags &CPM_PIN_OPENDRAIN ) +setbits32 (&mpc8xx_immr->im_cpm.cp_peodr, pin); +else +clrbits32 (&mpc8xx_immr->im_cpm.cp_peodr, pin); + } +} + +static void cpm1_set_pin16 (int port,int pin,int flags) +{ +struct cpm_ioport16 __iomem *iop = + (struct cpm_ioport16 __iomem *)&mpc8xx_immr->im_ioport; + + pin =1 << (15 - pin); + +if (port !=0 ) + iop += port -1 ; + +if (flags &CPM_PIN_OUTPUT ) +setbits16 (&iop->dir, pin); +else +clrbits16 (&iop->dir, pin); + +if (!(flags &CPM_PIN_GPIO )) +setbits16 (&iop->par, pin); +else +clrbits16 (&iop->par, pin); + +if (port ==CPM_PORTC ) { +if (flags &CPM_PIN_SECONDARY ) +setbits16 (&iop->sor, pin); +else +clrbits16 (&iop->sor, pin); + } +} + +void cpm1_set_pin (enum cpm_port port,int pin,int flags) +{ +if (port ==CPM_PORTB || port ==CPM_PORTE ) +cpm1_set_pin32 (port, pin, flags); +else +cpm1_set_pin16 (port, pin, flags); +} + +int cpm1_clk_setup (enum cpm_clk_target target,int clock,int mode) +{ +int shift; +int i, bits =0 ; +u32 __iomem *reg; +u32 mask =7 ; + +u8 clk_map[][3 ] = { + {CPM_CLK_SCC1 ,CPM_BRG1 ,0 }, + {CPM_CLK_SCC1 ,CPM_BRG2 ,1 }, + {CPM_CLK_SCC1 ,CPM_BRG3 ,2 }, + {CPM_CLK_SCC1 ,CPM_BRG4 ,3 }, + {CPM_CLK_SCC1 ,CPM_CLK1 ,4 }, + {CPM_CLK_SCC1 ,CPM_CLK2 ,5 }, + {CPM_CLK_SCC1 ,CPM_CLK3 ,6 }, + {CPM_CLK_SCC1 ,CPM_CLK4 ,7 }, + + {CPM_CLK_SCC2 ,CPM_BRG1 ,0 }, + {CPM_CLK_SCC2 ,CPM_BRG2 ,1 }, + {CPM_CLK_SCC2 ,CPM_BRG3 ,2 }, + {CPM_CLK_SCC2 ,CPM_BRG4 ,3 }, + {CPM_CLK_SCC2 ,CPM_CLK1 ,4 }, + {CPM_CLK_SCC2 ,CPM_CLK2 ,5 }, + {CPM_CLK_SCC2 ,CPM_CLK3 ,6 }, + {CPM_CLK_SCC2 ,CPM_CLK4 ,7 }, + + {CPM_CLK_SCC3 ,CPM_BRG1 ,0 }, + {CPM_CLK_SCC3 ,CPM_BRG2 ,1 }, + {CPM_CLK_SCC3 ,CPM_BRG3 ,2 }, + {CPM_CLK_SCC3 ,CPM_BRG4 ,3 }, + {CPM_CLK_SCC3 ,CPM_CLK5 ,4 }, + {CPM_CLK_SCC3 ,CPM_CLK6 ,5 }, + {CPM_CLK_SCC3 ,CPM_CLK7 ,6 }, + {CPM_CLK_SCC3 ,CPM_CLK8 ,7 }, + + {CPM_CLK_SCC4 ,CPM_BRG1 ,0 }, + {CPM_CLK_SCC4 ,CPM_BRG2 ,1 }, + {CPM_CLK_SCC4 ,CPM_BRG3 ,2 }, + {CPM_CLK_SCC4 ,CPM_BRG4 ,3 }, + {CPM_CLK_SCC4 ,CPM_CLK5 ,4 }, + {CPM_CLK_SCC4 ,CPM_CLK6 ,5 }, + {CPM_CLK_SCC4 ,CPM_CLK7 ,6 }, + {CPM_CLK_SCC4 ,CPM_CLK8 ,7 }, + + {CPM_CLK_SMC1 ,CPM_BRG1 ,0 }, + {CPM_CLK_SMC1 ,CPM_BRG2 ,1 }, + {CPM_CLK_SMC1 ,CPM_BRG3 ,2 }, + {CPM_CLK_SMC1 ,CPM_BRG4 ,3 }, + {CPM_CLK_SMC1 ,CPM_CLK1 ,4 }, + {CPM_CLK_SMC1 ,CPM_CLK2 ,5 }, + {CPM_CLK_SMC1 ,CPM_CLK3 ,6 }, + {CPM_CLK_SMC1 ,CPM_CLK4 ,7 }, + + {CPM_CLK_SMC2 ,CPM_BRG1 ,0 }, + {CPM_CLK_SMC2 ,CPM_BRG2 ,1 }, + {CPM_CLK_SMC2 ,CPM_BRG3 ,2 }, + {CPM_CLK_SMC2 ,CPM_BRG4 ,3 }, + {CPM_CLK_SMC2 ,CPM_CLK5 ,4 }, + {CPM_CLK_SMC2 ,CPM_CLK6 ,5 }, + {CPM_CLK_SMC2 ,CPM_CLK7 ,6 }, + {CPM_CLK_SMC2 ,CPM_CLK8 ,7 }, + }; + +switch (target) { +case CPM_CLK_SCC1 : + reg = &mpc8xx_immr->im_cpm.cp_sicr; + shift =0 ; +break ; + +case CPM_CLK_SCC2 : + reg = &mpc8xx_immr->im_cpm.cp_sicr; + shift =8 ; +break ; + +case CPM_CLK_SCC3 : + reg = &mpc8xx_immr->im_cpm.cp_sicr; + shift =16 ; +break ; + +case CPM_CLK_SCC4 : + reg = &mpc8xx_immr->im_cpm.cp_sicr; + shift =24 ; +break ; + +case CPM_CLK_SMC1 : + reg = &mpc8xx_immr->im_cpm.cp_simode; + shift =12 ; +break ; + +case CPM_CLK_SMC2 : + reg = &mpc8xx_immr->im_cpm.cp_simode; + shift =28 ; +break ; + +default : +printk (KERN_ERR "cpm1_clock_setup: invalid clock target\n" ); +return -EINVAL ; + } + +if (reg == &mpc8xx_immr->im_cpm.cp_sicr && mode ==CPM_CLK_RX ) + shift +=3 ; + +for (i =0 ; i <ARRAY_SIZE (clk_map); i++) { +if (clk_map[i][0 ] == target && clk_map[i][1 ] == clock) { + bits = clk_map[i][2 ]; +break ; + } + } + +if (i ==ARRAY_SIZE (clk_map)) { +printk (KERN_ERR "cpm1_clock_setup: invalid clock combination\n" ); +return -EINVAL ; + } + + bits <<= shift; + mask <<= shift; +out_be32 (reg, (in_be32 (reg) & ~mask) | bits); + +return 0 ; +}
include/asm-powerpc/commproc.h +49 -0
53 lines not on this page · raw message
Signature · 1 line
1.5.3.1
PATCH 15/28 8xx: Work around CPU15 erratum.
In reply to Scott WoodThe CPU15 erratum on MPC8xx chips can cause incorrect code execution under certain circumstances, where there is a conditional or indirect branch in the last word of a page, with a target in the last cache line of the next page. This patch implements one of the suggested workarounds, by forcing a TLB miss whenever execution crosses a page boundary. This is done by invalidating the pages before and after the one being loaded into the TLB in the ITLB miss handler.
Signed-off-by Scott Wood <[email protected]>
--- arch/powerpc/kernel/head_8xx.S | 6 ++++++ arch/powerpc/platforms/8xx/Kconfig | 16 ++++++++++++++++ 2 files changed, 22 insertions(+), 0 deletions(-)
arch/powerpc/kernel/head_8xx.S +6 -0
@@ -298,6 +298,12 @@ InstructionTLBMiss: stw r10, 0(r0) stw r11, 4(r0) mfspr r10, SPRN_SRR0 /* Get effective address of fault */ +#ifdef CONFIG_8xx_CPU15 + addi r11, r10, 0x1000 + tlbie r11 + addi r11, r10, -0x1000 + tlbie r11 +#endif DO_8xx_CPU6(0x3780, r3) mtspr SPRN_MD_EPN, r10 /* Have to use MD_EPN for walk, MI_EPN can't */ mfspr r10, SPRN_M_TWB /* Get level 1 table entry address */
arch/powerpc/platforms/8xx/Kconfig +16 -0
@@ -100,6 +100,22 @@ config 8xx_CPU6 If in doubt, say N here. +config 8xx_CPU15 + bool "CPU15 Silicon Errata" + default y + help + This enables a workaround for erratum CPU15 on MPC8xx chips. + This bug can cause incorrect code execution under certain + circumstances. This workaround adds some overhead (a TLB miss + every time execution crosses a page boundary), and you may wish + to disable it if you have worked around the bug in the compiler + (by not placing conditional branches or branches to LR or CTR + in the last word of a page, with a target of the last cache + line in the next page), or if you have used some other + workaround. + + If in doubt, say Y here. + choice prompt "Microcode patch selection" default NO_UCODE_PATCH
Signature · 1 line
1.5.3.1
PATCH 16/28 8xx: Don't call non-existent Soft_emulate_8xx from SoftwareEmulation.
In reply to Scott WoodOn arch/ppc, Soft_emulate_8xx was used when full math emulation was turned off to emulate a minimal subset of floating point load/store instructions, to avoid needing a soft-float toolchain. This function is called, but not present, on arch/powerpc, causing a build error if floating point emulation is turned off.
As:
1. soft-float toolchains are now common,
2. partial emulation could mislead someone into thinking they have a soft-float userspace because things usually work, only to have it fail when actual FP gets executed under unusual circumstances, and
3. full emulation is still available for those who need to run non-soft-float userspace,
I'm deleting the call rather than moving Soft_emulate_8xx over to arch/powerpc.
Signed-off-by Scott Wood <[email protected]>
--- arch/powerpc/kernel/traps.c | 16 +++------------- 1 files changed, 3 insertions(+), 13 deletions(-)
arch/powerpc/kernel/traps.c +3 -13
@@ -896,9 +896,10 @@ void performance_monitor_exception(struct pt_regs *regs)#ifdef CONFIG_8xxvoid SoftwareEmulation (struct pt_regs *regs) { +#ifdef CONFIG_MATH_EMULATION extern int do_mathemu (struct pt_regs *); -extern int Soft_emulate_8xx (struct pt_regs *);int errcode; +#endif CHECK_FULL_REGS (regs);
@@ -929,18 +930,7 @@ void SoftwareEmulation(struct pt_regs *regs) }#else - errcode =Soft_emulate_8xx (regs); -switch (errcode) { -case 0 : -emulate_single_step (regs); -return ; -case 1 : -_exception (SIGILL , regs,ILL_ILLOPC , regs->nip); -return ; -case -EFAULT : -_exception (SIGSEGV , regs,SEGV_MAPERR , regs->nip); -return ; - } +_exception (SIGILL , regs,ILL_ILLOPC , regs->nip);#endif }#endif /* CONFIG_8xx */
Signature · 1 line
1.5.3.1
Re: [PATCH 16/28] 8xx: Don't call non-existent Soft_emulate_8xx from SoftwareEmulation.
Quoted 14 lines · Scott Wood
On
arch/ppc,Soft_emulate_8xxwas used when full math emulation was turned off to emulate a minimal subset of floating point load/store instructions, to avoid needing a soft-float toolchain. This function is called, but not present, onarch/powerpc, causing a build error if floating point emulation is turned off.As:
1. soft-float toolchains are now common,
2. partial emulation could mislead someone into thinking they have a soft-float userspace because things usually work, only to have it fail when actual FP gets executed under unusual circumstances, and
3. full emulation is still available for those who need to run non-soft-float userspace,
Quoted 4 lines
I'm deleting the call rather than moving
Soft_emulate_8xxover toarch/powerpc.Signed-off-by Scott Wood <[email protected]>
I'm still not in favor of this and think we should move the Soft_emulate_8xx code over.
- k
Re: [PATCH 16/28] 8xx: Don't call non-existent Soft_emulate_8xx from SoftwareEmulation.
Quoted 17 lines · Kumar Gala
Quoted 14 lines · Scott Wood
On
arch/ppc,Soft_emulate_8xxwas used when full math emulation was turned off to emulate a minimal subset of floating point load/store instructions, to avoid needing a soft-float toolchain. This function is called, but not present, onarch/powerpc, causing a build error if floating point emulation is turned off.As:
1. soft-float toolchains are now common,
2. partial emulation could mislead someone into thinking they have a soft-float userspace because things usually work, only to have it fail when actual FP gets executed under unusual circumstances, and
3. full emulation is still available for those who need to run non-soft-float userspace,
Quoted 7 lines
Quoted 4 lines
I'm deleting the call rather than moving
Soft_emulate_8xxover toarch/powerpc.Signed-off-by Scott Wood <[email protected]>I'm still not in favor of this and think we should move the
Soft_emulate_8xxcode over.
Any particular reasons that outweigh the reasons I gave, especially #2?
-Scott
Re: [PATCH 16/28] 8xx: Don't call non-existent Soft_emulate_8xx from SoftwareEmulation.
Quoted 21 lines · Scott Wood
Quoted 20 lines · Kumar Gala
Quoted 17 lines · Scott Wood
On
arch/ppc,Soft_emulate_8xxwas used when full math emulation was turned off to emulate a minimal subset of floating point load/store instructions, to avoid needing a soft-float toolchain. This function is called, but not present, onarch/powerpc, causing a build error if floating point emulation is turned off.As:
1. soft-float toolchains are now common,
2. partial emulation could mislead someone into thinking they have a soft-float userspace because things usually work, only to have it fail when actual FP gets executed under unusual circumstances, and
3. full emulation is still available for those who need to run non-soft-float userspace,I'm deleting the call rather than moving
Soft_emulate_8xxover toarch/powerpc.
Quoted 6 lines
Quoted 4 lines
Quoted 1 line
Signed-off-by Scott Wood <[email protected]>I'm still not in favor of this and think we should move the
Soft_emulate_8xxcode over.Any particular reasons that outweigh the reasons I gave, especially #2?
Mainly that 8xx has been doing this for a vast number of years and I see no reason to stop doing it at this point.
While I can see that it might be misleading, clearly 8xx linux users haven't had issues with it.
- k
Re: [PATCH 16/28] 8xx: Don't call non-existent Soft_emulate_8xx from SoftwareEmulation.
Quoted 5 lines · Kumar Gala
Mainly that 8xx has been doing this for a vast number of years and I see no reason to stop doing it at this point.
While I can see that it might be misleading, clearly 8xx linux users haven't had issues with it.
Or they haven't said anything. :-P
How about a three-way choice of full emulation, minimal emulation, and no emulation?
-Scott
Re: [PATCH 16/28] 8xx: Don't call non-existent Soft_emulate_8xx from SoftwareEmulation.
Quoted 8 lines · Scott Wood
Quoted 5 lines · Kumar Gala
Mainly that 8xx has been doing this for a vast number of years and I see no reason to stop doing it at this point.
While I can see that it might be misleading, clearly 8xx linux users haven't had issues with it.
Or they haven't said anything. :-P
:)
Quoted 2 lines
How about a three-way choice of full emulation, minimal emulation, and no emulation?
I think I'd be ok with that.
- k
PATCH 17/28 8xx: Set initial memory limit.
In reply to Scott WoodFrom: John Traill <[email protected]>
The 8xx can only support a max of 8M during early boot (it seems a lot of 8xx boards only have 8M so the bug was never triggered), but the early allocator isn't aware of this. The following change makes it able to run with larger memory.
Signed-off-by Vitaly Bordug <[email protected]>
Signed-off-by Scott Wood <[email protected]>
--- arch/powerpc/mm/init_32.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-)
arch/powerpc/mm/init_32.c +3 -0
@@ -132,6 +132,9 @@ void __init MMU_init(void)/* 601 can only access 16MB at the moment */ if (PVR_VER (mfspr (SPRN_PVR )) ==1 ) __initial_memory_limit =0x01000000 ; +/* 8xx can only access 8MB at the moment */ +if (PVR_VER (mfspr (SPRN_PVR )) ==0x50 ) + __initial_memory_limit =0x00800000 ;/* parse args from command line */ MMU_setup ();
Signature · 1 line
1.5.3.1
PATCH 18/28 8xx: mpc885ads cleanup
In reply to Scott WoodIt now uses the new CPM binding and the generic pin/clock functions, and has assorted fixes and cleanup.
Signed-off-by Scott Wood <[email protected]>
--- arch/powerpc/boot/dts/mpc885ads.dts | 195 +++++++----- arch/powerpc/configs/mpc885_ads_defconfig | 297 +++++++++-------- arch/powerpc/platforms/8xx/Kconfig | 1 + arch/powerpc/platforms/8xx/mpc885ads.h | 38 --- arch/powerpc/platforms/8xx/mpc885ads_setup.c | 450 +++++++++----------------- 5 files changed, 423 insertions(+), 558 deletions(-)
arch/powerpc/boot/dts/mpc885ads.dts +114 -81
@@ -2,6 +2,7 @@ * MPC885 ADS Device Tree Source * * Copyright 2006 MontaVista Software, Inc. + * Copyright 2007 Freescale Semiconductor, Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the
@@ -12,7 +13,7 @@ / { model = "MPC885ADS"; - compatible = "mpc8xx"; + compatible = "fsl,mpc885ads"; #address-cells = <1>; #size-cells = <1>;
@@ -23,156 +24,188 @@ PowerPC,885@0 { device_type = "cpu"; reg = <0>; - d-cache-line-size = <20>; // 32 bytes - i-cache-line-size = <20>; // 32 bytes - d-cache-size = <2000>; // L1, 8K - i-cache-size = <2000>; // L1, 8K + d-cache-line-size = <d#16>; + i-cache-line-size = <d#16>; + d-cache-size = <d#8192>; + i-cache-size = <d#8192>; timebase-frequency = <0>; bus-frequency = <0>; clock-frequency = <0>; interrupts = <f 2>; // decrementer interrupt - interrupt-parent = <&Mpc8xx_pic>; + interrupt-parent = <&PIC>; }; }; memory { device_type = "memory"; - reg = <00000000 800000>; + reg = <0 0>; }; - soc885@ff000000 { + localbus@ff000100 { + compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus"; + #address-cells = <2>; + #size-cells = <1>; + reg = <ff000100 40>; + + ranges = < + 0 0 fe000000 00800000 + 1 0 ff080000 00008000 + 5 0 ff0a0000 00008000 + >; + + flash@0,0 { + compatible = "jedec-flash"; + reg = <0 0 800000>; + bank-width = <4>; + device-width = <1>; + }; + + board-control@1,0 { + reg = <1 0 20 5 300 4>; + compatible = "fsl,mpc885ads-bcsr"; + }; + }; + + soc@ff000000 { + compatible = "fsl,mpc885", "fsl,pq1-soc"; #address-cells = <1>; #size-cells = <1>; device_type = "soc"; - ranges = <0 ff000000 00100000>; - reg = <ff000000 00000200>; + ranges = <0 ff000000 00004000>; bus-frequency = <0>; - mdio@e80 { - device_type = "mdio"; - compatible = "fs_enet"; - reg = <e80 8>; + + // Temporary -- will go away once kernel uses ranges for get_immrbase(). + reg = <ff000000 4000>; + + mdio@e00 { + compatible = "fsl,mpc885-fec-mdio", "fsl,pq1-fec-mdio"; + reg = <e00 188>; #address-cells = <1>; #size-cells = <0>; - Phy0: ethernet-phy@0 { + + PHY0: ethernet-phy@0 { reg = <0>; device_type = "ethernet-phy"; }; - Phy1: ethernet-phy@1 { + + PHY1: ethernet-phy@1 { reg = <1>; device_type = "ethernet-phy"; }; - Phy2: ethernet-phy@2 { + + PHY2: ethernet-phy@2 { reg = <2>; device_type = "ethernet-phy"; }; }; - fec@e00 { + ethernet@e00 { device_type = "network"; - compatible = "fs_enet"; - model = "FEC"; - device-id = <1>; + compatible = "fsl,mpc885-fec-enet", + "fsl,pq1-fec-enet"; reg = <e00 188>; - mac-address = [ 00 00 0C 00 01 FD ]; + local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <3 1>; - interrupt-parent = <&Mpc8xx_pic>; - phy-handle = <&Phy1>; + interrupt-parent = <&PIC>; + phy-handle = <&PHY0>; + linux,network-index = <0>; }; - fec@1e00 { + ethernet@1e00 { device_type = "network"; - compatible = "fs_enet"; - model = "FEC"; - device-id = <2>; + compatible = "fsl,mpc885-fec-enet", + "fsl,pq1-fec-enet"; reg = <1e00 188>; - mac-address = [ 00 00 0C 00 02 FD ]; + local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <7 1>; - interrupt-parent = <&Mpc8xx_pic>; - phy-handle = <&Phy2>; + interrupt-parent = <&PIC>; + phy-handle = <&PHY1>; + linux,network-index = <1>; }; - Mpc8xx_pic: pic@ff000000 { + PIC: interrupt-controller@0 { interrupt-controller; - #address-cells = <0>; #interrupt-cells = <2>; reg = <0 24>; - device_type = "mpc8xx-pic"; - compatible = "CPM"; + compatible = "fsl,mpc885-pic", "fsl,pq1-pic"; }; - pcmcia@0080 { + pcmcia@80 { #address-cells = <3>; #interrupt-cells = <1>; #size-cells = <2>; compatible = "fsl,pq-pcmcia"; device_type = "pcmcia"; reg = <80 80>; - interrupt-parent = <&Mpc8xx_pic>; + interrupt-parent = <&PIC>; interrupts = <d 1>; }; - cpm@ff000000 { + cpm@9c0 { #address-cells = <1>; #size-cells = <1>; - device_type = "cpm"; - model = "CPM"; - ranges = <0 0 4000>; - reg = <860 f0>; + compatible = "fsl,mpc885-cpm", "fsl,cpm1"; command-proc = <9c0>; - brg-frequency = <0>; - interrupts = <0 2>; // cpm error interrupt - interrupt-parent = <&Cpm_pic>; + interrupts = <0>; // cpm error interrupt + interrupt-parent = <&CPM_PIC>; + reg = <9c0 40 2000 1c00>; + ranges; - Cpm_pic: pic@930 { + brg@9f0 { + compatible = "fsl,mpc885-brg", + "fsl,cpm1-brg", + "fsl,cpm-brg"; + reg = <9f0 10>; + }; + + CPM_PIC: interrupt-controller@930 { interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; + #interrupt-cells = <1>; interrupts = <5 2 0 2>; - interrupt-parent = <&Mpc8xx_pic>; + interrupt-parent = <&PIC>; reg = <930 20>; - device_type = "cpm-pic"; - compatible = "CPM"; + compatible = "fsl,mpc885-cpm-pic", + "fsl,cpm1-pic"; }; - smc@a80 { + serial@a80 { device_type = "serial"; - compatible = "cpm_uart"; - model = "SMC"; - device-id = <1>; + compatible = "fsl,mpc885-smc-uart", + "fsl,cpm1-smc-uart"; reg = <a80 10 3e80 40>; - clock-setup = <00ffffff 0>; - rx-clock = <1>; - tx-clock = <1>; - current-speed = <0>; - interrupts = <4 3>; - interrupt-parent = <&Cpm_pic>; + interrupts = <4>; + interrupt-parent = <&CPM_PIC>; + fsl,cpm-brg = <1>; + fsl,cpm-command = <0090>; }; - smc@a90 { + serial@a90 { device_type = "serial"; - compatible = "cpm_uart"; - model = "SMC"; - device-id = <2>; - reg = <a90 20 3f80 40>; - clock-setup = <ff00ffff 90000>; - rx-clock = <2>; - tx-clock = <2>; - current-speed = <0>; - interrupts = <3 3>; - interrupt-parent = <&Cpm_pic>; + compatible = "fsl,mpc885-smc-uart", + "fsl,cpm1-smc-uart"; + reg = <a90 10 3f80 40>; + interrupts = <3>; + interrupt-parent = <&CPM_PIC>; + fsl,cpm-brg = <2>; + fsl,cpm-command = <00d0>; }; - scc@a40 { + ethernet@a40 { device_type = "network"; - compatible = "fs_enet"; - model = "SCC"; - device-id = <3>; - reg = <a40 18 3e00 80>; - mac-address = [ 00 00 0C 00 03 FD ]; - interrupts = <1c 3>; - interrupt-parent = <&Cpm_pic>; - phy-handle = <&Phy2>; + compatible = "fsl,mpc885-scc-enet", + "fsl,cpm1-scc-enet"; + reg = <a40 18 3e00 100>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <1c>; + interrupt-parent = <&CPM_PIC>; + phy-handle = <&PHY2>; + fsl,cpm-command = <0080>; + linux,network-index = <2>; }; }; }; + + chosen { + linux,stdout-path = "/soc/cpm/serial@a80"; + }; };
arch/powerpc/configs/mpc885_ads_defconfig +153 -144
478 lines not on this page · raw message
arch/powerpc/platforms/8xx/Kconfig +1 -0
@@ -26,6 +26,7 @@ config MPC86XADS config MPC885ADS bool "MPC885ADS" select CPM1 + select PPC_CPM_NEW_BINDING help Freescale Semiconductor MPC885 Application Development System (ADS). Also known as DUET.
arch/powerpc/platforms/8xx/mpc885ads.h +0 -38
@@ -17,25 +17,10 @@#include <sysdev/fsl_soc.h> -/* U-Boot maps BCSR to 0xff080000 */ -#define BCSR_ADDR ((uint)0xff080000) -#define BCSR_SIZE ((uint)32) -#define BCSR0 ((uint)(BCSR_ADDR + 0x00)) -#define BCSR1 ((uint)(BCSR_ADDR + 0x04)) -#define BCSR2 ((uint)(BCSR_ADDR + 0x08)) -#define BCSR3 ((uint)(BCSR_ADDR + 0x0c)) -#define BCSR4 ((uint)(BCSR_ADDR + 0x10)) - -#define CFG_PHYDEV_ADDR ((uint)0xff0a0000) -#define BCSR5 ((uint)(CFG_PHYDEV_ADDR + 0x300)) -#define MPC8xx_CPM_OFFSET (0x9c0)#define CPM_MAP_ADDR (get_immrbase() + MPC8xx_CPM_OFFSET)#define CPM_IRQ_OFFSET 16 // for compability with cpm_uart driver -#define PCMCIA_MEM_ADDR ((uint)0xff020000) -#define PCMCIA_MEM_SIZE ((uint)(64 * 1024)) -/* Bits of interest in the BCSRs. */ #define BCSR1_ETHEN ((uint)0x20000000)
@@ -64,28 +49,5 @@#define BCSR5_MII1_EN 0x02#define BCSR5_MII1_RST 0x01 -/* Interrupt level assignments */ -#define PHY_INTERRUPT SIU_IRQ7/* PHY link change interrupt */ -#define SIU_INT_FEC1 SIU_LEVEL1/* FEC1 interrupt */ -#define SIU_INT_FEC2 SIU_LEVEL3/* FEC2 interrupt */ -#define FEC_INTERRUPT SIU_INT_FEC1/* FEC interrupt */ - -/* We don't use the 8259 */ -#define NR_8259_INTS 0 - -/* CPM Ethernet through SCC3 */ -#define PA_ENET_RXD ((ushort)0x0040) -#define PA_ENET_TXD ((ushort)0x0080) -#define PE_ENET_TCLK ((uint)0x00004000) -#define PE_ENET_RCLK ((uint)0x00008000) -#define PE_ENET_TENA ((uint)0x00000010) -#define PC_ENET_CLSN ((ushort)0x0400) -#define PC_ENET_RENA ((ushort)0x0800) - -/* Control bits in the SICR to route TCLK (CLK5) and RCLK (CLK6) to -* SCC3. Also, make sure GR3 (bit 8) and SC3 (bit 9) are zero */ -#define SICR_ENET_MASK ((uint)0x00ff0000) -#define SICR_ENET_CLKRT ((uint)0x002c0000) -#endif /* __ASM_MPC885ADS_H__ */ #endif /* __KERNEL__ */
arch/powerpc/platforms/8xx/mpc885ads_setup.c +155 -295
535 lines not on this page · raw message
Signature · 1 line
1.5.3.1
Re: [PATCH 18/28] 8xx: mpc885ads cleanup
arch/powerpc/platforms/8xx/mpc885ads_setup.c line 40
Quoted 5 lines · On Mon, 17 Sep 2007 11:58:05 -0500 Scott Wood <[email protected]> wrote:
+++
b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
#include <asm/fs_pd.h>arch/powerpc/platforms/8xx/mpc885ads_setup.c +1
-1-#include <asm/prom.h> +#include <asm/of_platform.h>
linux/of_platform.h
Sorry if I am getting boring.
Signature · 3 lines
Cheers, Stephen Rothwell [email protected] http://www.canb.auug.org.au/~sfr/
PATCH 19/28 8xx: Embedded Planet EP88xC support
In reply to Scott WoodThis board is also resold by Freescale under the names "QUICCStart MPC885 Evaluation System" and "CWH-PPC-885XN-VE".
Signed-off-by Scott Wood <[email protected]>
--- arch/powerpc/boot/Makefile | 4 +- arch/powerpc/boot/dts/ep88xc.dts | 203 +++++++++ arch/powerpc/boot/ep88xc.c | 54 +++ arch/powerpc/boot/fixed-head.S | 4 + arch/powerpc/boot/wrapper | 20 +- arch/powerpc/configs/ep88xc_defconfig | 751 +++++++++++++++++++++++++++++++++ arch/powerpc/platforms/8xx/Kconfig | 10 + arch/powerpc/platforms/8xx/Makefile | 1 + arch/powerpc/platforms/8xx/ep88xc.c | 176 ++++++++ 9 files changed, 1216 insertions(+), 7 deletions(-) create mode 100644 arch/powerpc/boot/dts/ep88xc.dts create mode 100644 arch/powerpc/boot/ep88xc.c create mode 100644 arch/powerpc/boot/fixed-head.S create mode 100644 arch/powerpc/configs/ep88xc_defconfig create mode 100644 arch/powerpc/platforms/8xx/ep88xc.c
arch/powerpc/boot/Makefile +3 -1
@@ -49,7 +49,8 @@ src-wlib := string.S crt0.S stdio.c main.c flatdevtree.c flatdevtree_misc.c \ src-plat := of.c cuboot-83xx.c cuboot-85xx.c holly.c \ cuboot-ebony.c treeboot-ebony.c prpmc2800.c \ ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \ - cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c + cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c fixed-head.S \ + ep88xc.c src-boot := $(src-wlib) $(src-plat) empty.c src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -142,6 +143,7 @@ image-$(CONFIG_DEFAULT_UIMAGE) += uImage ifneq ($(CONFIG_DEVICE_TREE),"") image-$(CONFIG_PPC_8xx) += cuImage.8xx +image-$(CONFIG_PPC_EP88XC) += zImage.ep88xc image-$(CONFIG_8260) += cuImage.pq2 image-$(CONFIG_PPC_83xx) += cuImage.83xx image-$(CONFIG_PPC_85xx) += cuImage.85xx
arch/powerpc/boot/dts/ep88xc.dts new file +203 -0
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arch/powerpc/boot/ep88xc.c new file +54 -0
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arch/powerpc/boot/fixed-head.S new file +4 -0
@@ -0,0 +1,4 @@ + .text + .global _zimage_start +_zimage_start: + b _zimage_start_lib
arch/powerpc/boot/wrapper +14 -6
@@ -29,6 +29,7 @@ initrd= dtb= dts= cacheit= +binary= gzip=.gz # cross-compilation prefix
@@ -142,17 +143,23 @@ miboot|uboot) isection=initrd ;; cuboot*) + binary=y gzip= ;; ps3) platformo="$object/ps3-head.o $object/ps3-hvcall.o $object/ps3.o" lds=$object/zImage.ps3.lds + binary=y gzip= ext=bin objflags="-O binary --set-section-flags=.bss=contents,alloc,load,data" ksection=.kernel:vmlinux.bin isection=.kernel:initrd ;; +ep88xc) + platformo="$object/fixed-head.o $object/$platform.o" + binary=y + ;; esac vmz="$tmpdir/`basename \"$kernel\"`.$ext"
@@ -224,6 +231,11 @@ fi base=0x`${CROSS}nm "$ofile" | grep ' _start$' | cut -d' ' -f1` entry=`${CROSS}objdump -f "$ofile" | grep '^start address ' | cut -d' ' -f3` +if [ -n "$binary" ]; then + mv "$ofile" "$ofile".elf + ${CROSS}objcopy -O binary "$ofile".elf "$ofile".bin +fi + # post-processing needed for some platforms case "$platform" in pseries|chrp)
@@ -234,8 +246,6 @@ coff) $object/hack-coff "$ofile" ;; cuboot*) - mv "$ofile" "$ofile".elf - ${CROSS}objcopy -O binary "$ofile".elf "$ofile".bin gzip -f -9 "$ofile".bin mkimage -A ppc -O linux -T kernel -C gzip -a "$base" -e "$entry" \ $uboot_version -d "$ofile".bin.gz "$ofile"
@@ -259,11 +269,11 @@ ps3) # then copied to offset 0x100. At runtime the bootwrapper program # copies the 0x100 bytes at __system_reset_kernel to addr 0x100. - system_reset_overlay=0x`${CROSS}nm "$ofile" \ + system_reset_overlay=0x`${CROSS}nm "$ofile".elf \ | grep ' __system_reset_overlay$' \ | cut -d' ' -f1` system_reset_overlay=`printf "%d" $system_reset_overlay` - system_reset_kernel=0x`${CROSS}nm "$ofile" \ + system_reset_kernel=0x`${CROSS}nm "$ofile".elf \ | grep ' __system_reset_kernel$' \ | cut -d' ' -f1` system_reset_kernel=`printf "%d" $system_reset_kernel`
@@ -272,8 +282,6 @@ ps3) rm -f "$object/otheros.bld" - ${CROSS}objcopy -O binary "$ofile" "$ofile.bin" - msg=$(dd if="$ofile.bin" of="$ofile.bin" conv=notrunc \ skip=$overlay_dest seek=$system_reset_kernel \ count=$overlay_size bs=1 2>&1)
arch/powerpc/configs/ep88xc_defconfig new file +751 -0
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arch/powerpc/platforms/8xx/Kconfig +10 -0
@@ -33,6 +33,16 @@ config MPC885ADS The MPC885ADS is meant to serve as a platform for s/w and h/w development around the MPC885 processor family. +config PPC_EP88XC + bool "Embedded Planet EP88xC (a.k.a. CWH-PPC-885XN-VE)" + select CPM1 + select PPC_CPM_NEW_BINDING + help + This enables support for the Embedded Planet EP88xC board. + + This board is also resold by Freescale as the QUICCStart + MPC885 Evaluation System and/or the CWH-PPC-885XN-VE. + endchoice menu "Freescale Ethernet driver platform-specific options"
arch/powerpc/platforms/8xx/Makefile +1 -0
@@ -4,3 +4,4 @@ obj-$(CONFIG_PPC_8xx) += m8xx_setup.o obj-$(CONFIG_MPC885ADS) += mpc885ads_setup.o obj-$(CONFIG_MPC86XADS) += mpc86xads_setup.o +obj-$(CONFIG_PPC_EP88XC) += ep88xc.o
arch/powerpc/platforms/8xx/ep88xc.c new file +176 -0
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Signature · 1 line
1.5.3.1
PATCH 20/28 cpm2: Infrastructure code cleanup.
In reply to Scott WoodMostly sparse fixes (__iomem annotations, etc); also, cpm2_immr is used rather than creating many temporary mappings.
Signed-off-by Scott Wood <[email protected]>
--- arch/powerpc/sysdev/cpm2_common.c | 52 ++++++++++++++++++++++++++---------- arch/powerpc/sysdev/cpm2_pic.c | 2 +- include/asm-powerpc/cpm2.h | 2 +- include/asm-powerpc/fs_pd.h | 19 ++----------- include/asm-powerpc/immap_cpm2.h | 4 ++- 5 files changed, 45 insertions(+), 34 deletions(-)
arch/powerpc/sysdev/cpm2_common.c +37 -15
@@ -33,6 +33,8 @@#include <linux/mm.h> #include <linux/interrupt.h> #include <linux/module.h> +#include <linux/of.h> +#include <asm/io.h> #include <asm/irq.h> #include <asm/mpc8260.h>
@@ -45,13 +47,12 @@#include <sysdev/fsl_soc.h> static void cpm2_dpinit (void ); -cpm_cpm2_t *cpmp;/* Pointer to comm processor space */ +cpm_cpm2_t __iomem *cpmp;/* Pointer to comm processor space */ /* We allocate this here because it is used almost exclusively for * the communication processor devices. */ -cpm2_map_t *cpm2_immr; -intctl_cpm2_t *cpm2_intctl; +cpm2_map_t __iomem *cpm2_immr;#define CPM_MAP_SIZE (0x40000)/* 256k - the PQ3 reserve this amount of space for CPM as it is larger
@@ -60,8 +61,7 @@ intctl_cpm2_t *cpm2_intctl;void cpm2_reset (void ) { - cpm2_immr = (cpm2_map_t *)ioremap (CPM_MAP_ADDR ,CPM_MAP_SIZE ); - cpm2_intctl =cpm2_map (im_intctl); + cpm2_immr =ioremap (get_immrbase (),CPM_MAP_SIZE );/* Reclaim the DP memory for our use. */
@@ -91,7 +91,7 @@ cpm2_reset(void)void cpm_setbrg (uint brg,uint rate) { -volatile uint *bp; +u32 __iomem *bp;/* This is good enough to get SMCs running..... */
@@ -113,7 +113,8 @@ cpm_setbrg(uint brg, uint rate)void cpm2_fastbrg (uint brg,uint rate,int div16) { -volatile uint *bp; +u32 __iomem *bp; +u32 val;if (brg <4 ) { bp =cpm2_map_size (im_brgc1,16 );
@@ -123,10 +124,11 @@ cpm2_fastbrg(uint brg, uint rate, int div16) brg -=4 ; } bp += brg; - *bp = ((BRG_INT_CLK / rate) <<1 ) |CPM_BRG_EN ; + val = ((BRG_INT_CLK / rate) <<1 ) |CPM_BRG_EN ;if (div16) - *bp |=CPM_BRG_DIV16 ; + val |=CPM_BRG_DIV16 ; +out_be32 (bp, val);cpm2_unmap (bp); }
@@ -135,8 +137,8 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode)int ret =0 ;int shift;int i, bits =0 ; -cpmux_t *im_cpmux; -u32 *reg; +cpmux_t __iomem *im_cpmux; +u32 __iomem *reg;u32 mask =7 ;u8 clk_map [24 ][3 ] = { {CPM_CLK_FCC1 ,CPM_BRG5 ,0 },
@@ -228,13 +230,33 @@ static spinlock_t cpm_dpmem_lock;* until the memory subsystem goes up... */ static rh_block_t cpm_boot_dpmem_rh_block[16 ];static rh_info_t cpm_dpmem_info; -static u8 * im_dprambase; +static u8 __iomem *im_dprambase;static void cpm2_dpinit (void ) { -spin_lock_init (&cpm_dpmem_lock); +struct resource r; + +#ifdef CONFIG_PPC_CPM_NEW_BINDING +struct device_node *np; + + np =of_find_compatible_node (NULL ,NULL ,"fsl,cpm2" ); +if (!np) +panic ("Cannot find CPM2 node" ); - im_dprambase =ioremap (CPM_MAP_ADDR ,CPM_DATAONLY_BASE +CPM_DATAONLY_SIZE ); +if (of_address_to_resource (np,1 , &r)) +panic ("Cannot get CPM2 resource 1" ); + +of_node_put (np); +#else + r.start =CPM_MAP_ADDR +CPM_DATAONLY_BASE ; + r.end = r.start +CPM_DATAONLY_SIZE -1 ; +#endif + + im_dprambase =ioremap (r.start, r.end - r.start +1 ); +if (!im_dprambase) +panic ("Cannot map DPRAM" ); + +spin_lock_init (&cpm_dpmem_lock);/* initialize the info header */ rh_init(&cpm_dpmem_info, 1,
@@ -248,7 +270,7 @@ static void cpm2_dpinit(void)* varies with the processor and the microcode patches activated. * But the following should be at least safe. */ -rh_attach_region (&cpm_dpmem_info,CPM_DATAONLY_BASE ,CPM_DATAONLY_SIZE ); +rh_attach_region (&cpm_dpmem_info,0 , r.end - r.start +1 ); }/* This function returns an index into the DPRAM area.
arch/powerpc/sysdev/cpm2_pic.c +1 -1
@@ -48,7 +48,7 @@#define CPM2_IRQ_PORTC15 48#define CPM2_IRQ_PORTC0 63 -static intctl_cpm2_t *cpm2_intctl; +static intctl_cpm2_t __iomem *cpm2_intctl;static struct irq_host *cpm2_pic_host;#define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
include/asm-powerpc/cpm2.h +1 -1
@@ -107,7 +107,7 @@/* Export the base address of the communication processor registers * and dual port ram. */ -extern cpm_cpm2_t *cpmp;/* Pointer to comm processor */ +extern cpm_cpm2_t __iomem *cpmp;/* Pointer to comm processor */ extern unsigned long cpm_dpalloc (uint size,uint align);extern int cpm_dpfree (unsigned long offset);
include/asm-powerpc/fs_pd.h +3 -16
@@ -23,22 +23,9 @@#include <asm/mpc85xx.h> #endif -#define cpm2_map (member) \ -({ \ - u32 offset = offsetof(cpm2_map_t, member); \ - void *addr = ioremap (CPM_MAP_ADDR + offset, \ - sizeof( ((cpm2_map_t*)0)->member)); \ - addr; \ -}) - -#define cpm2_map_size (member, size) \ -({ \ - u32 offset = offsetof(cpm2_map_t, member); \ - void *addr = ioremap (CPM_MAP_ADDR + offset, size); \ - addr; \ -}) - -#define cpm2_unmap (addr) iounmap(addr) +#define cpm2_map (member) (&cpm2_immr->member) +#define cpm2_map_size (member, size) (&cpm2_immr->member) +#define cpm2_unmap (addr) do {} while(0)#endif #ifdef CONFIG_8xx
include/asm-powerpc/immap_cpm2.h +3 -1
@@ -10,6 +10,8 @@ #ifndef __IMMAP_CPM2__ #define __IMMAP_CPM2__ +#include <linux/types.h> + /* System configuration registers. */ typedef struct sys_82xx_conf {
@@ -642,7 +644,7 @@ typedef struct immap {u8 res11[4096 ]; } cpm2_map_t; -extern cpm2_map_t *cpm2_immr; +extern cpm2_map_t __iomem *cpm2_immr;#endif /* __IMMAP_CPM2__ */ #endif /* __KERNEL__ */
Signature · 1 line
1.5.3.1
PATCH 21/28 cpm2: Add SCCs to cpm2_clk_setup(), and cpm2_smc_clk_setup().
In reply to Scott WoodSigned-off-by Scott Wood <[email protected]>
--- arch/powerpc/sysdev/cpm2_common.c | 100 +++++++++++++++++++++++++++++++++++-- include/asm-powerpc/cpm2.h | 5 ++- 2 files changed, 99 insertions(+), 6 deletions(-)
arch/powerpc/sysdev/cpm2_common.c +95 -5
@@ -140,7 +140,8 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode)cpmux_t __iomem *im_cpmux;u32 __iomem *reg;u32 mask =7 ; -u8 clk_map [24 ][3 ] = { + +u8 clk_map[][3 ] = { {CPM_CLK_FCC1 ,CPM_BRG5 ,0 }, {CPM_CLK_FCC1 ,CPM_BRG6 ,1 }, {CPM_CLK_FCC1 ,CPM_BRG7 ,2 },
@@ -164,8 +165,40 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode) {CPM_CLK_FCC3, CPM_CLK13, 4}, {CPM_CLK_FCC3, CPM_CLK14, 5}, {CPM_CLK_FCC3, CPM_CLK15, 6}, - {CPM_CLK_FCC3, CPM_CLK16, 7} - }; + {CPM_CLK_FCC3, CPM_CLK16, 7}, + {CPM_CLK_SCC1, CPM_BRG1, 0}, + {CPM_CLK_SCC1, CPM_BRG2, 1}, + {CPM_CLK_SCC1, CPM_BRG3, 2}, + {CPM_CLK_SCC1, CPM_BRG4, 3}, + {CPM_CLK_SCC1, CPM_CLK11, 4}, + {CPM_CLK_SCC1, CPM_CLK12, 5}, + {CPM_CLK_SCC1, CPM_CLK3, 6}, + {CPM_CLK_SCC1, CPM_CLK4, 7}, + {CPM_CLK_SCC2, CPM_BRG1, 0}, + {CPM_CLK_SCC2, CPM_BRG2, 1}, + {CPM_CLK_SCC2, CPM_BRG3, 2}, + {CPM_CLK_SCC2, CPM_BRG4, 3}, + {CPM_CLK_SCC2, CPM_CLK11, 4}, + {CPM_CLK_SCC2, CPM_CLK12, 5}, + {CPM_CLK_SCC2, CPM_CLK3, 6}, + {CPM_CLK_SCC2, CPM_CLK4, 7}, + {CPM_CLK_SCC3, CPM_BRG1, 0}, + {CPM_CLK_SCC3, CPM_BRG2, 1}, + {CPM_CLK_SCC3, CPM_BRG3, 2}, + {CPM_CLK_SCC3, CPM_BRG4, 3}, + {CPM_CLK_SCC3, CPM_CLK5, 4}, + {CPM_CLK_SCC3, CPM_CLK6, 5}, + {CPM_CLK_SCC3, CPM_CLK7, 6}, + {CPM_CLK_SCC3, CPM_CLK8, 7}, + {CPM_CLK_SCC4, CPM_BRG1, 0}, + {CPM_CLK_SCC4, CPM_BRG2, 1}, + {CPM_CLK_SCC4, CPM_BRG3, 2}, + {CPM_CLK_SCC4, CPM_BRG4, 3}, + {CPM_CLK_SCC4, CPM_CLK5, 4}, + {CPM_CLK_SCC4, CPM_CLK6, 5}, + {CPM_CLK_SCC4, CPM_CLK7, 6}, + {CPM_CLK_SCC4, CPM_CLK8, 7}, + }; im_cpmux =cpm2_map (im_cpmux);
@@ -205,23 +238,80 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode)if (mode ==CPM_CLK_RX ) shift +=3 ; -for (i=0 ; i<24 ; i++) { +for (i =0 ; i <ARRAY_SIZE (clk_map); i++) {if (clk_map[i][0 ] == target && clk_map[i][1 ] == clock) { bits = clk_map[i][2 ];break ; } } -if (i ==sizeof (clk_map)/3 ) +if (i ==ARRAY_SIZE (clk_map)) ret = -EINVAL ; bits <<= shift; mask <<= shift; +out_be32 (reg, (in_be32 (reg) & ~mask) | bits);cpm2_unmap (im_cpmux);return ret; } +int cpm2_smc_clk_setup (enum cpm_clk_target target,int clock) +{ +int ret =0 ; +int shift; +int i, bits =0 ; +cpmux_t __iomem *im_cpmux; +u8 __iomem *reg; +u8 mask =3 ; + +u8 clk_map[][3 ] = { + {CPM_CLK_SMC1 ,CPM_BRG1 ,0 }, + {CPM_CLK_SMC1 ,CPM_BRG7 ,1 }, + {CPM_CLK_SMC1 ,CPM_CLK7 ,2 }, + {CPM_CLK_SMC1 ,CPM_CLK9 ,3 }, + {CPM_CLK_SMC2 ,CPM_BRG2 ,0 }, + {CPM_CLK_SMC2 ,CPM_BRG8 ,1 }, + {CPM_CLK_SMC2 ,CPM_CLK4 ,2 }, + {CPM_CLK_SMC2 ,CPM_CLK15 ,3 }, + }; + + im_cpmux =cpm2_map (im_cpmux); + +switch (target) { +case CPM_CLK_SMC1 : + reg = &im_cpmux->cmx_smr; + mask =3 ; + shift =4 ; +break ; +case CPM_CLK_SMC2 : + reg = &im_cpmux->cmx_smr; + mask =3 ; + shift =0 ; +break ; +default : +printk (KERN_ERR "cpm2_smc_clock_setup: invalid clock target\n" ); +return -EINVAL ; + } + +for (i =0 ; i <ARRAY_SIZE (clk_map); i++) { +if (clk_map[i][0 ] == target && clk_map[i][1 ] == clock) { + bits = clk_map[i][2 ]; +break ; + } + } +if (i ==ARRAY_SIZE (clk_map)) + ret = -EINVAL ; + + bits <<= shift; + mask <<= shift; + +out_8 (reg, (in_8 (reg) & ~mask) | bits); + +cpm2_unmap (im_cpmux); +return ret; +} +/* * dpalloc / dpfree bits. */
include/asm-powerpc/cpm2.h +4 -1
@@ -1206,7 +1206,9 @@ enum cpm_clk_target {CPM_CLK_SCC4 ,CPM_CLK_FCC1 ,CPM_CLK_FCC2 , -CPM_CLK_FCC3 +CPM_CLK_FCC3 , +CPM_CLK_SMC1 , + CPM_CLK_SMC2, }; enum cpm_clk {
@@ -1243,6 +1245,7 @@ enum cpm_clk { };extern int cpm2_clk_setup (enum cpm_clk_target target,int clock,int mode); +extern int cpm2_smc_clk_setup (enum cpm_clk_target target,int clock);#endif /* __CPM2__ */ #endif /* __KERNEL__ */
Signature · 1 line
1.5.3.1
PATCH 22/28 cpm2: Add cpm2_set_pin().
In reply to Scott WoodThis provides a generic way for board code to set up CPM pins, rather than directly poking magic values into registers.
Signed-off-by Scott Wood <[email protected]>
--- arch/powerpc/sysdev/cpm2_common.c | 33 +++++++++++++++++++++++++++++++++ include/asm-powerpc/cpm2.h | 9 +++++++++ 2 files changed, 42 insertions(+), 0 deletions(-)
arch/powerpc/sysdev/cpm2_common.c +33 -0
@@ -418,3 +418,36 @@ void *cpm_dpram_addr(unsigned long offset)return (void *)(im_dprambase + offset); }EXPORT_SYMBOL (cpm_dpram_addr); + +struct cpm2_ioports { +u32 dir, par, sor, odr, dat; +u32 res[3 ]; +}; + +void cpm2_set_pin (int port,int pin,int flags) +{ +struct cpm2_ioports __iomem *iop = + (struct cpm2_ioports __iomem *)&cpm2_immr->im_ioport; + + pin =1 << (31 - pin); + +if (flags &CPM_PIN_OUTPUT ) +setbits32 (&iop[port].dir, pin); +else +clrbits32 (&iop[port].dir, pin); + +if (!(flags &CPM_PIN_GPIO )) +setbits32 (&iop[port].par, pin); +else +clrbits32 (&iop[port].par, pin); + +if (flags &CPM_PIN_SECONDARY ) +setbits32 (&iop[port].sor, pin); +else +clrbits32 (&iop[port].sor, pin); + +if (flags &CPM_PIN_OPENDRAIN ) +setbits32 (&iop[port].odr, pin); +else +clrbits32 (&iop[port].odr, pin); +}
include/asm-powerpc/cpm2.h +9 -0
@@ -1247,5 +1247,14 @@ enum cpm_clk {extern int cpm2_clk_setup (enum cpm_clk_target target,int clock,int mode);extern int cpm2_smc_clk_setup (enum cpm_clk_target target,int clock); +#define CPM_PIN_INPUT 0 +#define CPM_PIN_OUTPUT 1 +#define CPM_PIN_PRIMARY 0 +#define CPM_PIN_SECONDARY 2 +#define CPM_PIN_GPIO 4 +#define CPM_PIN_OPENDRAIN 8 + +void cpm2_set_pin (int port,int pin,int flags); +#endif /* __CPM2__ */ #endif /* __KERNEL__ */
Signature · 1 line
1.5.3.1
PATCH 23/28 mpc82xx: Define CPU_FTR_NEED_COHERENT
In reply to Scott WoodThe 8272 (and presumably other PCI PQ2 chips) appear to have the same issue as the 83xx regarding PCI streaming DMA.
Signed-off-by Scott Wood <[email protected]>
--- include/asm-powerpc/cputable.h | 10 +++++----- 1 files changed, 5 insertions(+), 5 deletions(-)
include/asm-powerpc/cputable.h +5 -5
@@ -196,12 +196,12 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,#define PPC_FEATURE_HAS_EFP_DOUBLE_COMP 0#endif -/* We need to mark all pages as being coherent if we're SMP or we -* have a 74[45]x and an MPC107 host bridge. Also 83xx requires -* it for PCI "streaming/prefetch" to work properly. +/* We need to mark all pages as being coherent if we're SMP or we have a +* 74[45]x and an MPC107 host bridge. Also 83xx and PowerQUICC II +* require it for PCI "streaming/prefetch" to work properly. */ #if defined(CONFIG_SMP ) || defined(CONFIG_MPC10X_BRIDGE ) \ - || defined(CONFIG_PPC_83xx) + || defined(CONFIG_PPC_83xx) || defined(CONFIG_8260 )#define CPU_FTR_COMMON CPU_FTR_NEED_COHERENT#else #define CPU_FTR_COMMON 0
@@ -313,7 +313,7 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, CPU_FTR_PPC_LE)#define CPU_FTRS_82XX (CPU_FTR_COMMON | \ CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB) -#define CPU_FTRS_G2_LE (CPU_FTR_MAYBE_CAN_DOZE | \ +#define CPU_FTRS_G2_LE (CPU_FTR_COMMON | CPU_FTR_MAYBE_CAN_DOZE | \ CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS)#define CPU_FTRS_E300 (CPU_FTR_MAYBE_CAN_DOZE | \ CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS | \
Signature · 1 line
1.5.3.1
RE: [PATCH 23/28] mpc82xx: Define CPU_FTR_NEED_COHERENT
Quoted 7 lines
-----Original Message-----
From: Scott Wood
Sent: Monday, September 17, 2007 11:58 AM
=20
The 8272 (and presumably other PCI PQ2 chips) appear to have the same issue as the 83xx regarding PCI streaming DMA. =20
Can you explain what this isssue is? We're using a 8280 and have had some PCI busmaster DMA problems, and wonder if it is related.
Re: [PATCH 23/28] mpc82xx: Define CPU_FTR_NEED_COHERENT
Quoted 10 lines · Rune Torgersen
Quoted 7 lines
-----Original Message-----
From: Scott Wood
Sent: Monday, September 17, 2007 11:58 AMThe 8272 (and presumably other PCI PQ2 chips) appear to have the same issue as the 83xx regarding PCI streaming DMA.
Can you explain what this isssue is? We're using a 8280 and have had some PCI busmaster DMA problems, and wonder if it is related.
I'm not sure of the details, just that I get corrupted PCI DMA if I don't set it.
BTW, if the problems you're seeing include lockups when using PCI DMA, check out the end of the PCI initialization in arch/powerpc/boot/cuboot-pq2.c; it requires certain non-default arbiter settings.
-Scott
PATCH 24/28 mpc82xx: Remove a bunch of cruft that duplicates generic functionality.
In reply to Scott Woodm82xx_calibrate_decr(), mpc82xx_ads_show_cpuinfo(), and mpc82xx_halt() do anything useful beyond what the generic code does.
Signed-off-by Scott Wood <[email protected]>
--- arch/powerpc/platforms/82xx/Makefile | 1 - arch/powerpc/platforms/82xx/mpc82xx.c | 109 ----------------------------- arch/powerpc/platforms/82xx/mpc82xx_ads.c | 10 +-- arch/powerpc/platforms/82xx/pq2ads.h | 6 -- 4 files changed, 2 insertions(+), 124 deletions(-) delete mode 100644 arch/powerpc/platforms/82xx/mpc82xx.c
arch/powerpc/platforms/82xx/Makefile +0 -1
@@ -1,5 +1,4 @@ # # Makefile for the PowerPC 82xx linux kernel. # -obj-$(CONFIG_PPC_82xx) += mpc82xx.o obj-$(CONFIG_MPC82xx_ADS) += mpc82xx_ads.o
arch/powerpc/platforms/82xx/mpc82xx.c deleted +0 -109
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arch/powerpc/platforms/82xx/mpc82xx_ads.c +2 -8
@@ -612,12 +612,6 @@ static void m82xx_restart(char *cmd)while (1 ) ; } -static void m82xx_halt (void ) -{ -local_irq_disable (); -while (1 ) ; -} -define_machine (mpc82xx_ads) { .name = "MPC82xx ADS",
@@ -626,6 +620,6 @@ define_machine(mpc82xx_ads) .init_IRQ = mpc82xx_ads_pic_init, .show_cpuinfo = mpc82xx_ads_show_cpuinfo, .get_irq = cpm2_get_irq, - .calibrate_decr = m82xx_calibrate_decr, - .restart = m82xx_restart,.halt = m82xx_halt, + .calibrate_decr = generic_calibrate_decr, + .restart = m82xx_restart, };
arch/powerpc/platforms/82xx/pq2ads.h +0 -6
@@ -24,10 +24,6 @@#include <linux/seq_file.h> -/* For our show_cpuinfo hooks. */ -#define CPUINFO_VENDOR "Freescale Semiconductor" -#define CPUINFO_MACHINE "PQ2 ADS PowerPC" -/* Backword-compatibility stuff for the drivers */ #define CPM_MAP_ADDR ((uint)0xf0000000)#define CPM_IRQ_OFFSET 0
@@ -58,8 +54,6 @@#define SIU_INT_SCC4 ((uint)0x2b+CPM_IRQ_OFFSET)void m82xx_pci_init_irq (void ); -void mpc82xx_ads_show_cpuinfo (struct seq_file *); -void m82xx_calibrate_decr (void );#endif /* __MACH_ADS8260_DEFS */ #endif /* __KERNEL__ */
Signature · 1 line
1.5.3.1
Re: [PATCH 24/28] mpc82xx: Remove a bunch of cruft that duplicates generic functionality.
Quoted 4 lines · Scott Wood
m82xx_calibrate_decr(),mpc82xx_ads_show_cpuinfo(), andmpc82xx_halt()do anything useful beyond what the generic code does.Signed-off-by Scott Wood <[email protected]>
Acked-by David Gibson <[email protected]>
Signature · 4 lines
David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
PATCH 25/28 mpc82xx: Rename mpc82xx_ads to mpc8272_ads.
In reply to Scott WoodThis is just a rename patch; internal references to mpc82xx_ads will be changed in the next one.
Signed-off-by Scott Wood <[email protected]>
---
arch/powerpc/platforms/82xx/Kconfig | 8 ++++----
arch/powerpc/platforms/82xx/Makefile | 2 +-
.../82xx/{mpc82xx_ads.c => mpc8272_ads.c} | 0
3 files changed, 5 insertions(+), 5 deletions(-)
rename arch/powerpc/platforms/82xx/{mpc82xx_ads.c => mpc8272_ads.c} (100%)arch/powerpc/platforms/82xx/Kconfig +4 -4
@@ -1,17 +1,17 @@ choice prompt "82xx Board Type" depends on PPC_82xx - default MPC82xx_ADS + default MPC8272_ADS -config MPC82xx_ADS - bool "Freescale MPC82xx ADS" +config MPC8272_ADS + bool "Freescale MPC8272 ADS" select DEFAULT_UIMAGE select PQ2ADS select 8272 select 8260 select FSL_SOC help - This option enables support for the MPC8272 ADS board + This option enables support for the MPC8272 ADS board endchoice
arch/powerpc/platforms/82xx/Makefile +1 -1
@@ -1,4 +1,4 @@ # # Makefile for the PowerPC 82xx linux kernel. # -obj-$(CONFIG_MPC82xx_ADS) += mpc82xx_ads.o +obj-$(CONFIG_MPC8272_ADS) += mpc8272_ads.o
arch/powerpc/platforms/82xx/mpc8272_ads.c renamed from arch/powerpc/platforms/82xx/mpc82xx_ads.c +0 -0
Signature · 1 line
1.5.3.1
PATCH 26/28 mpc8272ads: Change references from 82xx_ADS to 8272_ADS.
In reply to Scott WoodSigned-off-by Scott Wood <[email protected]>
--- arch/powerpc/platforms/82xx/mpc8272_ads.c | 26 +++++++++++++------------- 1 files changed, 13 insertions(+), 13 deletions(-)
arch/powerpc/platforms/82xx/mpc8272_ads.c +13 -13
@@ -1,5 +1,5 @@/* -* MPC82xx_ads setup and early boot code plus other random bits. +* MPC8272_ads setup and early boot code plus other random bits. * * Author: Vitaly Bordug <[email protected]> * m82xx_restart fix by Wade Farnsworth <[email protected]>
@@ -63,7 +63,7 @@ static unsigned long pci_int_base;static struct irq_host *pci_pic_host;#endif -static void __init mpc82xx_ads_pic_init (void ) +static void __init mpc8272_ads_pic_init (void ) {struct device_node *np =of_find_compatible_node (NULL ,"cpm-pic" ,"CPM2" );struct resource r;
@@ -553,14 +553,14 @@ static void __init mpc82xx_add_bridge(struct device_node *np)/* * Setup the architecture */ -static void __init mpc82xx_ads_setup_arch (void ) +static void __init mpc8272_ads_setup_arch (void ) {#ifdef CONFIG_PCI struct device_node *np;#endif if (ppc_md.progress) - ppc_md.progress ("mpc82xx_ads_setup_arch()" ,0 ); + ppc_md.progress ("mpc8272_ads_setup_arch()" ,0 );cpm2_reset ();/* Map I/O region to a 256MB BAT */
@@ -582,13 +582,13 @@ static void __init mpc82xx_ads_setup_arch(void)#endif if (ppc_md.progress) - ppc_md.progress ("mpc82xx_ads_setup_arch(), finish" ,0 ); + ppc_md.progress ("mpc8272_ads_setup_arch(), finish" ,0 ); }/* * Called very early, device-tree isn't unflattened */ -static int __init mpc82xx_ads_probe (void ) +static int __init mpc8272_ads_probe (void ) {/* We always match for now, eventually we should look at * the flat dev tree to ensure this is the board we are
@@ -612,14 +612,14 @@ static void m82xx_restart(char *cmd)while (1 ) ; } -define_machine (mpc82xx_ads) +define_machine (mpc8272_ads) { - .name = "MPC82xx ADS", - .probe = mpc82xx_ads_probe, - .setup_arch = mpc82xx_ads_setup_arch, - .init_IRQ = mpc82xx_ads_pic_init, - .show_cpuinfo = mpc82xx_ads_show_cpuinfo, - .get_irq = cpm2_get_irq, + .name = "MPC8272 ADS", + .probe = mpc8272_ads_probe, + .setup_arch = mpc8272_ads_setup_arch, + .init_IRQ = mpc8272_ads_pic_init, + .show_cpuinfo = mpc8272_ads_show_cpuinfo, + .get_irq = cpm2_get_irq, .calibrate_decr = generic_calibrate_decr, .restart = m82xx_restart, };
Signature · 1 line
1.5.3.1
PATCH 27/28 mpc82xx: Update mpc8272ads, and factor out PCI and reset.
In reply to Scott Wood1. PCI and reset are factored out into pq2.c. I renamed them from m82xx to pq2 because they won't work on the Integrated Host Processor line of 82xx chips (i.e. 8240, 8245, and such).
2. The PCI PIC, which is nominally board-specific, is used on multiple boards, and thus is used into pq2ads-pci-pic.c.
3. The new CPM binding is used.
4. General cleanup.
Signed-off-by Scott Wood <[email protected]>
--- arch/powerpc/Kconfig | 2 +- arch/powerpc/boot/dts/mpc8272ads.dts | 309 +++++++------ arch/powerpc/configs/mpc8272_ads_defconfig | 248 +++++++---- arch/powerpc/platforms/82xx/Kconfig | 5 + arch/powerpc/platforms/82xx/Makefile | 2 + arch/powerpc/platforms/82xx/mpc8272_ads.c | 661 +++++--------------------- arch/powerpc/platforms/82xx/pq2.c | 82 ++++ arch/powerpc/platforms/82xx/pq2.h | 20 + arch/powerpc/platforms/82xx/pq2ads-pci-pic.c | 195 ++++++++ arch/powerpc/platforms/82xx/pq2ads.h | 2 - 10 files changed, 753 insertions(+), 773 deletions(-) create mode 100644 arch/powerpc/platforms/82xx/pq2.c create mode 100644 arch/powerpc/platforms/82xx/pq2.h create mode 100644 arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
arch/powerpc/Kconfig +1 -1
@@ -466,7 +466,7 @@ config PCI_8260 config 8260_PCI9 bool "Enable workaround for MPC826x erratum PCI 9" - depends on PCI_8260 && !ADS8272 + depends on PCI_8260 && !8272 default y choice
arch/powerpc/boot/dts/mpc8272ads.dts +167 -142
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arch/powerpc/configs/mpc8272_ads_defconfig +165 -83
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arch/powerpc/platforms/82xx/Kconfig +5 -0
@@ -10,6 +10,8 @@ config MPC8272_ADS select 8272 select 8260 select FSL_SOC + select PQ2_ADS_PCI_PIC if PCI + select PPC_CPM_NEW_BINDING help This option enables support for the MPC8272 ADS board
@@ -34,3 +36,6 @@ config 8272 help The MPC8272 CPM has a different internal dpram setup than other CPM2 devices + +config PQ2_ADS_PCI_PIC + bool
arch/powerpc/platforms/82xx/Makefile +2 -0
@@ -2,3 +2,5 @@ # Makefile for the PowerPC 82xx linux kernel. # obj-$(CONFIG_MPC8272_ADS) += mpc8272_ads.o +obj-$(CONFIG_CPM2) += pq2.o +obj-$(CONFIG_PQ2_ADS_PCI_PIC) += pq2ads-pci-pic.o
arch/powerpc/platforms/82xx/mpc8272_ads.c +116 -545
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arch/powerpc/platforms/82xx/pq2.c new file +82 -0
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arch/powerpc/platforms/82xx/pq2.h new file +20 -0
@@ -0,0 +1,20 @@ +#ifndef _PQ2_H +#define _PQ2_H + +void pq2_restart (char *cmd); + +#ifdef CONFIG_PCI +int pq2ads_pci_init_irq (void ); +void pq2_init_pci (void ); +#else +static inline int pq2ads_pci_init_irq (void ) +{ +return 0 ; +} + +static inline void pq2_init_pci (void ) +{ +} +#endif + +#endif
arch/powerpc/platforms/82xx/pq2ads-pci-pic.c new file +195 -0
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arch/powerpc/platforms/82xx/pq2ads.h +0 -2
@@ -53,7 +53,5 @@#define SIU_INT_SCC3 ((uint)0x2a+CPM_IRQ_OFFSET)#define SIU_INT_SCC4 ((uint)0x2b+CPM_IRQ_OFFSET) -void m82xx_pci_init_irq (void ); -#endif /* __MACH_ADS8260_DEFS */ #endif /* __KERNEL__ */
Signature · 1 line
1.5.3.1
PATCH 28/28 mpc82xx: Add pq2fads board support.
In reply to Scott WoodSigned-off-by Scott Wood <[email protected]>
--- arch/powerpc/boot/dts/pq2fads.dts | 229 ++++++++ arch/powerpc/configs/pq2fads_defconfig | 1003 ++++++++++++++++++++++++++++++++ arch/powerpc/platforms/82xx/Kconfig | 11 + arch/powerpc/platforms/82xx/Makefile | 1 + arch/powerpc/platforms/82xx/pq2fads.c | 198 +++++++ 5 files changed, 1442 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/boot/dts/pq2fads.dts create mode 100644 arch/powerpc/configs/pq2fads_defconfig create mode 100644 arch/powerpc/platforms/82xx/pq2fads.c
arch/powerpc/boot/dts/pq2fads.dts new file +229 -0
@@ -0,0 +1,229 @@ +/* + * Device Tree for the PQ2FADS-ZU board with an MPC8280 chip. + * + * Copyright 2007 Freescale Semiconductor Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/ { + model = "pq2fads"; + compatible = "fsl,pq2fads"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <d#32>; + i-cache-line-size = <d#32>; + d-cache-size = <d#16384>; + i-cache-size = <d#16384>; + timebase-frequency = <0>; + clock-frequency = <0>; + }; + }; + + memory { + device_type = "memory"; + reg = <0 0>; + }; + + localbus@f0010100 { + compatible = "fsl,mpc8280-localbus", + "fsl,pq2-localbus"; + #address-cells = <2>; + #size-cells = <1>; + reg = <f0010100 60>; + + ranges = <0 0 fe000000 00800000 + 1 0 f4500000 00008000 + 8 0 f8200000 00008000>; + + flash@0,0 { + compatible = "jedec-flash"; + reg = <0 0 800000>; + bank-width = <4>; + device-width = <1>; + }; + + bcsr@1,0 { + reg = <1 0 20>; + compatible = "fsl,pq2fads-bcsr"; + }; + + PCI_PIC: pic@8,0 { + #interrupt-cells = <1>; + interrupt-controller; + reg = <8 0 8>; + compatible = "fsl,pq2ads-pci-pic"; + interrupt-parent = <&PIC>; + interrupts = <18 8>; + }; + }; + + pci@f0010800 { + device_type = "pci"; + reg = <f0010800 10c f00101ac 8 f00101c4 8>; + compatible = "fsl,mpc8280-pci", "fsl,pq2-pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + clock-frequency = <d#66000000>; + interrupt-map-mask = <f800 0 0 7>; + interrupt-map = < + /* IDSEL 0x16 */ + b000 0 0 1 &PCI_PIC 0 + b000 0 0 2 &PCI_PIC 1 + b000 0 0 3 &PCI_PIC 2 + b000 0 0 4 &PCI_PIC 3 + + /* IDSEL 0x17 */ + b800 0 0 1 &PCI_PIC 4 + b800 0 0 2 &PCI_PIC 5 + b800 0 0 3 &PCI_PIC 6 + b800 0 0 4 &PCI_PIC 7 + + /* IDSEL 0x18 */ + c000 0 0 1 &PCI_PIC 8 + c000 0 0 2 &PCI_PIC 9 + c000 0 0 3 &PCI_PIC a + c000 0 0 4 &PCI_PIC b>; + + interrupt-parent = <&PIC>; + interrupts = <12 8>; + ranges = <42000000 0 80000000 80000000 0 20000000 + 02000000 0 a0000000 a0000000 0 20000000 + 01000000 0 00000000 f6000000 0 02000000>; + }; + + soc@f0000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "fsl,mpc8280", "fsl,pq2-soc"; + ranges = <00000000 f0000000 00053000>; + + // Temporary -- will go away once kernel uses ranges for get_immrbase(). + reg = <f0000000 00053000>; + + cpm@119c0 { + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <2>; + compatible = "fsl,mpc8280-cpm", "fsl,cpm2"; + reg = <119c0 30 0 2000>; + ranges; + + brg@119f0 { + compatible = "fsl,mpc8280-brg", + "fsl,cpm2-brg", + "fsl,cpm-brg"; + reg = <119f0 10 115f0 10>; + }; + + serial@11a00 { + device_type = "serial"; + compatible = "fsl,mpc8280-scc-uart", + "fsl,cpm2-scc-uart"; + reg = <11a00 20 8000 100>; + interrupts = <28 8>; + interrupt-parent = <&PIC>; + fsl,cpm-brg = <1>; + fsl,cpm-command = <00800000>; + }; + + serial@11a20 { + device_type = "serial"; + compatible = "fsl,mpc8280-scc-uart", + "fsl,cpm2-scc-uart"; + reg = <11a20 20 8100 100>; + interrupts = <29 8>; + interrupt-parent = <&PIC>; + fsl,cpm-brg = <2>; + fsl,cpm-command = <04a00000>; + }; + + ethernet@11320 { + device_type = "network"; + compatible = "fsl,mpc8280-fcc-enet", + "fsl,cpm2-fcc-enet"; + reg = <11320 20 8500 100 113b0 1>; + interrupts = <21 8>; + interrupt-parent = <&PIC>; + phy-handle = <&PHY0>; + linux,network-index = <0>; + fsl,cpm-command = <16200300>; + }; + + ethernet@11340 { + device_type = "network"; + compatible = "fsl,mpc8280-fcc-enet", + "fsl,cpm2-fcc-enet"; + reg = <11340 20 8600 100 113d0 1>; + interrupts = <22 8>; + interrupt-parent = <&PIC>; + phy-handle = <&PHY1>; + linux,network-index = <1>; + fsl,cpm-command = <1a400300>; + local-mac-address = [00 e0 0c 00 79 01]; + }; + + mdio@10d40 { + device_type = "mdio"; + compatible = "fsl,pq2fads-mdio-bitbang", + "fsl,mpc8280-mdio-bitbang", + "fsl,cpm2-mdio-bitbang"; + #address-cells = <1>; + #size-cells = <0>; + reg = <10d40 14>; + fsl,mdio-pin = <9>; + fsl,mdc-pin = <a>; + + PHY0: ethernet-phy@0 { + interrupt-parent = <&PIC>; + interrupts = <19 2>; + reg = <0>; + device_type = "ethernet-phy"; + }; + + PHY1: ethernet-phy@1 { + interrupt-parent = <&PIC>; + interrupts = <19 2>; + reg = <3>; + device_type = "ethernet-phy"; + }; + }; + + usb@11b60 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,mpc8280-usb", + "fsl,cpm2-usb"; + reg = <11b60 18 8b00 100>; + interrupt-parent = <&PIC>; + interrupts = <b 8>; + fsl,cpm-command = <2e600000>; + }; + }; + + PIC: interrupt-controller@10c00 { + #interrupt-cells = <2>; + interrupt-controller; + reg = <10c00 80>; + compatible = "fsl,mpc8280-pic", "fsl,cpm2-pic"; + }; + + }; + + chosen { + linux,stdout-path = "/soc/cpm/serial@11a00"; + }; +};
arch/powerpc/configs/pq2fads_defconfig new file +1003 -0
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arch/powerpc/platforms/82xx/Kconfig +11 -0
@@ -15,6 +15,17 @@ config MPC8272_ADS help This option enables support for the MPC8272 ADS board +config PQ2FADS + bool "Freescale PQ2FADS" + select DEFAULT_UIMAGE + select PQ2ADS + select 8260 + select FSL_SOC + select PQ2_ADS_PCI_PIC if PCI + select PPC_CPM_NEW_BINDING + help + This option enables support for the PQ2FADS board + endchoice config PQ2ADS
arch/powerpc/platforms/82xx/Makefile +1 -0
@@ -4,3 +4,4 @@ obj-$(CONFIG_MPC8272_ADS) += mpc8272_ads.o obj-$(CONFIG_CPM2) += pq2.o obj-$(CONFIG_PQ2_ADS_PCI_PIC) += pq2ads-pci-pic.o +obj-$(CONFIG_PQ2FADS) += pq2fads.o
arch/powerpc/platforms/82xx/pq2fads.c new file +198 -0
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Signature · 1 line
1.5.3.1