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PowerPC: Fix MAL0 DTS entries for Bamboo and Sequoia.

PATCH In review Valentine Barshak 3 participants 8 messages Sep 18, 2007 – Sep 20, 2007

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Valentine Barshak

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#0 lore raw

cover PowerPC: Fix MAL0 DTS entries for Bamboo and Sequoia.

A couple of minor fixes to correct MAL0 DTS entries for bamboo.dts and sequoia.dts. Also correct MAL channel assignment for EMACs on Sequoia board.

author
#1 lore raw

PATCH 1/2 PowerPC: Fix Bamboo MAL0 dts entry.

According to PowerPC 440EP documentation,
MAL0 consists of 6 channels (4 transmit channels and 2 receive channels) This patch fixes Bamboo DTS MAL0 "num-rx-chans" entry.

Signed-off-by Valentine Barshak <[email protected]>
---
 arch/powerpc/boot/dts/bamboo.dts |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)
arch/powerpc/boot/dts/bamboo.dts +1 -1
diff -ruN linux-2.6.orig/arch/powerpc/boot/dts/bamboo.dts linux-2.6/arch/powerpc/boot/dts/bamboo.dts
@@ -94,7 +94,7 @@
 			compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
 			dcr-reg = <180 62>;
 			num-tx-chans = <4>;
-			num-rx-chans = <4>;
+			num-rx-chans = <2>;
 			interrupt-parent = <&MAL0>;
 			interrupts = <0 1 2 3 4>;
 			#interrupt-cells = <1>;
author
#2 lore raw

PATCH 2/2 PowerPC: Fix Sequoia MAL0 and EMAC dts entries.

In reply to Valentine Barshak

According to PowerPC 440EPx documentation,
MAL0 is comprised of four channels (two transmit and two receive). Each channel is dedicated to one of two EMAC cores. This patch fixes Sequoia DTS MAL0 entry and EMAC entries, assigning correct channel numbers to EMACs.

Signed-off-by Valentine Barshak <[email protected]>
---
 arch/powerpc/boot/dts/sequoia.dts |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)
arch/powerpc/boot/dts/sequoia.dts +4 -4
diff -ruN linux-2.6.orig/arch/powerpc/boot/dts/sequoia.dts linux-2.6/arch/powerpc/boot/dts/sequoia.dts
@@ -107,8 +107,8 @@
 		MAL0: mcmal {
 			compatible = "ibm,mcmal-440epx", "ibm,mcmal2";
 			dcr-reg = <180 62>;
-			num-tx-chans = <4>;
-			num-rx-chans = <4>;
+			num-tx-chans = <2>;
+			num-rx-chans = <2>;
 			interrupt-parent = <&MAL0>;
 			interrupts = <0 1 2 3 4>;
 			#interrupt-cells = <1>;

@@ -239,7 +239,7 @@
 				reg = <ef600e00 70>;
 				local-mac-address = [000000000000];
 				mal-device = <&MAL0>;
-				mal-tx-channel = <0 1>;
+				mal-tx-channel = <0>;
 				mal-rx-channel = <0>;
 				cell-index = <0>;
 				max-frame-size = <5dc>;

@@ -265,7 +265,7 @@
 				reg = <ef600f00 70>;
 				local-mac-address = [000000000000];
 				mal-device = <&MAL0>;
-				mal-tx-channel = <2 3>;
+				mal-tx-channel = <1>;
 				mal-rx-channel = <1>;
 				cell-index = <1>;
 				max-frame-size = <5dc>;
#3 lore raw

Re: [PATCH 2/2] PowerPC: Fix Sequoia MAL0 and EMAC dts entries.

Quoted 5 lines · Valentine Barshak

According to PowerPC 440EPx documentation,
MAL0 is comprised of four channels (two transmit and two receive). Each channel is dedicated to one of two EMAC cores. This patch fixes Sequoia DTS MAL0 entry and EMAC entries, assigning correct channel numbers to EMACs.

Hrm.. did they change the EMAC in 440EPx to only use one MAL tx-channel? All the older ones could use two (for no readily apparent reason, IMO).

Signature · 4 lines
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson
author
#4 lore raw

Re: [PATCH 2/2] PowerPC: Fix Sequoia MAL0 and EMAC dts entries.

Quoted 11 lines · David Gibson
Quoted 5 lines · Valentine Barshak

According to PowerPC 440EPx documentation,
MAL0 is comprised of four channels (two transmit and two receive). Each channel is dedicated to one of two EMAC cores. This patch fixes Sequoia DTS MAL0 entry and EMAC entries, assigning correct channel numbers to EMACs.

Hrm.. did they change the EMAC in 440EPx to only use one MAL tx-channel? All the older ones could use two (for no readily apparent reason, IMO).

Yes, they did.
Just 1 tx and 1 rx-channel per EMAC. Just 2 bits to select channels, while all other bits in MAL registers are reserved. I'm not sure why they did it (possible bus bandwidth problems), but it's impossible to set more than 1 rx/tx channel for each EMAC in 440EPx.

author
#5 lore raw

Re: [PATCH 2/2] PowerPC: Fix Sequoia MAL0 and EMAC dts entries.

Quoted 8 lines · Valentine Barshak
Quoted 7 lines · David Gibson
Quoted 5 lines · Valentine Barshak

According to PowerPC 440EPx documentation,
MAL0 is comprised of four channels (two transmit and two receive). Each channel is dedicated to one of two EMAC cores. This patch fixes Sequoia DTS MAL0 entry and EMAC entries, assigning correct channel numbers to EMACs.

Quoted 7 lines
Quoted 4 lines

Hrm.. did they change the EMAC in 440EPx to only use one MAL tx-channel? All the older ones could use two (for no readily apparent reason, IMO).

Yes, they did.
Just 1 tx and 1 rx-channel per EMAC. Just 2 bits to select channels, while all other bits in MAL registers are reserved. I'm not sure why they did it (possible bus bandwidth problems), but it's impossible to set more than 1 rx/tx channel for each EMAC in 440EPx.

Josh, David, is this patch OK?

#6 lore raw

Re: [PATCH 2/2] PowerPC: Fix Sequoia MAL0 and EMAC dts entries.

Quoted 13 lines · On Thu, 20 Sep 2007 22:46:18 +0400 Valentine Barshak <[email protected]>…
Quoted 12 lines · Valentine Barshak
Quoted 11 lines · David Gibson
Quoted 5 lines · Valentine Barshak

According to PowerPC 440EPx documentation,
MAL0 is comprised of four channels (two transmit and two receive). Each channel is dedicated to one of two EMAC cores. This patch fixes Sequoia DTS MAL0 entry and EMAC entries, assigning correct channel numbers to EMACs.

Hrm.. did they change the EMAC in 440EPx to only use one MAL tx-channel? All the older ones could use two (for no readily apparent reason, IMO).

Quoted 7 lines
Quoted 5 lines

Yes, they did.
Just 1 tx and 1 rx-channel per EMAC. Just 2 bits to select channels, while all other bits in MAL registers are reserved.
I'm not sure why they did it (possible bus bandwidth problems), but it's impossible to set more than 1 rx/tx channel for each EMAC in 440EPx.

Josh, David, is this patch OK?

Yeah. I applied it to my tree and asked Paul to pull. Same for the Bamboo one.

josh

author
#7 lore raw

Re: [PATCH 2/2] PowerPC: Fix Sequoia MAL0 and EMAC dts entries.

Quoted 18 lines · Josh Boyer
Quoted 15 lines · On Thu, 20 Sep 2007 22:46:18 +0400 Valentine Barshak <[email protected]>…
Quoted 14 lines · Valentine Barshak
Quoted 10 lines · David Gibson
Quoted 5 lines · Valentine Barshak

According to PowerPC 440EPx documentation,
MAL0 is comprised of four channels (two transmit and two receive). Each channel is dedicated to one of two EMAC cores. This patch fixes Sequoia DTS MAL0 entry and EMAC entries, assigning correct channel numbers to EMACs.

Hrm.. did they change the EMAC in 440EPx to only use one MAL tx-channel? All the older ones could use two (for no readily apparent reason, IMO).

Yes, they did.
Just 1 tx and 1 rx-channel per EMAC. Just 2 bits to select channels, while all other bits in MAL registers are reserved. I'm not sure why they did it (possible bus bandwidth problems), but it's impossible to set more than 1 rx/tx channel for each EMAC in 440EPx.

Quoted 6 lines
Quoted 1 line

Josh, David, is this patch OK?

Yeah. I applied it to my tree and asked Paul to pull. Same for the Bamboo one.

josh

OK thanks :)