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cpm: Describe multi-user ram in its own device node.

PATCH Applied Scott Wood 4 participants 16 messages Sep 28, 2007 – Oct 2, 2007

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PATCH 1/1 cpm: Describe multi-user ram in its own device node.

The way the current CPM binding describes available multi-user (a.k.a. dual-ported) RAM doesn't work well when there are multiple free regions, and it doesn't work at all if the region doesn't begin at the start of the muram area (as the hardware needs to be programmed with offsets into this area). The latter situation can happen with SMC UARTs on CPM2, as its parameter RAM is relocatable, u-boot puts it at zero, and the kernel doesn't support moving it.

It is now described with a muram node, similar to QE. The current CPM binding is sufficiently recent (i.e. never appeared in an official release) that compatibility with existing device trees is not an issue.

The code supporting the new binding is shared between cpm1 and cpm2, rather than remain separated. QE should be able to use this code as well, once minor fixes are made to its device trees.

---
 Documentation/powerpc/booting-without-of.txt |   40 ++++++-
 arch/powerpc/Kconfig.debug                   |    6 +-
 arch/powerpc/boot/cpm-serial.c               |   44 +++++--
 arch/powerpc/boot/dts/ep88xc.dts             |   13 ++-
 arch/powerpc/boot/dts/mpc8272ads.dts         |   11 ++
 arch/powerpc/boot/dts/mpc885ads.dts          |   13 ++-
 arch/powerpc/boot/dts/pq2fads.dts            |   13 ++-
 arch/powerpc/sysdev/commproc.c               |   11 ++-
 arch/powerpc/sysdev/cpm2_common.c            |   36 ++----
 arch/powerpc/sysdev/cpm_common.c             |  159 ++++++++++++++++++++++++++
 drivers/serial/cpm_uart/cpm_uart_cpm2.c      |    4 +-
 include/asm-powerpc/commproc.h               |   12 ++
 include/asm-powerpc/cpm.h                    |   14 +++
 include/asm-powerpc/cpm2.h                   |   10 ++
 14 files changed, 338 insertions(+), 48 deletions(-)
 create mode 100644 include/asm-powerpc/cpm.h
Documentation/powerpc/booting-without-of.txt +36 -4
index c36dcd2..ce5d67f 100644
@@ -1861,9 +1861,7 @@ platforms are moved over to use the flattened-device-tree model.
 
    Properties:
    - compatible : "fsl,cpm1", "fsl,cpm2", or "fsl,qe".
-   - reg : The first resource is a 48-byte region beginning with
-           CPCR.  The second is the available general-purpose
-           DPRAM.
+   - reg : A 48-byte region beginning with CPCR.
 
    Example:
 	cpm@119c0 {
@@ -1871,7 +1869,7 @@ platforms are moved over to use the flattened-device-tree model.
 		#size-cells = <1>;
 		#interrupt-cells = <2>;
 		compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
-		reg = <119c0 30 0 2000>;
+		reg = <119c0 30>;
 	}
 
    ii) Properties common to mulitple CPM/QE devices
@@ -2017,6 +2015,40 @@ platforms are moved over to use the flattened-device-tree model.
 		fsl,cpm-command = <2e600000>;
 	};
 
+   viii) Multi-User RAM (MURAM)
+
+   The multi-user/dual-ported RAM is expressed as a bus under the CPM node.
+
+   Ranges must be set up subject to the following restrictions:
+
+   - Children's reg nodes must be offsets from the start of all muram, even
+     if the user-data area does not begin at zero.
+   - If multiple range entries are used, the difference between the parent
+     address and the child address must be the same in all, so that a single
+     mapping can cover them all while maintaining the ability to determine
+     CPM-side offsets with pointer subtraction.  It is recommended that
+     multiple range entries not be used.
+   - A child address of zero must be translatable, even if no reg resources
+     contain it.
+
+   A child "data" node must exist, compatible with "fsl,cpm-muram-data", to
+   indicate the portion of muram that is usable by the OS for arbitrary
+   purposes.  The data node may have an arbitrary number of reg resources,
+   all of which contribute to the allocatable muram pool.
+
+   Example, based on mpc8272:
+
+	muram@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 10000>;
+
+		data@0 {
+			compatible = "fsl,cpm-muram-data";
+			reg = <0 2000 9800 800>;
+		};
+	};
+
    m) Chipselect/Local Bus
 
    Properties:
arch/powerpc/Kconfig.debug +3 -3
index f4e5d22..464f9b4 100644
@@ -245,9 +245,9 @@ config PPC_EARLY_DEBUG_44x_PHYSHIGH
 config PPC_EARLY_DEBUG_CPM_ADDR
 	hex "CPM UART early debug transmit descriptor address"
 	depends on PPC_EARLY_DEBUG_CPM
-	default "0xfa202808" if PPC_EP88XC
-	default "0xf0000808" if CPM2
-	default "0xff002808" if CPM1
+	default "0xfa202008" if PPC_EP88XC
+	default "0xf0000008" if CPM2
+	default "0xff002008" if CPM1
 	help
 	  This specifies the address of the transmit descriptor
 	  used for early debug output.  Because it is needed before
arch/powerpc/boot/cpm-serial.c +32 -12

83 lines not on this page · raw message

arch/powerpc/boot/dts/ep88xc.dts +12 -1
index 0406fc5..02705f2 100644
@@ -142,9 +142,20 @@
 			command-proc = <9c0>;
 			interrupts = <0>;	// cpm error interrupt
 			interrupt-parent = <&CPM_PIC>;
-			reg = <9c0 40 2000 1c00>;
+			reg = <9c0 40>;
 			ranges;
 
+			muram@2000 {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges = <0 2000 2000>;
+
+				data@0 {
+					compatible = "fsl,cpm-muram-data";
+					reg = <0 1c00>;
+				};
+			};
+
 			brg@9f0 {
 				compatible = "fsl,mpc885-brg",
 				             "fsl,cpm1-brg",
arch/powerpc/boot/dts/mpc8272ads.dts +11 -0
index 3fe991d..188179d 100644
@@ -124,6 +124,17 @@
 			reg = <119c0 30 0 2000>;
 			ranges;
 
+			muram@0 {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges = <0 0 10000>;
+
+				data@0 {
+					compatible = "fsl,cpm-muram-data";
+					reg = <0 2000 9800 800>;
+				};
+			};
+
 			brg@119f0 {
 				compatible = "fsl,mpc8272-brg",
 				             "fsl,cpm2-brg",
arch/powerpc/boot/dts/mpc885ads.dts +12 -1
index cbcd16f..8848e63 100644
@@ -148,9 +148,20 @@
 			command-proc = <9c0>;
 			interrupts = <0>;	// cpm error interrupt
 			interrupt-parent = <&CPM_PIC>;
-			reg = <9c0 40 2000 1c00>;
+			reg = <9c0 40>;
 			ranges;
 
+			muram@2000 {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges = <0 2000 2000>;
+
+				data@0 {
+					compatible = "fsl,cpm-muram-data";
+					reg = <0 1c00>;
+				};
+			};
+
 			brg@9f0 {
 				compatible = "fsl,mpc885-brg",
 				             "fsl,cpm1-brg",
arch/powerpc/boot/dts/pq2fads.dts +12 -1
index 54e8bd1..2d56492 100644
@@ -119,9 +119,20 @@
 			#size-cells = <1>;
 			#interrupt-cells = <2>;
 			compatible = "fsl,mpc8280-cpm", "fsl,cpm2";
-			reg = <119c0 30 0 2000>;
+			reg = <119c0 30>;
 			ranges;
 
+			muram@0 {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges = <0 0 10000>;
+
+				data@0 {
+					compatible = "fsl,cpm-muram-data";
+					reg = <0 2000 9800 800>;
+				};
+			};
+
 			brg@119f0 {
 				compatible = "fsl,mpc8280-brg",
 				             "fsl,cpm2-brg",
arch/powerpc/sysdev/commproc.c +10 -1
index e37f0a8..4b3e93c 100644
@@ -39,12 +39,15 @@
 #include <asm/tlbflush.h>
 #include <asm/rheap.h>
 #include <asm/prom.h>
+#include <asm/cpm.h>
 
 #include <asm/fs_pd.h>
 
 #define CPM_MAP_SIZE    (0x4000)
 
+#ifndef CONFIG_PPC_CPM_NEW_BINDING
 static void m8xx_cpm_dpinit(void);
+#endif
 static uint host_buffer; /* One page of host buffer */
 static uint host_end;    /* end + 1 */
 cpm8xx_t __iomem *cpmp;  /* Pointer to comm processor space */
@@ -193,7 +196,7 @@ end:
 	return sirq;
 }
 
-void cpm_reset(void)
+void __init cpm_reset(void)
 {
 	sysconf8xx_t __iomem *siu_conf;
 
@@ -229,8 +232,12 @@ void cpm_reset(void)
 	out_be32(&siu_conf->sc_sdcr, 1);
 	immr_unmap(siu_conf);
 
+#ifdef CONFIG_PPC_CPM_NEW_BINDING
+	cpm_muram_init();
+#else
 	/* Reclaim the DP memory for our use. */
 	m8xx_cpm_dpinit();
+#endif
 }
 
 /* We used to do this earlier, but have to postpone as long as possible
@@ -296,6 +303,7 @@ cpm_setbrg(uint brg, uint rate)
 		             CPM_BRG_EN | CPM_BRG_DIV16);
 }
 
+#ifndef CONFIG_PPC_CPM_NEW_BINDING
 /*
  * dpalloc / dpfree bits.
  */
@@ -397,6 +405,7 @@ uint cpm_dpram_phys(u8 *addr)
 	return (dpram_pbase + (uint)(addr - dpram_vbase));
 }
 EXPORT_SYMBOL(cpm_dpram_addr);
+#endif /* !CONFIG_PPC_CPM_NEW_BINDING */
 
 struct cpm_ioport16 {
 	__be16 dir, par, sor, dat, intr;
arch/powerpc/sysdev/cpm2_common.c +13 -23
index 9058da2..453f8a5 100644
@@ -46,7 +46,10 @@
 
 #include <sysdev/fsl_soc.h>
 
+#ifndef CONFIG_PPC_CPM_NEW_BINDING
 static void cpm2_dpinit(void);
+#endif
+
 cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor space */
 
 /* We allocate this here because it is used almost exclusively for
@@ -65,7 +68,11 @@ cpm2_reset(void)
 
 	/* Reclaim the DP memory for our use.
 	 */
+#ifdef CONFIG_PPC_CPM_NEW_BINDING
+	cpm_muram_init();
+#else
 	cpm2_dpinit();
+#endif
 
 	/* Tell everyone where the comm processor resides.
 	 */
@@ -312,6 +319,7 @@ int cpm2_smc_clk_setup(enum cpm_clk_target target, int clock)
 	return ret;
 }
 
+#ifndef CONFIG_PPC_CPM_NEW_BINDING
 /*
  * dpalloc / dpfree bits.
  */
@@ -324,28 +332,6 @@ static u8 __iomem *im_dprambase;
 
 static void cpm2_dpinit(void)
 {
-	struct resource r;
-
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
-	struct device_node *np;
-
-	np = of_find_compatible_node(NULL, NULL, "fsl,cpm2");
-	if (!np)
-		panic("Cannot find CPM2 node");
-
-	if (of_address_to_resource(np, 1, &r))
-		panic("Cannot get CPM2 resource 1");
-
-	of_node_put(np);
-#else
-	r.start = CPM_MAP_ADDR + CPM_DATAONLY_BASE;
-	r.end = r.start + CPM_DATAONLY_SIZE - 1;
-#endif
-
-	im_dprambase = ioremap(r.start, r.end - r.start + 1);
-	if (!im_dprambase)
-		panic("Cannot map DPRAM");
-
 	spin_lock_init(&cpm_dpmem_lock);
 
 	/* initialize the info header */
@@ -354,13 +340,16 @@ static void cpm2_dpinit(void)
 			sizeof(cpm_boot_dpmem_rh_block[0]),
 			cpm_boot_dpmem_rh_block);
 
+	im_dprambase = cpm2_immr->im_dprambase;
+
 	/* Attach the usable dpmem area */
 	/* XXX: This is actually crap. CPM_DATAONLY_BASE and
 	 * CPM_DATAONLY_SIZE is only a subset of the available dpram. It
 	 * varies with the processor and the microcode patches activated.
 	 * But the following should be at least safe.
 	 */
-	rh_attach_region(&cpm_dpmem_info, 0, r.end - r.start + 1);
+	rh_attach_region(&cpm_dpmem_info, CPM_MAP_ADDR + CPM_DATAONLY_BASE,
+	                 CPM_DATAONLY_SIZE);
 }
 
 /* This function returns an index into the DPRAM area.
@@ -418,6 +407,7 @@ void *cpm_dpram_addr(unsigned long offset)
 	return (void *)(im_dprambase + offset);
 }
 EXPORT_SYMBOL(cpm_dpram_addr);
+#endif /* !CONFIG_PPC_CPM_NEW_BINDING */
 
 struct cpm2_ioports {
 	u32 dir, par, sor, odr, dat;
arch/powerpc/sysdev/cpm_common.c +159 -0

180 lines not on this page · raw message

drivers/serial/cpm_uart/cpm_uart_cpm2.c +2 -2
index 5bd4508..882dbc1 100644
@@ -235,7 +235,7 @@ void scc4_lineif(struct uart_cpm_port *pinfo)
 int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con)
 {
 	int dpmemsz, memsz;
-	u8 *dp_mem;
+	u8 __iomem *dp_mem;
 	unsigned long dp_offset;
 	u8 *mem_addr;
 	dma_addr_t dma_addr = 0;
@@ -278,7 +278,7 @@ int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con)
 	pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos
 						       * pinfo->rx_fifosize);
 
-	pinfo->rx_bd_base = (cbd_t __iomem __force *)dp_mem;
+	pinfo->rx_bd_base = (cbd_t __iomem *)dp_mem;
 	pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos;
 
 	return 0;
include/asm-powerpc/commproc.h +12 -0
index 5dec324..0307c84 100644
@@ -19,6 +19,7 @@
 
 #include <asm/8xx_immap.h>
 #include <asm/ptrace.h>
+#include <asm/cpm.h>
 
 /* CPM Command register.
 */
@@ -54,6 +55,7 @@
 
 #define mk_cr_cmd(CH, CMD)	((CMD << 8) | (CH << 4))
 
+#ifndef CONFIG_PPC_CPM_NEW_BINDING
 /* The dual ported RAM is multi-functional.  Some areas can be (and are
  * being) used for microcode.  There is an area that can only be used
  * as data ram for buffer descriptors, which is all we use right now.
@@ -62,17 +64,27 @@
 #define CPM_DATAONLY_BASE	((uint)0x0800)
 #define CPM_DATAONLY_SIZE	((uint)0x0700)
 #define CPM_DP_NOSPACE		((uint)0x7fffffff)
+#endif
 
 /* Export the base address of the communication processor registers
  * and dual port ram.
  */
 extern cpm8xx_t __iomem *cpmp; /* Pointer to comm processor */
+
+#ifdef CONFIG_PPC_CPM_NEW_BINDING
+#define cpm_dpalloc cpm_muram_alloc
+#define cpm_dpfree cpm_muram_free
+#define cpm_dpram_addr cpm_muram_addr
+#define cpm_dpram_phys cpm_muram_dma
+#else
 extern unsigned long cpm_dpalloc(uint size, uint align);
 extern int cpm_dpfree(unsigned long offset);
 extern unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align);
 extern void cpm_dpdump(void);
 extern void *cpm_dpram_addr(unsigned long offset);
 extern uint cpm_dpram_phys(u8* addr);
+#endif
+
 extern void cpm_setbrg(uint brg, uint rate);
 
 extern uint m8xx_cpm_hostalloc(uint size);
include/asm-powerpc/cpm.h new file +14 -0
new file mode 100644
index 0000000..48df9f3
@@ -0,0 +1,14 @@
+#ifndef __CPM_H
+#define __CPM_H
+
+#include <linux/compiler.h>
+#include <linux/types.h>
+
+int cpm_muram_init(void);
+unsigned long cpm_muram_alloc(unsigned long size, unsigned long align);
+int cpm_muram_free(unsigned long offset);
+unsigned long cpm_muram_alloc_fixed(unsigned long offset, unsigned long size);
+void __iomem *cpm_muram_addr(unsigned long offset);
+dma_addr_t cpm_muram_dma(void __iomem *addr);
+
+#endif
include/asm-powerpc/cpm2.h +10 -0
index d7b57ac..e698b1d 100644
@@ -11,6 +11,7 @@
 #define __CPM2__
 
 #include <asm/immap_cpm2.h>
+#include <asm/cpm.h>
 
 /* CPM Command register.
 */
@@ -82,6 +83,7 @@
 #define mk_cr_cmd(PG, SBC, MCN, OP) \
 	((PG << 26) | (SBC << 21) | (MCN << 6) | OP)
 
+#ifndef CONFIG_PPC_CPM_NEW_BINDING
 /* Dual Port RAM addresses.  The first 16K is available for almost
  * any CPM use, so we put the BDs there.  The first 128 bytes are
  * used for SMC1 and SMC2 parameter RAM, so we start allocating
@@ -97,6 +99,7 @@
 #define CPM_DATAONLY_SIZE	((uint)(16 * 1024) - CPM_DATAONLY_BASE)
 #define CPM_FCC_SPECIAL_BASE	((uint)0x0000b000)
 #endif
+#endif
 
 /* The number of pages of host memory we allocate for CPM.  This is
  * done early in kernel initialization to get physically contiguous
@@ -109,11 +112,18 @@
  */
 extern cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor */
 
+#ifdef CONFIG_PPC_CPM_NEW_BINDING
+#define cpm_dpalloc cpm_muram_alloc
+#define cpm_dpfree cpm_muram_free
+#define cpm_dpram_addr cpm_muram_addr
+#else
 extern unsigned long cpm_dpalloc(uint size, uint align);
 extern int cpm_dpfree(unsigned long offset);
 extern unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align);
 extern void cpm_dpdump(void);
 extern void *cpm_dpram_addr(unsigned long offset);
+#endif
+
 extern void cpm_setbrg(uint brg, uint rate);
 extern void cpm2_fastbrg(uint brg, uint rate, int div16);
 extern void cpm2_reset(void);
Signature · 1 line
1.5.3.2
#1 lore raw

Hello Scott,

Looks good, only one note:

arch/powerpc/sysdev/cpm2_common.c static void cpm2_dpinit(void) · line 353

Quoted 13 lines · On Fri, 28 Sep 2007 14:06:16 -0500 Scott Wood wrote:
arch/powerpc/sysdev/cpm2_common.c +4 -1
+	im_dprambase = cpm2_immr->im_dprambase;
+
 	/* Attach the usable dpmem area */
 	/* XXX: This is actually crap. CPM_DATAONLY_BASE and
 	 * CPM_DATAONLY_SIZE is only a subset of the available dpram. It
 	 * varies with the processor and the microcode patches activated.
 	 * But the following should be at least safe.
 	 */
-	rh_attach_region(&cpm_dpmem_info, 0, r.end - r.start + 1);
+	rh_attach_region(&cpm_dpmem_info, CPM_MAP_ADDR + CPM_DATAONLY_BASE,
+	                 CPM_DATAONLY_SIZE);
 }

Can we have something to address upper comment? I mean,any way to have dpram beginning and size encoded in the device tree? We seem to be adding new bus, and still pulling the information from the defines. Maybe I miss something here, but it looks a bit odd.

Signature · 1 line
Sincerely, Vitaly
author
#2 lore raw
Quoted 17 lines · Vitaly Bordug

Hello Scott,

Looks good, only one note:

Quoted 10 lines · On Fri, 28 Sep 2007 14:06:16 -0500 Scott Wood wrote:
arch/powerpc/sysdev/cpm2_common.c +3 -1
+	im_dprambase = cpm2_immr->im_dprambase;
+
 	/* Attach the usable dpmem area */
 	/* XXX: This is actually crap. CPM_DATAONLY_BASE and
 	 * CPM_DATAONLY_SIZE is only a subset of the available dpram. It
 	 * varies with the processor and the microcode patches activated.
 	 * But the following should be at least safe.
 	 */
-	rh_attach_region(&cpm_dpmem_info, 0, r.end - r.start + 1);
+	rh_attach_region(&cpm_dpmem_info, CPM_MAP_ADDR + CPM_DATAONLY_BASE,
Quoted 8 lines

arch/powerpc/sysdev/cpm2_common.c static void cpm2_dpinit(void) · line 353

Quoted 3 lines
arch/powerpc/sysdev/cpm2_common.c +1 -0
+	                 CPM_DATAONLY_SIZE);
 }

Can we have something to address upper comment? I mean,any way to have dpram beginning and size encoded in the device tree? We seem to be adding new bus, and still pulling the information from the defines. Maybe I miss something here, but it looks a bit odd.

This bit is #ifndef CONFIG_PPC_CPM_NEW_BINDING (and can come out once all arch/powerpc boards are converted and tested -- I think it's just mpc866ads and CPM mpc85xx left to go). The new code in arch/powerpc/sysdev/cpm_common.c does get it from the device tree.

-Scott

#3 lore raw

Hello Scott,

Quoted 27 lines · On Fri, 28 Sep 2007 15:10:51 -0500 Scott Wood wrote:
Quoted 17 lines · Vitaly Bordug

Hello Scott,

Looks good, only one note:

Quoted 10 lines · On Fri, 28 Sep 2007 14:06:16 -0500 Scott Wood wrote:
arch/powerpc/sysdev/cpm2_common.c +3 -1
+	im_dprambase = cpm2_immr->im_dprambase;
+
 	/* Attach the usable dpmem area */
 	/* XXX: This is actually crap. CPM_DATAONLY_BASE and
 	 * CPM_DATAONLY_SIZE is only a subset of the available dpram. It
 	 * varies with the processor and the microcode patches activated.
 	 * But the following should be at least safe.
 	 */
-	rh_attach_region(&cpm_dpmem_info, 0, r.end - r.start + 1);
+	rh_attach_region(&cpm_dpmem_info, CPM_MAP_ADDR + CPM_DATAONLY_BASE,
Quoted 8 lines

arch/powerpc/sysdev/cpm2_common.c static void cpm2_dpinit(void) · line 353

Quoted 3 lines
arch/powerpc/sysdev/cpm2_common.c +1 -0
+	                 CPM_DATAONLY_SIZE);
 }

Can we have something to address upper comment? I mean,any way to have dpram beginning and size encoded in the device tree? We seem to be adding new bus, and still pulling the information from the defines. Maybe I miss something here, but it looks a bit odd.

Quoted 5 lines

This bit is #ifndef CONFIG_PPC_CPM_NEW_BINDING (and can come out once all arch/powerpc boards are converted and tested -- I think it's just mpc866ads and CPM mpc85xx left to go). The new code in arch/powerpc/sysdev/cpm_common.c does get it from the device tree.

ok, sorry for the noise. If so, I'll try to test-n-fix upper two soon. Unfortunately, there are many 8xx in ppc, that may depend on cpm (need to check).

Signature · 1 line
Sincerely, Vitaly
Acked-by on v1 1/1
#4 lore raw
In reply to Scott Wood

Kumar,

Realizing this may suffer a bit from cleanest-dts flame war, but anyway I pretty much see a lot of sense in getting this in during next merge window. Is this possible?

Quoted 12 lines · On Fri, 28 Sep 2007 14:06:16 -0500 Scott Wood wrote:

The way the current CPM binding describes available multi-user (a.k.a. dual-ported) RAM doesn't work well when there are multiple free regions, and it doesn't work at all if the region doesn't begin at the start of the muram area (as the hardware needs to be programmed with offsets into this area). The latter situation can happen with SMC UARTs on CPM2, as its parameter RAM is relocatable, u-boot puts it at zero, and the kernel doesn't support moving it.

It is now described with a muram node, similar to QE. The current CPM binding is sufficiently recent (i.e. never appeared in an official release) that compatibility with existing device trees is not an issue.

Quoted 5 lines

The code supporting the new binding is shared between cpm1 and cpm2, rather than remain separated. QE should be able to use this code as well, once minor fixes are made to its device trees.

Quoted 16 lines
---
 Documentation/powerpc/booting-without-of.txt |   40 ++++++-
 arch/powerpc/Kconfig.debug                   |    6 +-
 arch/powerpc/boot/cpm-serial.c               |   44 +++++--
 arch/powerpc/boot/dts/ep88xc.dts             |   13 ++-
 arch/powerpc/boot/dts/mpc8272ads.dts         |   11 ++
 arch/powerpc/boot/dts/mpc885ads.dts          |   13 ++-
 arch/powerpc/boot/dts/pq2fads.dts            |   13 ++-
 arch/powerpc/sysdev/commproc.c               |   11 ++-
 arch/powerpc/sysdev/cpm2_common.c            |   36 ++----
 arch/powerpc/sysdev/cpm_common.c             |  159 ++++++++++++++++++++++++++
 drivers/serial/cpm_uart/cpm_uart_cpm2.c      |    4 +-
 include/asm-powerpc/commproc.h               |   12 ++
 include/asm-powerpc/cpm.h                    |   14 +++
 include/asm-powerpc/cpm2.h                   |   10 ++
 14 files changed, 338 insertions(+), 48 deletions(-)
Signature · 1 line
Sincerely, Vitaly
#5 lore raw
Quoted 4 lines · Vitaly Bordug

Kumar,

Realizing this may suffer a bit from cleanest-dts flame war, but anyway I pretty much see a lot of sense in getting this in during next merge window. Is this possible?

Probably, does QE have muram? I can't keep these things straight.

- k

#6 lore raw

Hello Kumar,

Quoted 11 lines · On Fri, 28 Sep 2007 18:53:38 -0500 Kumar Gala wrote:
Quoted 5 lines · Vitaly Bordug

Kumar,

Realizing this may suffer a bit from cleanest-dts flame war, but anyway I pretty much see a lot of
sense in getting this in during next merge window. Is this possible?

Probably, does QE have muram? I can't keep these things straight.

cpms have dpram, qe has muram. these two are the same stuff in fact. Or you are asking about have QE stuff utilize such a binding at the same pass?

Signature · 1 line
Sincerely, Vitaly
#7 lore raw
Quoted 10 lines · Vitaly Bordug

Hello Kumar,

Quoted 5 lines · On Fri, 28 Sep 2007 18:53:38 -0500 Kumar Gala wrote:
Quoted 2 lines · Vitaly Bordug

Kumar,

Quoted 8 lines
Quoted 6 lines
Quoted 3 lines

Realizing this may suffer a bit from cleanest-dts flame war, but anyway I pretty much see a lot of
sense in getting this in during next merge window. Is this possible?

Probably, does QE have muram? I can't keep these things straight.

cpms have dpram, qe has muram. these two are the same stuff in fact. Or you are asking about have QE stuff utilize such a binding at the same pass?

I was asking about both these things.

- k

author
#8 lore raw
Quoted 5 lines · Kumar Gala
Quoted 1 line · Vitaly Bordug

cpms have dpram, qe has muram. these two are the same stuff in fact. Or you are asking about have QE stuff utilize such a binding at the same pass?

I was asking about both these things.

As stated in the commit message, QE can use this; it just needs a compatible entry in the data node.

-Scott

#9 lore raw
Quoted 6 lines · Scott Wood
Quoted 3 lines · Kumar Gala
Quoted 1 line · Vitaly Bordug

cpms have dpram, qe has muram. these two are the same stuff in fact. Or you are asking about have QE stuff utilize such a binding at the same pass?

I was asking about both these things.

As stated in the commit message, QE can use this; it just needs a compatible entry in the data node.

can some one look at that.

- k

#10 lore raw
Quoted 11 lines · Kumar Gala
Quoted 6 lines · Scott Wood
Quoted 3 lines · Kumar Gala
Quoted 1 line · Vitaly Bordug

cpms have dpram, qe has muram. these two are the same stuff in fact. Or you are asking about have QE stuff utilize such a binding at the same pass?

I was asking about both these things.

As stated in the commit message, QE can use this; it just needs a compatible entry in the data node.

can some one look at that.

Scott's proposal says this:

muram@0 {
	#address-cells = <1>;
	#size-cells = <1>;
	ranges = <0 0 10000>;

	data@0 {
		compatible = "fsl,cpm-muram-data";
		reg = <0 2000 9800 800>;
	};

Currently, the QE has this:

muram@10000 {
	device_type = "muram";
	ranges = <0 00010000 0000c000>;

	data-only@0{
		reg = <0 c000>;
	};
};

The code to process this node is qe_muram_init() in arch/powerpc/sysdev/qe_lib/qe.c.

	if ((np = of_find_node_by_name(NULL, "data-only")) != NULL) {
		address = *of_get_address(np, 0, &size, &flags);
		of_node_put(np);
		rh_attach_region(&qe_muram_info,
			(void *)address, (int)size);
	}

I think it would be trivial to modify this code to look for a Scott-style muram node. Heck, it could be modified to look for both, and so we'll maintain compatibility.

Signature · 2 lines
Timur Tabi
Linux Kernel Developer @ Freescale
author
#11 lore raw
Quoted 10 lines · Timur Tabi

The code to process this node is qe_muram_init() in arch/powerpc/sysdev/qe_lib/qe.c.

    if ((np = of_find_node_by_name(NULL, "data-only")) != NULL) {
        address = *of_get_address(np, 0, &size, &flags);
        of_node_put(np);
        rh_attach_region(&qe_muram_info,
            (void *)address, (int)size);
    }

I think it would be trivial to modify this code to look for a Scott-style muram node. Heck, it could be modified to look for both, and so we'll maintain compatibility.

I was thinking of just removing the muram code from qe_lib, and having it use the code in cpm_common.c.

BTW, searching the entire device tree for a node with the name "data-only", regardless of context, seems a bit insane to me.

-Scott

#12 lore raw
Quoted 1 line · Scott Wood

I was thinking of just removing the muram code from qe_lib, and having it use the code in cpm_common.c.

Do we want to have the QE library include CPM code at this point? I know we want to merge some QE and CPM code, but I would rather do that in one shot than piecemeal.

Quoted 1 line

BTW, searching the entire device tree for a node with the name "data-only", regardless of context, seems a bit insane to me.

Yes, I noticed that, too.

Signature · 2 lines
Timur Tabi
Linux Kernel Developer @ Freescale
author
#13 lore raw
Quoted 5 lines · Timur Tabi
Quoted 1 line · Scott Wood

I was thinking of just removing the muram code from qe_lib, and having it use the code in cpm_common.c.

Do we want to have the QE library include CPM code at this point? I know we want to merge some QE and CPM code, but I would rather do that in one shot than piecemeal.

I think piecemeal would be much more manageable.

-Scott

#14 lore raw
In reply to Timur Tabi
Quoted 5 lines · Timur Tabi
Quoted 1 line · Scott Wood

I was thinking of just removing the muram code from qe_lib, and having it use the code in cpm_common.c.

Do we want to have the QE library include CPM code at this point? I know we want to merge some QE and CPM code, but I would rather do that in one shot than piecemeal.

I think piecemeal/iterative is fine.

Quoted 3 lines
Quoted 1 line

BTW, searching the entire device tree for a node with the name "data-only", regardless of context, seems a bit insane to me.

Yes, I noticed that, too.

- k

Applied
#15 lore raw
In reply to Scott Wood
Quoted 12 lines · Scott Wood

The way the current CPM binding describes available multi-user (a.k.a. dual-ported) RAM doesn't work well when there are multiple free regions, and it doesn't work at all if the region doesn't begin at the start of the muram area (as the hardware needs to be programmed with offsets into this area). The latter situation can happen with SMC UARTs on CPM2, as its parameter RAM is relocatable, u-boot puts it at zero, and the kernel doesn't support moving it.

It is now described with a muram node, similar to QE. The current CPM binding is sufficiently recent (i.e. never appeared in an official release) that compatibility with existing device trees is not an issue.

Quoted 5 lines

The code supporting the new binding is shared between cpm1 and cpm2, rather than remain separated. QE should be able to use this code as well, once minor fixes are made to its device trees.

applied.

- k