mpc83xx: mpc8360 rev.2.1 erratum 2: replace rgmii-id with rgmii-rxid
PATCH 1/1 mpc83xx: mpc8360 rev.2.1 erratum 2: replace rgmii-id with rgmii-rxid
u-boot itself uses GMII mode on the 8360. Fix up UCC phy-connection-type properties in the device tree so the PHY gets configured for internal delay on RX only by the OS, as prescribed by mpc8360 rev. 2.1 pb mds erratum #2.
Signed-off-by Kim Phillips <[email protected]>
--- board/freescale/mpc8360emds/mpc8360emds.c | 31 +++++++++++++++++++++++++++++ 1 files changed, 31 insertions(+), 0 deletions(-)
board/freescale/mpc8360emds/mpc8360emds.c +31 -0
@@ -295,6 +295,7 @@ void sdram_init(void)#if defined(CONFIG_OF_BOARD_SETUP )void ft_board_setup (void *blob,bd_t *bd) { +const immap_t *immr = (immap_t *)CFG_IMMR ;#if defined(CONFIG_OF_FLAT_TREE )u32 *p;int len;
@@ -309,5 +310,35 @@ void ft_board_setup(void *blob, bd_t *bd)#ifdef CONFIG_PCI ft_pci_setup (blob, bd);#endif +/* +* mpc8360ea pb mds errata 2: RGMII timing +* if on mpc8360ea rev. 2.1, +* change both ucc phy-connection-types from rgmii-id to rgmii-rxid +*/ +if (immr->sysconf.spridr ==SPR_8360_REV21 || + immr->sysconf.spridr ==SPR_8360E_REV21 ) { +int nodeoffset; +void *prop; + +/* fixup UCC 1 if using rgmii-id mode */ + nodeoffset =fdt_find_node_by_path (blob,"/" OF_QE "/ucc at 2000" ); +if (nodeoffset >=0 ) { + prop =fdt_getprop (blob, nodeoffset, +"phy-connection-type" ,0 ); +if (prop && (strcmp (prop,"rgmii-id" ) ==0 )) +fdt_setprop (blob, nodeoffset,"phy-connection-type" , +"rgmii-rxid" ,sizeof ("rgmii-rxid" )); + } + +/* fixup UCC 2 if using rgmii-id mode */ + nodeoffset =fdt_find_node_by_path (blob,"/" OF_QE "/ucc at 3000" ); +if (nodeoffset >=0 ) { + prop =fdt_getprop (blob, nodeoffset, +"phy-connection-type" ,0 ); +if (prop && (strcmp (prop,"rgmii-id" ) ==0 )) +fdt_setprop (blob, nodeoffset,"phy-connection-type" , +"rgmii-rxid" ,sizeof ("rgmii-rxid" )); + } + } }#endif
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1.5.2.2