powerpc: Fix 8xx build breakage due to _tlbie changes
PATCH 1/1 powerpc: Fix 8xx build breakage due to _tlbie changes
My changes to _tlbie to fix 4xx unfortunately broke 8xx build in a couple of places. This fixes it.
Spotted by Olof Johansson
Signed-off-by Benjamin Herrenschmidt <[email protected]>
---
arch/powerpc/mm/mem.c | 2 +- arch/powerpc/mm/mmu_decl.h | 2 +- arch/ppc/mm/init.c | 2 +- arch/ppc/mm/mmu_decl.h | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-)
arch/powerpc/mm/mem.c +1 -1
@@ -464,7 +464,7 @@ void update_mmu_cache(struct vm_area_str* we invalidate the TLB here, thus avoiding dcbst * misbehaviour. */ -_tlbie (address); +_tlbie (address,0 /* 8xx doesn't care about PID */ );#endif if (!PageReserved (page) && !test_bit (PG_arch_1, &page->flags)) {
arch/ppc/mm/init.c +1 -1
@@ -561,7 +561,7 @@ void update_mmu_cache(struct vm_area_str* That means the zeroed TLB has to be invalidated * whenever a page miss occurs. */ -_tlbie (address); +_tlbie (address,0 /* 8xx doesn't care about PID */ );#endif if (!PageReserved (page) && !test_bit (PG_arch_1, &page->flags)) {
arch/powerpc/mm/mmu_decl.h +1 -1
@@ -56,7 +56,7 @@ extern unsigned long total_lowmem;* architectures. -- Dan */ #if defined(CONFIG_8xx) -#define flush_HPTE (X , va, pg) _tlbie(va) +#define flush_HPTE(X, va, pg) _tlbie(va, 0, /* 8xx doesn't care about PID */)#define MMU_init_hw () do { } while(0)#define mmu_mapin_ram () (0UL)
arch/ppc/mm/mmu_decl.h +1 -1
@@ -49,7 +49,7 @@ extern unsigned int num_tlbcam_entries;* architectures. -- Dan */ #if defined(CONFIG_8xx) -#define flush_HPTE (X , va, pg) _tlbie(va) +#define flush_HPTE(X, va, pg) _tlbie(va, 0 /* 8xx doesn't care about PID */)#define MMU_init_hw () do { } while(0)#define mmu_mapin_ram () (0UL)