MPC8360E-RDK: Device tree and board file
RFC PATCH 1/1 MPC8360E-RDK: Device tree and board file
This is new board made by Freescale Semiconductor Inc. and Logic Product Development.
Currently supported:
1. UEC1,2 (UEC2 doesn't work, but I'm sure this is firmware issue)
2. I2C
3. SPI
4. NS16550 serial
Not supported so far:
1. StMICRO NAND512W3A2BN6E, 512 Mbit
2. UEC3,4
3. QE SCCs (slow UCCs)
4. PCI
5. ADC AD7843
6. FHCI USB
7. Graphics controller, Fujitsu MB86277
---
Hi all,
That patch is early RFC:
I tend to submit patches just as they are mature enough, thus not bomb the list with long queues or huge patches. After I'll fix all upcoming issues with that basic support, it would be great if someone will merge it, thus I can start do incremental patches supporting this or that.
Below is MPC8360E-RDK basic support. I'm following latest fashion, so dts is v1. ;-)
Thanks,
p.s. not sending defconfig yet.
arch/powerpc/boot/dts/mpc836x_rdk.dts | 232 +++++++++++++++++++++++++++++ arch/powerpc/platforms/83xx/Kconfig | 10 +- arch/powerpc/platforms/83xx/Makefile | 1 + arch/powerpc/platforms/83xx/mpc836x_rdk.c | 109 ++++++++++++++ 4 files changed, 351 insertions(+), 1 deletions(-) create mode 100644 arch/powerpc/boot/dts/mpc836x_rdk.dts create mode 100644 arch/powerpc/platforms/83xx/mpc836x_rdk.c
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +232 -0
@@ -0,0 +1,232 @@ +/* + * MPC8360E RDK Device Tree Source + * + * Copyright 2006 Freescale Semiconductor Inc. + * Copyright 2007 MontaVista Software, Inc. + * Anton Vorontsov <[email protected]> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/dts-v1/; + +/ { + model = "MPC8360RDK"; + compatible = "MPC8360ERDK", "MPC836xRDK", "MPC83xxRDK"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8360@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <32>; + i-cache-line-size = <32>; + d-cache-size = <32768>; + i-cache-size = <32768>; + timebase-frequency = <0>; /* filled by u-boot */ + bus-frequency = <0>; /* filled by u-boot */ + clock-frequency = <0>; /* filled by u-boot */ + }; + }; + + soc8360@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + ranges = <0 0xe0000000 0x00100000>; + reg = <0xe0000000 0x00000200>; + bus-frequency = <0>; /* filled by u-boot */ + + wdt@200 { + device_type = "watchdog"; + compatible = "mpc83xx_wdt"; + reg = <0x200 0x100>; + }; + + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <14 8>; + interrupt-parent = <&ipic>; + dfsrr; + }; + + i2c@3100 { + #address-cells = <1>; + #size-cells = <0>; + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <0x3100 0x100>; + interrupts = <16 8>; + interrupt-parent = <&ipic>; + dfsrr; + }; + + serial@4500 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4500 0x100>; + clock-frequency = <0>; + interrupts = <9 8>; + interrupt-parent = <&ipic>; + }; + + serial@4600 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4600 0x100>; + clock-frequency = <0>; + interrupts = <10 8>; + interrupt-parent = <&ipic>; + }; + + crypto@30000 { + device_type = "crypto"; + model = "SEC2"; + compatible = "talitos"; + reg = <0x30000 0x10000>; + interrupts = <11 8>; + interrupt-parent = <&ipic>; + num-channels = <4>; + channel-fifo-len = <24>; + exec-units-mask = <0x0000007e>; + /* + * desc mask is for rev1.x, we need runtime fixup + * for >=2.x + */ + descriptor-types-mask = <0x01010ebf>; + }; + + ipic: pic@700 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <0x700 0x100>; + device_type = "ipic"; + }; + + par_io@1400 { + reg = <0x1400 0x100>; + num-ports = <7>; + }; + }; + + qe@e0100000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "qe"; + model = "QE"; + ranges = <0 0xe0100000 0x00100000>; + reg = <0xe0100000 0x480>; + brg-frequency = <0>; /* filled by u-boot */ + bus-frequency = <0>; /* filled by u-boot */ + + muram@10000 { + device_type = "muram"; + ranges = <0 0x00010000 0x0000c000>; + + data-only@0 { + reg = <0 0xc000>; + }; + }; + + spi@4c0 { + device_type = "spi"; + compatible = "fsl_spi"; + reg = <0x4c0 0x40>; + interrupts = <2>; + interrupt-parent = <&qeic>; + mode = "cpu"; + }; + + spi@500 { + device_type = "spi"; + compatible = "fsl_spi"; + reg = <0x500 0x40>; + interrupts = <1>; + interrupt-parent = <&qeic>; + mode = "cpu"; + }; + + usb@6c0 { + device_type = "usb"; + compatible = "qe_udc"; + reg = <0x6c0 0x40 0x8b00 0x100>; + interrupts = <11>; + interrupt-parent = <&qeic>; + mode = "slave"; + }; + + ucc@2000 { + device_type = "network"; + compatible = "ucc_geth"; + model = "UCC"; + device-id = <1>; + reg = <0x2000 0x200>; + interrupts = <32>; + interrupt-parent = <&qeic>; + local-mac-address = [ 00 00 00 00 00 00 ]; + rx-clock = <0>; + tx-clock = <25>; + phy-handle = <&phy2>; + phy-connection-type = "rgmii-id"; + }; + + ucc@3000 { + device_type = "network"; + compatible = "ucc_geth"; + model = "UCC"; + device-id = <2>; + reg = <0x3000 0x200>; + interrupts = <33>; + interrupt-parent = <&qeic>; + local-mac-address = [ 00 00 00 00 00 00 ]; + rx-clock = <0>; + tx-clock = <20>; + phy-handle = <&phy4>; + phy-connection-type = "rgmii-id"; + }; + + mdio@2120 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x2120 0x18>; + device_type = "mdio"; + compatible = "ucc_geth_phy"; + + phy2: ethernet-phy@02 { + interrupt-parent = <&ipic>; + /*interrupts = <17 8>;*/ + reg = <2>; + device_type = "ethernet-phy"; + }; + phy4: ethernet-phy@04 { + interrupt-parent = <&ipic>; + /*interrupts = <18 8>;*/ + reg = <4>; + device_type = "ethernet-phy"; + }; + }; + + qeic: qeic@80 { + interrupt-controller; + device_type = "qeic"; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x80 0x80>; + big-endian; + interrupts = <32 8 33 8>; + interrupt-parent = <&ipic>; + }; + }; +};
arch/powerpc/platforms/83xx/Kconfig +9 -1
@@ -50,6 +50,14 @@ config MPC836x_MDS help This option enables support for the MPC836x MDS Processor Board. +config MPC836x_RDK + bool "Freescale/Logic MPC836x RDK" + select DEFAULT_UIMAGE + select QUICC_ENGINE + help + This option enables support for the MPC836x RDK Processor Board, + also known as ZOOM PowerQUICC Kit. + endchoice config PPC_MPC831x
@@ -74,4 +82,4 @@ config PPC_MPC836x bool select PPC_UDBG_16550 select PPC_INDIRECT_PCI - default y if MPC836x_MDS + default y if MPC836x_MDS || MPC836x_RDK
arch/powerpc/platforms/83xx/Makefile +1 -0
@@ -9,3 +9,4 @@ obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o obj-$(CONFIG_MPC836x_MDS) += mpc836x_mds.o obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o +obj-$(CONFIG_MPC836x_RDK) += mpc836x_rdk.o
arch/powerpc/platforms/83xx/mpc836x_rdk.c new file +109 -0
109 lines not on this page · raw message
Signature · 1 line
1.5.2.2
Quoted 8 lines · On Mon, 10 Dec 2007 23:29:34 +0300 Anton Vorontsov <[email protected]>…
+++
b/arch/powerpc/platforms/83xx/mpc836x_rdk.carch/powerpc/platforms/83xx/mpc836x_rdk.c new file +6
-0+ +static void __init mpc836x_rdk_setup_arch (void ) +{ +struct device_node *np; + +if (ppc_md.progress)
arch/powerpc/platforms/83xx/mpc836x_rdk.c line 58
Quoted 10 lines
arch/powerpc/platforms/83xx/mpc836x_rdk.c new file +10
-0+ ppc_md.progress ("mpc836x_rdk_setup_arch()" ,0 ); + +#ifdef CONFIG_QUICC_ENGINE +qe_reset (); + + np =of_find_node_by_name (NULL ,"par_io" ); +if (np) +par_io_init (np); +else +pr_warning ("QE PIO not initialized!\n" );
of_node_put(np); ?
arch/powerpc/platforms/83xx/mpc836x_rdk.c line 96
Quoted 5 lines
arch/powerpc/platforms/83xx/mpc836x_rdk.c new file +5
-0+static int __init mpc836x_rdk_probe (void ) +{ +unsigned long root =of_get_flat_dt_root (); + +return of_flat_dt_is_compatible (root,"MPC836xRDK" );
You need to include asm/prom.h to use the flattened device tree accessors.
Signature · 3 lines
Cheers, Stephen Rothwell [email protected] http://www.canb.auug.org.au/~sfr/
Quoted 22 lines · Stephen Rothwell
Quoted 8 lines · On Mon, 10 Dec 2007 23:29:34 +0300 Anton Vorontsov <[email protected]>…
+++
b/arch/powerpc/platforms/83xx/mpc836x_rdk.carch/powerpc/platforms/83xx/mpc836x_rdk.c new file +6
-0+ +static void __init mpc836x_rdk_setup_arch (void ) +{ +struct device_node *np; + +if (ppc_md.progress)arch/powerpc/platforms/83xx/mpc836x_rdk.c line 58
Quoted 10 lines
arch/powerpc/platforms/83xx/mpc836x_rdk.c new file +10
-0+ ppc_md.progress ("mpc836x_rdk_setup_arch()" ,0 ); + +#ifdef CONFIG_QUICC_ENGINE +qe_reset (); + + np =of_find_node_by_name (NULL ,"par_io" ); +if (np) +par_io_init (np); +else +pr_warning ("QE PIO not initialized!\n" );
of_node_put(np); ?
Quoted 7 lines
arch/powerpc/platforms/83xx/mpc836x_rdk.c line 96
Quoted 5 lines
arch/powerpc/platforms/83xx/mpc836x_rdk.c new file +5
-0+static int __init mpc836x_rdk_probe (void ) +{ +unsigned long root =of_get_flat_dt_root (); + +return of_flat_dt_is_compatible (root,"MPC836xRDK" );You need to include
asm/prom.hto use the flattened device tree accessors.
Will fix. Much thanks for looking into this.
Signature · 4 lines
Anton Vorontsov email: [email protected] backup email: [email protected] irc://irc.freenode.net/bd2
Quoted 68 lines · Anton Vorontsov
This is new board made by Freescale Semiconductor Inc. and Logic Product Development.
Currently supported:
1. UEC1,2 (UEC2 doesn't work, but I'm sure this is firmware issue)
2. I2C
3. SPI
4. NS16550 serialNot supported so far:
1. StMICRO NAND512W3A2BN6E, 512 Mbit
2. UEC3,4
3. QE SCCs (slow UCCs)
4. PCI
5. ADC AD7843
6. FHCI USB
7. Graphics controller, Fujitsu MB86277Signed-off-by Anton Vorontsov <[email protected]>---
Hi all,
That patch is early RFC:
I tend to submit patches just as they are mature enough, thus not bomb the list with long queues or huge patches. After I'll fix all upcoming issues with that basic support, it would be great if someone will merge it, thus I can start do incremental patches supporting this or that.
Below is MPC8360E-RDK basic support. I'm following latest fashion, so dts is v1. ;-)
Thanks,
p.s. not sending defconfig yet.
arch/powerpc/boot/dts/mpc836x_rdk.dts| 232 ++++++++++++++++++++
+++++++++arch/powerpc/platforms/83xx/Kconfig | 10 +- arch/powerpc/platforms/83xx/Makefile | 1 + arch/powerpc/platforms/83xx/mpc836x_rdk.c | 109 ++++++++++++++ 4 files changed, 351 insertions(+), 1 deletions(-)create mode 100644
arch/powerpc/boot/dts/mpc836x_rdk.dtscreate mode 100644arch/powerpc/platforms/83xx/mpc836x_rdk.carch/powerpc/boot/dts/mpc836x_rdk.dts new file +8
-0@@ -0,0 +1,232 @@ +/* + * MPC8360E RDK Device Tree Source + * + * Copyright 2006 Freescale Semiconductor Inc. + * Copyright 2007 MontaVista Software, Inc. + * Anton Vorontsov <[email protected]> + * + * This program is free software; you can redistribute it and/ormodify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
arch/powerpc/boot/dts/mpc836x_rdk.dts line 21
Quoted 9 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +9
-0+ +/dts-v1/; + +/ { + model = "MPC8360RDK"; + compatible = "MPC8360ERDK", "MPC836xRDK", "MPC83xxRDK"; + #address-cells = <1>; + #size-cells = <1>; +
let's go ahead w/an aliases node:
aliases {
ethernet0 = &enet0;
ethernet1 = &enet1;
...
serial0 = &serial0;
serial1 = &serial1;
};Quoted 44 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +43
-0+ cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8360@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <32>; + i-cache-line-size = <32>; + d-cache-size = <32768>; + i-cache-size = <32768>; + timebase-frequency = <0>; /* filled by u-boot */ + bus-frequency = <0>; /* filled by u-boot */ + clock-frequency = <0>; /* filled by u-boot */ + }; + }; + + soc8360@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + ranges = <0 0xe0000000 0x00100000>; + reg = <0xe0000000 0x00000200>; + bus-frequency = <0>; /* filled by u-boot */ + + wdt@200 { + device_type = "watchdog"; + compatible = "mpc83xx_wdt"; + reg = <0x200 0x100>; + }; + + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <14 8>; + interrupt-parent = <&ipic>; + dfsrr; + }; + + i2c@3100 {
arch/powerpc/boot/dts/mpc836x_rdk.dts line 74
Quoted 10 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +10
-0+ #address-cells = <1>; + #size-cells = <0>; + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <0x3100 0x100>; + interrupts = <16 8>; + interrupt-parent = <&ipic>; + dfsrr; + }; +
Add serial labels:
serial0: serial@4500 {...Quoted 86 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +85
-0+ serial@4500 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4500 0x100>; + clock-frequency = <0>; + interrupts = <9 8>; + interrupt-parent = <&ipic>; + }; + + serial@4600 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4600 0x100>; + clock-frequency = <0>; + interrupts = <10 8>; + interrupt-parent = <&ipic>; + }; + + crypto@30000 { + device_type = "crypto"; + model = "SEC2"; + compatible = "talitos"; + reg = <0x30000 0x10000>; + interrupts = <11 8>; + interrupt-parent = <&ipic>; + num-channels = <4>; + channel-fifo-len = <24>; + exec-units-mask = <0x0000007e>; + /* + * desc mask is for rev1.x, we need runtime fixup + * for >=2.x + */ + descriptor-types-mask = <0x01010ebf>; + }; + + ipic: pic@700 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <0x700 0x100>; + device_type = "ipic"; + }; + + par_io@1400 { + reg = <0x1400 0x100>; + num-ports = <7>; + }; + }; + + qe@e0100000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "qe"; + model = "QE"; + ranges = <0 0xe0100000 0x00100000>; + reg = <0xe0100000 0x480>; + brg-frequency = <0>; /* filled by u-boot */ + bus-frequency = <0>; /* filled by u-boot */ + + muram@10000 { + device_type = "muram"; + ranges = <0 0x00010000 0x0000c000>; + + data-only@0 { + reg = <0 0xc000>; + }; + }; + + spi@4c0 { + device_type = "spi"; + compatible = "fsl_spi"; + reg = <0x4c0 0x40>; + interrupts = <2>; + interrupt-parent = <&qeic>; + mode = "cpu"; + }; + + spi@500 { + device_type = "spi"; + compatible = "fsl_spi"; + reg = <0x500 0x40>; + interrupts = <1>; + interrupt-parent = <&qeic>; + mode = "cpu"; + };
arch/powerpc/boot/dts/mpc836x_rdk.dts line 169
Quoted 10 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +10
-0+ + usb@6c0 { + device_type = "usb"; + compatible = "qe_udc"; + reg = <0x6c0 0x40 0x8b00 0x100>; + interrupts = <11>; + interrupt-parent = <&qeic>; + mode = "slave"; + }; +
ethernet labels
Quoted 54 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +53
-0+ ucc@2000 { + device_type = "network"; + compatible = "ucc_geth"; + model = "UCC"; + device-id = <1>; + reg = <0x2000 0x200>; + interrupts = <32>; + interrupt-parent = <&qeic>; + local-mac-address = [ 00 00 00 00 00 00 ]; + rx-clock = <0>; + tx-clock = <25>; + phy-handle = <&phy2>; + phy-connection-type = "rgmii-id"; + }; + + ucc@3000 { + device_type = "network"; + compatible = "ucc_geth"; + model = "UCC"; + device-id = <2>; + reg = <0x3000 0x200>; + interrupts = <33>; + interrupt-parent = <&qeic>; + local-mac-address = [ 00 00 00 00 00 00 ]; + rx-clock = <0>; + tx-clock = <20>; + phy-handle = <&phy4>; + phy-connection-type = "rgmii-id"; + }; + + mdio@2120 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x2120 0x18>; + device_type = "mdio"; + compatible = "ucc_geth_phy"; + + phy2: ethernet-phy@02 { + interrupt-parent = <&ipic>; + /*interrupts = <17 8>;*/ + reg = <2>; + device_type = "ethernet-phy"; + }; + phy4: ethernet-phy@04 { + interrupt-parent = <&ipic>; + /*interrupts = <18 8>;*/ + reg = <4>; + device_type = "ethernet-phy"; + }; + }; + + qeic: qeic@80 { + interrupt-controller;
arch/powerpc/boot/dts/mpc836x_rdk.dts line 232
Quoted 10 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +10
-0+ device_type = "qeic"; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x80 0x80>; + big-endian; + interrupts = <32 8 33 8>; + interrupt-parent = <&ipic>; + }; + }; +};
- k
On Tue, Dec 11, 2007 at 12:42:18PM -0600, Kumar Gala wrote:
[...]
Quoted 14 lines
let's go ahead w/an aliases node:
aliases { ethernet0 = &enet0; ethernet1 = &enet1; ... serial0 = &serial0; serial1 = &serial1; };Quoted 4 lines
(quoted diff) +3
-0+ cpus { + #address-cells = <1>; + #size-cells = <0>;
[...]
Quoted 6 lines
Quoted 1 line
+
Add serial labels:
serial0: serial@4500 {...Quoted 2 lines
(quoted diff) +1
-0+ serial@4500 {
[...]
Quoted 3 lines
ethernet labels
Review
Quoted 2 lines
(quoted diff) +1
-0+ ucc@2000 {
Done, thanks. As time goes by, I also added support for UCC7,4 (10/100 ethernet).
Plus, added compatible = "fsl,qe-pario"; into the par_io node, now I'm searching for it instead of "par_io" name.
This is still RFC, so nitpicking is highly appreciated.
- - - -
From: Anton Vorontsov <[email protected]>
[POWERPC] MPC8360E-RDK: Device tree and board file
This is new board made by Freescale Semiconductor Inc. and Logic Product Development.
Currently supported:
1. UEC1,2,7,4
2. I2C
3. SPI
4. NS16550 serial
Not supported so far:
1. StMICRO NAND512W3A2BN6E, 512 Mbit (supported with FSL UPM patches)
2. QE SCCs (slow UCCs, used as an UARTs)
3. PCI
4. ADC AD7843
5. FHCI USB
6. Graphics controller, Fujitsu MB86277
--- arch/powerpc/boot/dts/mpc836x_rdk.dts | 288 +++++++++++++++++++++++++++++ arch/powerpc/platforms/83xx/Kconfig | 11 +- arch/powerpc/platforms/83xx/Makefile | 1 + arch/powerpc/platforms/83xx/mpc836x_rdk.c | 112 +++++++++++ 4 files changed, 411 insertions(+), 1 deletions(-) create mode 100644 arch/powerpc/boot/dts/mpc836x_rdk.dts create mode 100644 arch/powerpc/platforms/83xx/mpc836x_rdk.c
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +288 -0
@@ -0,0 +1,288 @@ +/* + * MPC8360E RDK Device Tree Source + * + * Copyright 2006 Freescale Semiconductor Inc. + * Copyright 2007 MontaVista Software, Inc. + * Anton Vorontsov <[email protected]> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "MPC8360ERDK", "MPC836xRDK", "MPC83xxRDK"; + model = "MPC8360RDK"; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + ethernet0 = &enet0; + ethernet1 = &enet1; + ethernet2 = &enet2; + ethernet3 = &enet3; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8360@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <32>; + i-cache-line-size = <32>; + d-cache-size = <32768>; + i-cache-size = <32768>; + /* filled by u-boot */ + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + }; + + soc8360@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + ranges = <0 0xe0000000 0x00100000>; + reg = <0xe0000000 0x00000200>; + /* filled by u-boot */ + bus-frequency = <0>; + + wdt@200 { + device_type = "watchdog"; + compatible = "mpc83xx_wdt"; + reg = <0x200 0x100>; + }; + + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <14 8>; + interrupt-parent = <&ipic>; + dfsrr; + }; + + i2c@3100 { + #address-cells = <1>; + #size-cells = <0>; + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <0x3100 0x100>; + interrupts = <16 8>; + interrupt-parent = <&ipic>; + dfsrr; + }; + + serial0: serial@4500 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4500 0x100>; + interrupts = <9 8>; + interrupt-parent = <&ipic>; + /* filled by u-boot */ + clock-frequency = <0>; + }; + + serial1: serial@4600 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4600 0x100>; + interrupts = <10 8>; + interrupt-parent = <&ipic>; + /* filled by u-boot */ + clock-frequency = <0>; + }; + + crypto@30000 { + device_type = "crypto"; + model = "SEC2"; + compatible = "talitos"; + reg = <0x30000 0x10000>; + interrupts = <11 8>; + interrupt-parent = <&ipic>; + num-channels = <4>; + channel-fifo-len = <24>; + exec-units-mask = <0x0000007e>; + /* + * desc mask is for rev1.x, we need runtime fixup + * for >=2.x + */ + descriptor-types-mask = <0x01010ebf>; + }; + + ipic: pic@700 { + #address-cells = <0>; + #interrupt-cells = <2>; + interrupt-controller; + reg = <0x700 0x100>; + device_type = "ipic"; + }; + + par_io@1400 { + compatible = "fsl,qe-pario"; + reg = <0x1400 0x100>; + num-ports = <7>; + }; + }; + + qe@e0100000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "qe"; + model = "QE"; + ranges = <0 0xe0100000 0x00100000>; + reg = <0xe0100000 0x480>; + /* filled by u-boot */ + brg-frequency = <0>; + bus-frequency = <0>; + + muram@10000 { + device_type = "muram"; + ranges = <0 0x00010000 0x0000c000>; + + data-only@0 { + reg = <0 0xc000>; + }; + }; + + spi@4c0 { + device_type = "spi"; + compatible = "fsl_spi"; + reg = <0x4c0 0x40>; + interrupts = <2>; + interrupt-parent = <&qeic>; + mode = "cpu"; + }; + + spi@500 { + device_type = "spi"; + compatible = "fsl_spi"; + reg = <0x500 0x40>; + interrupts = <1>; + interrupt-parent = <&qeic>; + mode = "cpu"; + }; + + usb@6c0 { + device_type = "usb"; + compatible = "qe_udc"; + reg = <0x6c0 0x40 0x8b00 0x100>; + interrupts = <11>; + interrupt-parent = <&qeic>; + mode = "slave"; + }; + + enet0: ucc@2000 { + device_type = "network"; + compatible = "ucc_geth"; + model = "UCC"; + device-id = <1>; + reg = <0x2000 0x200>; + interrupts = <32>; + interrupt-parent = <&qeic>; + rx-clock = <0>; + tx-clock = <25>; + phy-handle = <&phy2>; + phy-connection-type = "rgmii-id"; + /* filled by u-boot */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + + enet1: ucc@3000 { + device_type = "network"; + compatible = "ucc_geth"; + model = "UCC"; + device-id = <2>; + reg = <0x3000 0x200>; + interrupts = <33>; + interrupt-parent = <&qeic>; + rx-clock = <0>; + tx-clock = <20>; + phy-handle = <&phy4>; + phy-connection-type = "rgmii-id"; + /* filled by u-boot */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + + enet2: ucc@2600 { + device_type = "network"; + compatible = "ucc_geth"; + model = "UCC"; + device-id = <7>; + reg = <0x2600 0x200>; + interrupts = <34>; + interrupt-parent = <&qeic>; + rx-clock = <36>; + tx-clock = <35>; + phy-handle = <&phy1>; + phy-connection-type = "mii"; + /* filled by u-boot */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + + enet3: ucc@3200 { + device_type = "network"; + compatible = "ucc_geth"; + model = "UCC"; + device-id = <4>; + reg = <0x3200 0x200>; + interrupts = <35>; + interrupt-parent = <&qeic>; + rx-clock = <24>; + tx-clock = <23>; + phy-handle = <&phy3>; + phy-connection-type = "mii"; + /* filled by u-boot */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + + mdio@2120 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x2120 0x18>; + device_type = "mdio"; + compatible = "ucc_geth_phy"; + + phy1: ethernet-phy@1 { + reg = <1>; + device_type = "ethernet-phy"; + }; + + phy2: ethernet-phy@2 { + reg = <2>; + device_type = "ethernet-phy"; + }; + + phy3: ethernet-phy@3 { + reg = <3>; + device_type = "ethernet-phy"; + }; + + phy4: ethernet-phy@4 { + reg = <4>; + device_type = "ethernet-phy"; + }; + }; + + qeic: qeic@80 { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + device_type = "qeic"; + reg = <0x80 0x80>; + big-endian; + interrupts = <32 8 33 8>; + interrupt-parent = <&ipic>; + }; + }; +};
arch/powerpc/platforms/83xx/Kconfig +10 -1
@@ -55,6 +55,15 @@ config MPC837x_MDS select DEFAULT_UIMAGE help This option enables support for the MPC837x MDS Processor Board. + +config MPC836x_RDK + bool "Freescale/Logic MPC836x RDK" + select DEFAULT_UIMAGE + select QUICC_ENGINE + help + This option enables support for the MPC836x RDK Processor Board, + also known as ZOOM PowerQUICC Kit. + endchoice config PPC_MPC831x
@@ -79,7 +88,7 @@ config PPC_MPC836x bool select PPC_UDBG_16550 select PPC_INDIRECT_PCI - default y if MPC836x_MDS + default y if MPC836x_MDS || MPC836x_RDK config PPC_MPC837x bool
arch/powerpc/platforms/83xx/Makefile +1 -0
@@ -10,3 +10,4 @@ obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o obj-$(CONFIG_MPC836x_MDS) += mpc836x_mds.o obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o obj-$(CONFIG_MPC837x_MDS) += mpc837x_mds.o +obj-$(CONFIG_MPC836x_RDK) += mpc836x_rdk.o
arch/powerpc/platforms/83xx/mpc836x_rdk.c new file +112 -0
112 lines not on this page · raw message
Signature · 1 line
1.5.2.2
Quoted 1 line · Anton Vorontsov
On Tue, Dec 11, 2007 at 12:42:18PM -0600, Kumar Gala wrote:
[snip]
arch/powerpc/boot/dts/mpc836x_rdk.dts line 59
Quoted 11 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +11
-0+ soc8360@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + ranges = <0 0xe0000000 0x00100000>; + reg = <0xe0000000 0x00000200>; + /* filled by u-boot */ + bus-frequency = <0>; + + wdt@200 { + device_type = "watchdog";
Drop this device_type.
arch/powerpc/boot/dts/mpc836x_rdk.dts line 67
Quoted 8 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +8
-0+ compatible = "mpc83xx_wdt"; + reg = <0x200 0x100>; + }; + + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + device_type = "i2c";
And this one.
[snip]
arch/powerpc/boot/dts/mpc836x_rdk.dts line 109
Quoted 4 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +4
-0+ crypto@30000 { + device_type = "crypto"; + model = "SEC2"; + compatible = "talitos";
This device_type/compatible/model stuff is also crap, although I suspect it needs to be fixed in the driver, as gianfar (finally) was.
[snip]
arch/powerpc/boot/dts/mpc836x_rdk.dts line 128
Quoted 6 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +6
-0+ ipic: pic@700 { + #address-cells = <0>; + #interrupt-cells = <2>; + interrupt-controller; + reg = <0x700 0x100>; + device_type = "ipic";
And drop this device_type.
[snip]
arch/powerpc/boot/dts/mpc836x_rdk.dts line 141
Quoted 4 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +4
-0+ qe@e0100000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "qe";
And this one.
This node needs a "compatible" too.
arch/powerpc/boot/dts/mpc836x_rdk.dts line 147
Quoted 6 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +6
-0+ model = "QE"; + ranges = <0 0xe0100000 0x00100000>; + reg = <0xe0100000 0x480>; + /* filled by u-boot */ + brg-frequency = <0>; + bus-frequency = <0>;
This should probably be clock-frequency, not bus-frequency. After all, it's a bus node, what other sort of frequency would it be.
arch/powerpc/boot/dts/mpc836x_rdk.dts line 150
Quoted 2 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +2
-0+ muram@10000 { + device_type = "muram";
And this device_type needs to go, too.
arch/powerpc/boot/dts/mpc836x_rdk.dts line 159
Quoted 9 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +9
-0+ ranges = <0 0x00010000 0x0000c000>; + + data-only@0 { + reg = <0 0xc000>; + }; + }; + + spi@4c0 { + device_type = "spi";
And this one.
[snip]
arch/powerpc/boot/dts/mpc836x_rdk.dts line 177
Quoted 2 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +2
-0+ usb@6c0 { + device_type = "usb";
And this one.
Quoted 6 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +6
-0+ compatible = "qe_udc"; + reg = <0x6c0 0x40 0x8b00 0x100>; + interrupts = <11>; + interrupt-parent = <&qeic>; + mode = "slave"; + };
[snip]
arch/powerpc/boot/dts/mpc836x_rdk.dts line 253
Quoted 5 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +5
-0+ mdio@2120 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x2120 0x18>; + device_type = "mdio";
And this one.
arch/powerpc/boot/dts/mpc836x_rdk.dts line 259
Quoted 6 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +6
-0+ compatible = "ucc_geth_phy"; + + phy1: ethernet-phy@1 { + reg = <1>; + device_type = "ethernet-phy"; + };
These phy nodes have basically no information in them. PHY nodes are optional - only include them if they actually have something useful to say (which would mean at least a compatible property).
[snip]
arch/powerpc/boot/dts/mpc836x_rdk.dts line 281
Quoted 5 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +5
-0+ qeic: qeic@80 { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + device_type = "qeic";
Drop this device_type, too.
And this node, too, needs a "compatible" property. Oh, and the node name should be "interrupt-controller@80" by the generic names convention.
Quoted 7 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +7
-0+ reg = <0x80 0x80>; + big-endian; + interrupts = <32 8 33 8>; + interrupt-parent = <&ipic>; + }; + }; +};
Signature · 4 lines
David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
Quoted 7 lines · David Gibson
arch/powerpc/boot/dts/mpc836x_rdk.dts line 109
Quoted 4 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +4
-0+ crypto@30000 { + device_type = "crypto"; + model = "SEC2"; + compatible = "talitos";This device_type/compatible/model stuff is also crap, although I suspect it needs to be fixed in the driver, as gianfar (finally) was.
The driver doesn't seem to be in-tree... Kim, what do(es) the external driver(s) look like? Do they use OF at all yet?
Quoted 8 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts line 147
Quoted 5 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +5
-0+ ranges = <0 0xe0100000 0x00100000>; + reg = <0xe0100000 0x480>; + /* filled by u-boot */ + brg-frequency = <0>; + bus-frequency = <0>;This should probably be clock-frequency, not bus-frequency. After all, it's a bus node, what other sort of frequency would it be.
Actually, it should probably be dropped altogether.
Quoted 4 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts line 150
Quoted 2 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +2
-0+ muram@10000 { + device_type = "muram";And this
device_typeneeds to go, too.
Yes, replace it with compatible = "fsl,cpm-muram".
Quoted 4 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts line 154
Quoted 4 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +4
-0+ ranges = <0 0x00010000 0x0000c000>; + + data-only@0 { + reg = <0 0xc000>;
compatible = "fsl,cpm-muram-data".
Quoted 7 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts line 259
Quoted 4 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +4
-0+ phy1: ethernet-phy@1 { + reg = <1>; + device_type = "ethernet-phy"; + };These phy nodes have basically no information in them. PHY nodes are optional -
If they are truly optional, then several Linux drivers (including ucc_geth, which this board uses) are broken, as they'll error out if there's no phy-handle (gianfar is even worse -- it looks like the fsl_soc code will crash in that case). But what do you propose they do in the absence of a phy-handle? Hope that probing only finds one phy?
Quoted 2 lines
only include them if they actually have something useful to say (which would mean at least a compatible property).
They *do* have useful information -- reg and phandle. The type of phy can be probed, but which phy corresponds to which ethernet can't.
-Scott
Quoted 11 lines · On Mon, 17 Dec 2007 11:03:04 -0600 Scott Wood <[email protected]> wrote:
Quoted 7 lines · David Gibson
arch/powerpc/boot/dts/mpc836x_rdk.dts line 109
Quoted 4 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +4
-0+ crypto@30000 { + device_type = "crypto"; + model = "SEC2"; + compatible = "talitos";This device_type/compatible/model stuff is also crap, although I suspect it needs to be fixed in the driver, as gianfar (finally) was.
The driver doesn't seem to be in-tree... Kim, what do(es) the external driver(s) look like? Do they use OF at all yet?
yes, it uses OF ifdef CONFIG_PPC_MERGE.
Kim
Quoted 6 lines · Kim Phillips
Quoted 2 lines · On Mon, 17 Dec 2007 11:03:04 -0600 Scott Wood <[email protected]> wrote:
The driver doesn't seem to be in-tree... Kim, what do(es) the external driver(s) look like? Do they use OF at all yet?
yes, it uses OF ifdef
CONFIG_PPC_MERGE.
Can we change it to look for something like a compatible of "fsl,sec2-crypto", with a fallback match on talitos for old device trees?
-Scott
Quoted 10 lines · On Mon, 17 Dec 2007 11:20:46 -0600 Scott Wood <[email protected]> wrote:
Quoted 6 lines · Kim Phillips
Quoted 2 lines · On Mon, 17 Dec 2007 11:03:04 -0600 Scott Wood <[email protected]> wrote:
The driver doesn't seem to be in-tree... Kim, what do(es) the external driver(s) look like? Do they use OF at all yet?
yes, it uses OF ifdef
CONFIG_PPC_MERGE.Can we change it to look for something like a compatible of "fsl,sec2-crypto", with a fallback match on talitos for old device trees?
yep, that looks good, I'll update the driver according to these changes.
Kim
Quoted 8 lines · On Mon, 17 Dec 2007 11:03:04 -0600 Scott Wood wrote:
Quoted 7 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts line 259
Quoted 4 lines
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +4
-0+ phy1: ethernet-phy@1 { + reg = <1>; + device_type = "ethernet-phy"; + };These phy nodes have basically no information in them. PHY nodes are optional -
Quoted 6 lines
If they are truly optional, then several Linux drivers (including
ucc_geth, which this board uses) are broken, as they'll error out if there's no phy-handle (gianfar is even worse -- it looks like thefsl_soccode will crash in that case). But what do you propose they do in the absence of a phy-handle? Hope that probing only finds one phy?
up-to-date fixed phy patch solves it in gianfar and fs_enet case. it is implied, that either there *are* phy nodes (and the code will look up their reg and phandle) or there should be fixed-link property in NIC node, that describes to what link stuff is really connected.
As a recap, we can kill this, but powerpc will live without SoC network stuff then (modulo 4xx). IOW, if we have to change bits around here, that should happen for all the boards, using current notation, or it will soon become maintenance hell.
Signature · 1 line
Sincerely, Vitaly
Quoted 9 lines · Vitaly Bordug
Quoted 7 lines · On Mon, 17 Dec 2007 11:03:04 -0600 Scott Wood wrote:
Quoted 2 lines
These phy nodes have basically no information in them. PHY nodes
are optional -If they are truly optional, then several Linux drivers (including
ucc_geth, which this board uses) are broken, as they'll error out if there's no phy-handle (gianfar is even worse -- it looks like
thefsl_soccode will crash in that case). But what do you propose
they do in the absence of a phy-handle? Hope that probing only
finds one phy?
Quoted 4 lines
up-to-date fixed phy patch solves it in gianfar and
fs_enetcase. it is implied, that either there *are* phy nodes (and the code will look up their reg and phandle) or there should be fixed-link property in NIC node, that describes to what link stuff is really connected.
There's a difference between the phy *node* being optional and phy *usage* being optional. :-)
-Scott
Quoted 11 lines · On Mon, 17 Dec 2007 12:48:17 -0600 Scott Wood wrote:
Quoted 10 lines · Vitaly Bordug
Quoted 8 lines · On Mon, 17 Dec 2007 11:03:04 -0600 Scott Wood wrote:
Quoted 2 lines
These phy nodes have basically no information in them. PHY nodes
are optional -If they are truly optional, then several Linux drivers (including
ucc_geth, which this board uses) are broken, as they'll error out if there's no phy-handle (gianfar is even worse -- it looks like thefsl_soccode will crash in that case). But what do you propose they do in the absence of a phy-handle? Hope that probing only finds one phy?
Quoted 9 lines
Quoted 5 lines
up-to-date fixed phy patch solves it in gianfar and
fs_enetcase. it is implied, that either there *are* phy nodes (and the code will look up their reg and phandle) or there should be fixed-link property in NIC node, that describes to what link stuff is really connected.There's a difference between the phy *node* being optional and phy *usage* being optional. :-)
And I am telling exactly that :) [added David to the loop since it was his issue].
currently phy nodes are required by the drivers (referring phy-handle), and I'd tell it looks pretty settled. We got rid of "pretend" phy nodes, but I don't think it makes sense to change the things for this particular board, especially since there is no example, how to do that in correct way.
Addition of compatible prop may be useful though, at least one may just look into dts to memorize what type of phys board has..
Signature · 1 line
Sincerely, Vitaly
Quoted 1 line · Scott Wood
On Mon, Dec 17, 2007 at 04:14:03PM +1100, David Gibson wrote:
[snip]
Quoted 8 lines
Quoted 2 lines
These phy nodes have basically no information in them. PHY nodes are optional -
If they are truly optional, then several Linux drivers (including
ucc_geth, which this board uses) are broken, as they'll error out if there's no phy-handle (gianfar is even worse -- it looks like thefsl_soccode will crash in that case). But what do you propose they do in the absence of a phy-handle? Hope that probing only finds one phy?
Sorry, I was misleading. PHY nodes may be optional depending on the hardware configuration; what circumstances they're necessary in is up to the MAC binding. Allowing the nodes to be omitted when there's only one PHY on the bus to be probed would be a common choice, for example.
In this case the driver and binding have been developed together and for the time being it does require PHY nodes, obviously. I'm saying that maybe that requirement ought to be changed.
Quoted 5 lines
Quoted 2 lines
only include them if they actually have something useful to say (which would mean at least a compatible property).
They *do* have useful information -- reg and phandle. The type of phy can be probed, but which phy corresponds to which ethernet can't.
Well, phandle is only used to find the phy node itself, so it doesn't count. The only piece of information there is the reg - the PHY id. Following a phandle to another node is a fairly complex way of finding a single integer.
Eh, I guess it's ok, but just directly giving the PHY id or a probe mask in the MAC node would also be fine (we do this for 4xx EMAC).
Signature · 4 lines
David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
Quoted 3 lines · David Gibson
In this case the driver and binding have been developed together and for the time being it does require PHY nodes, obviously. I'm saying that maybe that requirement ought to be changed.
I don't see why.
Quoted 7 lines
Well, phandle is only used to find the phy node itself, so it doesn't count. The only piece of information there is the reg - the PHY id. Following a phandle to another node is a fairly complex way of finding a single integer.
Eh, I guess it's ok, but just directly giving the PHY id or a probe mask in the MAC node would also be fine (we do this for 4xx EMAC).
It's not just a simple integer -- it also tells you which mdio bus it's on.
-Scott
Quoted 12 lines · Scott Wood
Quoted 3 lines · David Gibson
In this case the driver and binding have been developed together and for the time being it does require PHY nodes, obviously. I'm saying that maybe that requirement ought to be changed.
I don't see why.
Quoted 5 lines
Well, phandle is only used to find the phy node itself, so it doesn't count. The only piece of information there is the reg - the PHY id. Following a phandle to another node is a fairly complex way of finding a single integer.
Quoted 4 lines
Quoted 2 lines
Eh, I guess it's ok, but just directly giving the PHY id or a probe mask in the MAC node would also be fine (we do this for 4xx EMAC).
It's not just a simple integer -- it also tells you which mdio bus it's on.
Exactly. And at least one board (MPC8568E-MDS) using this feature:
UECs are using PHYs placed on the TSEC's MDIO bus. This is hardware configurable, and could be contrariwise: TSECs can use PHYs that are under control of UEC MDIO bus controller.
That's why we're naming PHYs as bus:phyid.
Signature · 4 lines
Anton Vorontsov email: [email protected] backup email: [email protected] irc://irc.freenode.net/bd2
Quoted 12 lines · Scott Wood
Quoted 3 lines · David Gibson
In this case the driver and binding have been developed together and for the time being it does require PHY nodes, obviously. I'm saying that maybe that requirement ought to be changed.
I don't see why.
Quoted 5 lines
Well, phandle is only used to find the phy node itself, so it doesn't count. The only piece of information there is the reg - the PHY id. Following a phandle to another node is a fairly complex way of finding a single integer.
Quoted 5 lines
Quoted 2 lines
Eh, I guess it's ok, but just directly giving the PHY id or a probe mask in the MAC node would also be fine (we do this for 4xx EMAC).
It's not just a simple integer -- it also tells you which mdio bus it's on.
Ah, good point. Ok, I withdraw my complaints.
Signature · 4 lines
David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
Quoted 1 line · Scott Wood
On Mon, Dec 17, 2007 at 04:14:03PM +1100, David Gibson wrote:
[...]
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arch/powerpc/boot/dts/mpc836x_rdk.dts line 147
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arch/powerpc/boot/dts/mpc836x_rdk.dts new file +5
-0+ ranges = <0 0xe0100000 0x00100000>; + reg = <0xe0100000 0x480>; + /* filled by u-boot */ + brg-frequency = <0>; + bus-frequency = <0>;This should probably be clock-frequency, not bus-frequency. After all, it's a bus node, what other sort of frequency would it be.
Actually, it should probably be dropped altogether.
No, we can't drop it. We can replace it by clock-frequency, but not just drop it, because bus frequency used by at least one driver -- spi_mpc83xx, to calculate proper clocks prescaling value.
As for renaming this property... well, I can rename it, but bus-frequency is so widely used: bootloaders are depending on this property, so we'll have to leave "legacy" code in linux to find legacy properties... thus RDK will by just some kind of white crow among others (at first).
Do we really want to rename it after all? It's not a problem per se, just want to hear some consensus.
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arch/powerpc/boot/dts/mpc836x_rdk.dts line 150
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arch/powerpc/boot/dts/mpc836x_rdk.dts new file +2
-0+ muram@10000 { + device_type = "muram";And this
device_typeneeds to go, too.Yes, replace it with compatible = "fsl,cpm-muram".
cpm? This is QE. I'll name it fsl,qe-muram. If you think it is fully compatible with cpm, then I'd better add "fsl,qe-muram", "fsl,cpm-muram".
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arch/powerpc/boot/dts/mpc836x_rdk.dts line 154
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arch/powerpc/boot/dts/mpc836x_rdk.dts new file +4
-0+ ranges = <0 0x00010000 0x0000c000>; + + data-only@0 { + reg = <0 0xc000>;compatible = "fsl,cpm-muram-data".
ditto.
Thanks,
Signature · 4 lines
Anton Vorontsov email: [email protected] backup email: [email protected] irc://irc.freenode.net/bd2
Quoted 3 lines · Anton Vorontsov
No, we can't drop it. We can replace it by clock-frequency, but not just drop it, because bus frequency used by at least one driver --
spi_mpc83xx, to calculate proper clocks prescaling value.
Hmm... maybe it should be using the brg frequency instead? I'll look at the documentation to see what the actual clock it's looking for is.
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Yes, replace it with compatible = "fsl,cpm-muram".
cpm? This is QE.
QE, CPM3, whatever. This isn't the marketing department. :-)
. I'll name it fsl,qe-muram. If you think it
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is fully compatible with cpm, then I'd better add
"fsl,qe-muram", "fsl,cpm-muram".
It's just memory, so there's not much to be incompatible. It's used for (mostly) the same things on QE and older CPMs, and *should* be matched by the same code even if it isn't today.
I'm OK with listing both QE and CPM if that's what you want to do, though.
-Scott
Quoted 7 lines · Scott Wood
Quoted 3 lines · Anton Vorontsov
No, we can't drop it. We can replace it by clock-frequency, but not just drop it, because bus frequency used by at least one driver --
spi_mpc83xx, to calculate proper clocks prescaling value.Hmm... maybe it should be using the brg frequency instead? I'll look at the documentation to see what the actual clock it's looking for is.
It says "QE clk / 2" for MPC8360 and MPC8323. BRG clk for MPC8555 (cpm2). "system clock" (SOC) for MPC8349.
I just looked into u-boot, for mpc83xx: brgclk = qe_clk / 2, so we can use it.
Thanks!
Signature · 4 lines
Anton Vorontsov email: [email protected] backup email: [email protected] irc://irc.freenode.net/bd2
Quoted 8 lines · Scott Wood
Quoted 7 lines · David Gibson
Review
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(quoted diff) +4
-0+ crypto@30000 { + device_type = "crypto"; + model = "SEC2"; + compatible = "talitos";This device_type/compatible/model stuff is also crap, although I suspect it needs to be fixed in the driver, as gianfar (finally) was.
Thanks everyone for the review! I did cleanups you suggested, and now this patch depends on "[PATCH 0/4] device_type/compatible cleanups" series.
Meanwhile added PCI and NOR flash support w/o partitions.
I still undecided on partitioning. 512KB u-boot, 128KB dtb, 2MB kernel, 4MB ramdisk, and less than 2MB for rootfs? Maybe get rid of rootfs on the NOR flash and let kernel be 3MB? Personally, I tend to not inculcate partition map into the dts at all.
How about that version?
- - - -
From: Anton Vorontsov <[email protected]>
[POWERPC] MPC8360E-RDK: Device tree and board file
This is new board made by Freescale Semiconductor Inc. and Logic Product Development.
Currently supported:
1. UEC1,2,7,4
2. I2C
3. SPI
4. NS16550 serial
5. PCI and miniPCI
6. Intel NOR StrataFlash X16 64Mbit PC28F640P30T85
Not supported so far:
1. StMICRO NAND512W3A2BN6E, 512 Mbit (supported with FSL UPM patches)
2. QE SCCs (slow UCCs, used as an UARTs)
3. ADC AD7843
4. FHCI USB
5. Graphics controller, Fujitsu MB86277
--- arch/powerpc/boot/dts/mpc836x_rdk.dts | 328 +++++++++++++++++++++++++++++ arch/powerpc/platforms/83xx/Kconfig | 11 +- arch/powerpc/platforms/83xx/Makefile | 1 + arch/powerpc/platforms/83xx/mpc836x_rdk.c | 118 +++++++++++ 4 files changed, 457 insertions(+), 1 deletions(-) create mode 100644 arch/powerpc/boot/dts/mpc836x_rdk.dts create mode 100644 arch/powerpc/platforms/83xx/mpc836x_rdk.c
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +328 -0
@@ -0,0 +1,328 @@ +/* + * MPC8360E RDK Device Tree Source + * + * Copyright 2006 Freescale Semiconductor Inc. + * Copyright 2007 MontaVista Software, Inc. + * Anton Vorontsov <[email protected]> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "MPC8360ERDK", "MPC836xRDK", "MPC83xxRDK"; + model = "MPC8360RDK"; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + ethernet0 = &enet0; + ethernet1 = &enet1; + ethernet2 = &enet2; + ethernet3 = &enet3; + pci0 = &pci0; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8360@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <32>; + i-cache-line-size = <32>; + d-cache-size = <32768>; + i-cache-size = <32768>; + /* filled by u-boot */ + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + }; + + soc8360@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + ranges = <0 0xe0000000 0x00100000>; + reg = <0xe0000000 0x00000200>; + /* filled by u-boot */ + bus-frequency = <0>; + + wdt@200 { + compatible = "mpc83xx_wdt"; + reg = <0x200 0x100>; + }; + + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <14 8>; + interrupt-parent = <&ipic>; + dfsrr; + }; + + i2c@3100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + compatible = "fsl-i2c"; + reg = <0x3100 0x100>; + interrupts = <16 8>; + interrupt-parent = <&ipic>; + dfsrr; + }; + + serial0: serial@4500 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4500 0x100>; + interrupts = <9 8>; + interrupt-parent = <&ipic>; + /* filled by u-boot */ + clock-frequency = <0>; + }; + + serial1: serial@4600 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4600 0x100>; + interrupts = <10 8>; + interrupt-parent = <&ipic>; + /* filled by u-boot */ + clock-frequency = <0>; + }; + + crypto@30000 { + compatible = "fsl,sec2-crypto"; + reg = <0x30000 0x10000>; + interrupts = <11 8>; + interrupt-parent = <&ipic>; + num-channels = <4>; + channel-fifo-len = <24>; + exec-units-mask = <0x0000007e>; + /* + * desc mask is for rev1.x, we need runtime fixup + * for >=2.x + */ + descriptor-types-mask = <0x01010ebf>; + }; + + ipic: interrupt-controller@700 { + #address-cells = <0>; + #interrupt-cells = <2>; + compatible = "fsl,pq2pro-pic", "fsl,ipic"; + interrupt-controller; + reg = <0x700 0x100>; + }; + + par_io@1400 { + compatible = "fsl,qe-pario"; + reg = <0x1400 0x100>; + num-ports = <7>; + }; + }; + + qe@e0100000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,qe"; + ranges = <0 0xe0100000 0x00100000>; + reg = <0xe0100000 0x480>; + /* filled by u-boot */ + brg-frequency = <0>; + + muram@10000 { + compatible = "fsl,qe-muram"; + ranges = <0 0x00010000 0x0000c000>; + + data-only@0 { + compatible = "fsl,qe-muram-data"; + reg = <0 0xc000>; + }; + }; + + spi@4c0 { + compatible = "fsl,spi"; + reg = <0x4c0 0x40>; + interrupts = <2>; + interrupt-parent = <&qeic>; + mode = "cpu-qe"; + }; + + spi@500 { + compatible = "fsl,spi"; + reg = <0x500 0x40>; + interrupts = <1>; + interrupt-parent = <&qeic>; + mode = "cpu-qe"; + }; + + usb@6c0 { + compatible = "qe_udc"; + reg = <0x6c0 0x40 0x8b00 0x100>; + interrupts = <11>; + interrupt-parent = <&qeic>; + mode = "slave"; + }; + + enet0: ucc@2000 { + device_type = "network"; + compatible = "ucc_geth"; + model = "UCC"; + device-id = <1>; + reg = <0x2000 0x200>; + interrupts = <32>; + interrupt-parent = <&qeic>; + rx-clock = <0>; + tx-clock = <25>; + phy-handle = <&phy2>; + phy-connection-type = "rgmii-id"; + /* filled by u-boot */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + + enet1: ucc@3000 { + device_type = "network"; + compatible = "ucc_geth"; + model = "UCC"; + device-id = <2>; + reg = <0x3000 0x200>; + interrupts = <33>; + interrupt-parent = <&qeic>; + rx-clock = <0>; + tx-clock = <20>; + phy-handle = <&phy4>; + phy-connection-type = "rgmii-id"; + /* filled by u-boot */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + + enet2: ucc@2600 { + device_type = "network"; + compatible = "ucc_geth"; + model = "UCC"; + device-id = <7>; + reg = <0x2600 0x200>; + interrupts = <34>; + interrupt-parent = <&qeic>; + rx-clock = <36>; + tx-clock = <35>; + phy-handle = <&phy1>; + phy-connection-type = "mii"; + /* filled by u-boot */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + + enet3: ucc@3200 { + device_type = "network"; + compatible = "ucc_geth"; + model = "UCC"; + device-id = <4>; + reg = <0x3200 0x200>; + interrupts = <35>; + interrupt-parent = <&qeic>; + rx-clock = <24>; + tx-clock = <23>; + phy-handle = <&phy3>; + phy-connection-type = "mii"; + /* filled by u-boot */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + + mdio@2120 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x2120 0x18>; + compatible = "fsl,ucc-mdio"; + + phy1: ethernet-phy@1 { + compatible = "national,DP83848VV"; + reg = <1>; + device_type = "ethernet-phy"; + }; + + phy2: ethernet-phy@2 { + compatible = "broadcom,BCM5481UA2KMLG"; + reg = <2>; + device_type = "ethernet-phy"; + }; + + phy3: ethernet-phy@3 { + compatible = "national,DP83848VV"; + reg = <3>; + device_type = "ethernet-phy"; + }; + + phy4: ethernet-phy@4 { + compatible = "broadcom,BCM5481UA2KMLG"; + reg = <4>; + device_type = "ethernet-phy"; + }; + }; + + qeic: interrupt-controller@80 { + #address-cells = <0>; + #interrupt-cells = <1>; + compatible = "fsl,qe-pic"; + interrupt-controller; + reg = <0x80 0x80>; + big-endian; + interrupts = <32 8 33 8>; + interrupt-parent = <&ipic>; + }; + }; + + localbus@e0005000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "fsl,mpc8360-localbus", + "fsl,pq2pro-localbus"; + reg = <0xe0005000 0xd8>; + ranges = <0 0 0xff800000 0x800000>; + + nor-flash@0,0 { + compatible = "intel,PC28F640P30T85", "cfi-flash"; + reg = <0 0 0x800000>; + bank-width = <2>; + device-width = <1>; + }; + }; + + pci0: pci@e0008500 { + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + compatible = "fsl,mpc8360-pci", "fsl,mpc8349-pci"; + reg = <0xe0008500 0x100>; + ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000 + 0x42000000 0 0x80000000 0x80000000 0 0x10000000 + 0x01000000 0 0xe0300000 0xe0300000 0 0x00100000>; + interrupts = <66 8>; + interrupt-parent = <&ipic>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = </* miniPCI0 IDSEL 0x14 AD20 */ + 0xa000 0 0 1 &ipic 18 8 + 0xa000 0 0 2 &ipic 19 8 + + /* PCI1 IDSEL 0x15 AD21 */ + 0xa800 0 0 1 &ipic 19 8 + 0xa800 0 0 2 &ipic 20 8 + 0xa800 0 0 3 &ipic 21 8 + 0xa800 0 0 4 &ipic 18 8>; + /* filled by u-boot */ + bus-range = <0 0>; + clock-frequency = <0>; + }; +};
arch/powerpc/platforms/83xx/Kconfig +10 -1
@@ -55,6 +55,15 @@ config MPC837x_MDS select DEFAULT_UIMAGE help This option enables support for the MPC837x MDS Processor Board. + +config MPC836x_RDK + bool "Freescale/Logic MPC836x RDK" + select DEFAULT_UIMAGE + select QUICC_ENGINE + help + This option enables support for the MPC836x RDK Processor Board, + also known as ZOOM PowerQUICC Kit. + endchoice config PPC_MPC831x
@@ -79,7 +88,7 @@ config PPC_MPC836x bool select PPC_UDBG_16550 select PPC_INDIRECT_PCI - default y if MPC836x_MDS + default y if MPC836x_MDS || MPC836x_RDK config PPC_MPC837x bool
arch/powerpc/platforms/83xx/Makefile +1 -0
@@ -10,3 +10,4 @@ obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o obj-$(CONFIG_MPC836x_MDS) += mpc836x_mds.o obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o obj-$(CONFIG_MPC837x_MDS) += mpc837x_mds.o +obj-$(CONFIG_MPC836x_RDK) += mpc836x_rdk.o
arch/powerpc/platforms/83xx/mpc836x_rdk.c new file +118 -0
118 lines not on this page · raw message
Signature · 1 line
1.5.2.2
Quoted 13 lines · Anton Vorontsov
arch/powerpc/boot/dts/mpc836x_rdk.dts new file +12
-0+ i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <14 8>; + interrupt-parent = <&ipic>; + dfsrr; + }; + + i2c@3100 {
arch/powerpc/boot/dts/mpc836x_rdk.dts line 85
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arch/powerpc/boot/dts/mpc836x_rdk.dts new file +10
-0+ #address-cells = <1>; + #size-cells = <0>; + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <0x3100 0x100>; + interrupts = <16 8>; + interrupt-parent = <&ipic>; + dfsrr; + }; +
In addition to David's comments. I've added cell-index:
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
interrupt-parent = < &ipic >;
dfsrr;
};
i2c@3100 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <f 8>;
interrupt-parent = < &ipic >;
dfsrr;
};