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: AR7 refresh

PATCH In review Matteo Croce 2 participants 8 messages Dec 27, 2007 – Dec 29, 2007

Subsystems (4)
Memory technology devices (MTD) MIPS TTY layer and serial drivers Char and misc drivers
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Matteo Croce

author
#0 lore raw

cover : AR7 refresh

Here are the AR7 patches refreshed against latest source

author
#1 lore raw

PATCH 1/6 : AR7: core

Sorry for posting a gzip file, but it seems that we have an issue with this patch on the mail server

Greetings,
Matteo Croce

author
#2 lore raw

PATCH 2/6 : AR7 mtd partition map

In reply to Matteo Croce
Signed-off-by Matteo Croce <[email protected]>
Signed-off-by Felix Fietkau <[email protected]>
Signed-off-by Eugene Konev <[email protected]>
drivers/mtd/Kconfig +6 -0
index 8848e8a..e421446 100644
@@ -150,6 +150,12 @@ config MTD_AFS_PARTS
 	  for your particular device. It won't happen automatically. The
 	  'armflash' map driver (CONFIG_MTD_ARMFLASH) does this, for example.
 
+config MTD_AR7_PARTS
+	tristate "TI AR7 partitioning support"
+	depends on MTD_PARTITIONS
+	---help---
+	  TI AR7 partitioning support
+
 comment "User Modules And Translation Layers"
 
 config MTD_CHAR
drivers/mtd/Makefile +1 -0
index 7f0b04b..95d1ed2 100644
@@ -11,6 +11,7 @@ obj-$(CONFIG_MTD_CONCAT)	+= mtdconcat.o
 obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o
 obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
 obj-$(CONFIG_MTD_AFS_PARTS)	+= afs.o
+obj-$(CONFIG_MTD_AR7_PARTS)	+= ar7part.o
 
 # 'Users' - code which presents functionality to userspace.
 obj-$(CONFIG_MTD_CHAR)		+= mtdchar.o
drivers/mtd/ar7part.c new file +146 -0

146 lines not on this page · raw message

author
#3 lore raw

PATCH 3/6 : AR7: VLYNQ bus

In reply to Matteo Croce
Signed-off-by Matteo Croce <[email protected]>
Signed-off-by Eugene Konev <[email protected]>
drivers/vlynq/Kconfig new file +13 -0
new file mode 100644
index 0000000..2c8ffe0
@@ -0,0 +1,13 @@
+menu "TI VLYNQ"
+
+config VLYNQ
+	bool "TI VLYNQ bus support"
+	depends on AR7 && EXPERIMENTAL
+	help
+	  Support for the TI VLYNQ bus
+
+	  The module will be called vlynq
+
+	  If unsure, say N
+
+endmenu
drivers/vlynq/Makefile new file +5 -0
new file mode 100644
index 0000000..b3f6114
@@ -0,0 +1,5 @@
+#
+# Makefile for kernel vlynq drivers
+#
+
+obj-$(CONFIG_VLYNQ) += vlynq.o
drivers/vlynq/vlynq.c new file +670 -0

670 lines not on this page · raw message

include/linux/vlynq.h new file +161 -0

161 lines not on this page · raw message

author
#4 lore raw

PATCH 4/6 : AR7 refresh

In reply to Matteo Croce
Signed-off-by Matteo Croce <[email protected]>
Signed-off-by Nicolas Thill <[email protected]>
drivers/char/Kconfig +9 -0
index ef1ed5d..307b8c8 100644
@@ -904,6 +904,15 @@ config MWAVE
 	  To compile this driver as a module, choose M here: the
 	  module will be called mwave.
 
+config AR7_GPIO
+	tristate "TI AR7 GPIO Support"
+	depends on AR7
+	help
+	  Give userspace access to the GPIO pins on the Texas Instruments AR7 
+	  processors.
+
+	  If compiled as a module, it will be called ar7_gpio.
+
 config SCx200_GPIO
 	tristate "NatSemi SCx200 GPIO Support"
 	depends on SCx200
drivers/char/Makefile +1 -0
index 07304d5..15b479d 100644
@@ -89,6 +89,7 @@ obj-$(CONFIG_COBALT_LCD)	+= lcd.o
 obj-$(CONFIG_PPDEV)		+= ppdev.o
 obj-$(CONFIG_NWBUTTON)		+= nwbutton.o
 obj-$(CONFIG_NWFLASH)		+= nwflash.o
+obj-$(CONFIG_AR7_GPIO)		+= ar7_gpio.o
 obj-$(CONFIG_SCx200_GPIO)	+= scx200_gpio.o
 obj-$(CONFIG_PC8736x_GPIO)	+= pc8736x_gpio.o
 obj-$(CONFIG_NSC_GPIO)		+= nsc_gpio.o
drivers/char/ar7_gpio.c new file +158 -0

158 lines not on this page · raw message

author
#5 lore raw

PATCH 5/6 : AR7: serial hack

In reply to Matteo Croce
Signed-off-by Matteo Croce <[email protected]>
Signed-off-by Florian Fainelli <[email protected]>
Signed-off-by Felix Fietkau <[email protected]>
Signed-off-by Nicolas Thill <[email protected]>
drivers/serial/8250.c +11 -0
index f94109c..94253b7 100644
@@ -267,6 +267,13 @@ static const struct serial8250_config uart_config[] = {
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
 		.flags		= UART_CAP_FIFO,
 	},
+	[PORT_AR7] = {
+		.name		= "TI-AR7",
+		.fifo_size	= 16,
+		.tx_loadsz	= 16,
+		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
+		.flags		= UART_CAP_FIFO | UART_CAP_AFE,
+	},
 };
 
 #if defined (CONFIG_SERIAL_8250_AU1X00)

@@ -2453,7 +2460,11 @@ static void serial8250_console_putchar(struct uart_port *port, int ch)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 
+#ifdef CONFIG_AR7
+	wait_for_xmitr(up, BOTH_EMPTY);
+#else
 	wait_for_xmitr(up, UART_LSR_THRE);
+#endif
 	serial_out(up, UART_TX, ch);
 }
include/linux/serialP.h +4 -0
index e811a61..cf71de9 100644
@@ -135,6 +135,10 @@ struct rs_multiport_struct {
  * the interrupt line _up_ instead of down, so if we register the IRQ
  * while the UART is in that state, we die in an IRQ storm. */
 #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2)
+#elif defined(CONFIG_AR7)
+/* This is how it is set up by bootloader... */
+#define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1 \
+			| UART_MCR_RTS | UART_MCR_DTR)
 #else
 #define ALPHA_KLUDGE_MCR 0
 #endif
include/linux/serial_core.h +1 -0
index 9963f81..10af5a2 100644
@@ -40,6 +40,7 @@
 #define PORT_NS16550A	14
 #define PORT_XSCALE	15
 #define PORT_RM9000	16	/* PMC-Sierra RM9xxx internal UART */
+#define PORT_AR7	16
 #define PORT_MAX_8250	16	/* max port ID */
 
 /*
#6 lore raw

Re: [PATCH][MIPS][5/6]: AR7: serial hack

Quoted 9 lines · Matteo Croce
Signed-off-by Matteo Croce <[email protected]>
Signed-off-by Florian Fainelli <[email protected]>
Signed-off-by Felix Fietkau <[email protected]>
Signed-off-by Nicolas Thill <[email protected]>
drivers/serial/8250.c +0 -0
index f94109c..94253b7 100644

[...]

drivers/serial/8250.c static void serial8250_console_putchar(struct uart_port *port, int ch) · line 2463

Quoted 5 lines
drivers/serial/8250.c +1 -0
@@ -2453,7 +2460,11 @@ static void serial8250_console_putchar(struct uart_port *port, int ch)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 
+#ifdef CONFIG_AR7

No board specific #ifdef's here please. You should use the driver's bug
mechanism for this.

Quoted 12 lines
drivers/serial/8250.c +3 -0
+	wait_for_xmitr(up, BOTH_EMPTY);
+#else
 	wait_for_xmitr(up, UART_LSR_THRE);
+#endif
 	serial_out(up, UART_TX, ch);
 }
include/linux/serialP.h +0 -0
index e811a61..cf71de9 100644

include/linux/serialP.h struct rs_multiport_struct { · line 141

Quoted 7 lines
include/linux/serialP.h +4 -0
@@ -135,6 +135,10 @@ struct rs_multiport_struct {
  * the interrupt line _up_ instead of down, so if we register the IRQ
  * while the UART is in that state, we die in an IRQ storm. */
 #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2)
+#elif defined(CONFIG_AR7)
+/* This is how it is set up by bootloader... */
+#define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1 \
+			| UART_MCR_RTS | UART_MCR_DTR)

I don't think you should load the driver with forced RTS and DTR.

include/linux/serial_core.h line 43

Quoted 12 lines
include/linux/serialP.h +0 -0
 #else
 #define ALPHA_KLUDGE_MCR 0
 #endif
include/linux/serial_core.h +1 -0
index 9963f81..10af5a2 100644
@@ -40,6 +40,7 @@
 #define PORT_NS16550A	14
 #define PORT_XSCALE	15
 #define PORT_RM9000	16	/* PMC-Sierra RM9xxx internal UART */
+#define PORT_AR7	16

Obviously, this should have been 16. :-)

WBR, Sergei