Use float32/64 instead of float/double

PATCH In review Aurelien Jarno 2 participants 5 messages Dec 30, 2007 – Jan 25, 2008

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Aurelien Jarno

author

2007-12-30 15:28 UTC #0 lore raw

PATCH 1/1 Use float32/64 instead of float/double

The patch below changes the float and double types into float32 and and float64 types in the PPC code. This doesn't change anything when using softfloat-native as the types are the same, but that helps compiling the PPC target with softfloat.

Index: target-ppc/op_helper.c
===================================================================
RCS file: /sources/qemu/qemu/target-ppc/op_helper.c,v retrieving revision 1.73

op_helper.c +9 -9

diff -u -d -p -r1.73 op_helper.c
@@ -467,7 +467,7 @@ static always_inline int fpisneg (float6
     return u.u >> 63 != 0;
 }
 
-static always_inline int isden (float f)
+static always_inline int isden (float64 f)
 {
     union {
         float64 f;

@@ -989,7 +993,7 @@ void do_fdiv (void)
 void do_fctiw (void)
 {
     union {
-        double d;
+        float64 d;
         uint64_t i;
     } p;

@@ -1014,7 +1018,7 @@ void do_fctiw (void)
 void do_fctiwz (void)
 {
     union {
-        double d;
+        float64 d;
         uint64_t i;
     } p;

@@ -1040,7 +1044,7 @@ void do_fctiwz (void)
 void do_fcfid (void)
 {
     union {
-        double d;
+        float64 d;
         uint64_t i;
     } p;

@@ -1051,7 +1055,7 @@ void do_fcfid (void)
 void do_fctid (void)
 {
     union {
-        double d;
+        float64 d;
         uint64_t i;
     } p;

@@ -1070,7 +1074,7 @@ void do_fctid (void)
 void do_fctidz (void)
 {
     union {
-        double d;
+        float64 d;
         uint64_t i;
     } p;

@@ -1268,7 +1272,7 @@ void do_fsqrt (void)
 void do_fre (void)
 {
     union {
-        double d;
+        float64 d;
         uint64_t i;
     } p;

@@ -1300,7 +1304,7 @@ void do_fre (void)
 void do_fres (void)
 {
     union {
-        double d;
+        float64 d;
         uint64_t i;
     } p;

@@ -1337,7 +1341,7 @@ void do_fres (void)
 void do_frsqrte (void)
 {
     union {
-        double d;
+        float64 d;
         uint64_t i;
     } p;

Index: target-ppc/op_helper_mem.h
===================================================================
RCS file: /sources/qemu/qemu/target-ppc/op_helper_mem.h,v retrieving revision 1.16

op_helper_mem.h +4 -4

diff -u -d -p -r1.16 op_helper_mem.h
@@ -316,10 +316,10 @@ void glue(do_POWER2_lfq, MEMSUFFIX) (voi
     FT1 = glue(ldfq, MEMSUFFIX)((uint32_t)(T0 + 4));
 }
 
-static always_inline double glue(ldfqr, MEMSUFFIX) (target_ulong EA)
+static always_inline float64 glue(ldfqr, MEMSUFFIX) (target_ulong EA)
 {
     union {
-        double d;
+        float64 d;
         uint64_t u;
     } u;

@@ -341,10 +341,10 @@ void glue(do_POWER2_stfq, MEMSUFFIX) (vo
     glue(stfq, MEMSUFFIX)((uint32_t)(T0 + 4), FT1);
 }
 
-static always_inline void glue(stfqr, MEMSUFFIX) (target_ulong EA, double d)
+static always_inline void glue(stfqr, MEMSUFFIX) (target_ulong EA, float64 d)
 {
     union {
-        double d;
+        float64 d;
         uint64_t u;
     } u;

Index: target-ppc/op_mem.h
===================================================================
RCS file: /sources/qemu/qemu/target-ppc/op_mem.h,v retrieving revision 1.27

op_mem.h +14 ~~-14~~

diff -u -d -p -r1.27 op_mem.h
@@ -267,7 +267,7 @@ void OPPROTO glue(glue(glue(op_st, name)
 }
 #endif
 
-static always_inline void glue(stfs, MEMSUFFIX) (target_ulong EA, double d)
+static always_inline void glue(stfs, MEMSUFFIX) (target_ulong EA, float64 d)
 {
     glue(stfl, MEMSUFFIX)(EA, float64_to_float32(d, &env->fp_status));
 }

@@ -279,10 +279,10 @@ static always_inline void glue(stfs, MEM
 #define WORD0 1
 #define WORD1 0
 #endif
-static always_inline void glue(stfiw, MEMSUFFIX) (target_ulong EA, double d)
+static always_inline void glue(stfiw, MEMSUFFIX) (target_ulong EA, float64 d)
 {
     union {
-        double d;
+        float64 d;
         uint32_t u[2];
     } u;

@@ -302,10 +302,10 @@ PPC_STF_OP_64(fs, stfs);
 PPC_STF_OP_64(fiw, stfiw);
 #endif
 
-static always_inline void glue(stfqr, MEMSUFFIX) (target_ulong EA, double d)
+void glue(stfqr, MEMSUFFIX) (target_ulong EA, float64 d)
 {
     union {
-        double d;
+        float64 d;
         uint64_t u;
     } u;

@@ -314,10 +314,10 @@ static always_inline void glue(stfqr, ME
     glue(stfq, MEMSUFFIX)(EA, u.d);
 }
 
-static always_inline void glue(stfsr, MEMSUFFIX) (target_ulong EA, double d)
+void glue(stfsr, MEMSUFFIX) (target_ulong EA, float64 d)
 {
     union {
-        float f;
+        float32 f;
         uint32_t u;
     } u;

@@ -326,10 +326,10 @@ static always_inline void glue(stfsr, ME
     glue(stfl, MEMSUFFIX)(EA, u.f);
 }
 
-static always_inline void glue(stfiwr, MEMSUFFIX) (target_ulong EA, double d)
+void glue(stfiwr, MEMSUFFIX) (target_ulong EA, float64 d)
 {
     union {
-        double d;
+        float64 d;
         uint64_t u;
     } u;

@@ -365,7 +365,7 @@ void OPPROTO glue(glue(glue(op_l, name),
 }
 #endif
 
-static always_inline double glue(ldfs, MEMSUFFIX) (target_ulong EA)
+float64 glue(ldfs, MEMSUFFIX) (target_ulong EA)
 {
     return float32_to_float64(glue(ldfl, MEMSUFFIX)(EA), &env->fp_status);
 }

@@ -377,10 +377,10 @@ PPC_LDF_OP_64(fd, ldfq);
 PPC_LDF_OP_64(fs, ldfs);
 #endif
 
-static always_inline double glue(ldfqr, MEMSUFFIX) (target_ulong EA)
+float64 glue(ldfqr, MEMSUFFIX) (target_ulong EA)
 {
     union {
-        double d;
+        float64 d;
         uint64_t u;
     } u;

@@ -390,10 +390,10 @@ static always_inline double glue(ldfqr, 
     return u.d;
 }
 
-static always_inline double glue(ldfsr, MEMSUFFIX) (target_ulong EA)
+float64 glue(ldfsr, MEMSUFFIX) (target_ulong EA)
 {
     union {
-        float f;
+        float32 f;
         uint32_t u;
     } u;

Signature · 4 lines

  .''`.  Aurelien Jarno	            | GPG: 1024D/F1BCDB73
 : :' :  Debian developer           | Electrical Engineer
 `. `'   [email protected]         | [email protected]
   `-    people.debian.org/~aurel32 | www.aurel32.net

Blue Swirl

2007-12-30 16:32 UTC #1 lore raw

Quoted 4 lines · Aurelien Jarno

The patch below changes the float and double types into float32 and and float64 types in the PPC code. This doesn't change anything when using softfloat-native as the types are the same, but that helps compiling the PPC target with softfloat.

You could also consider replacing the unions with the common definition CPU_DoubleU in cpu-all.h and also add CPU_FloatU.

Aurelien Jarno

author

2008-01-02 23:26 UTC #2 lore raw

Quoted 8 lines · Blue Swirl

Quoted 4 lines · Aurelien Jarno
The patch below changes the float and double types into float32 and and float64 types in the PPC code. This doesn't change anything when using softfloat-native as the types are the same, but that helps compiling the PPC target with softfloat.
You could also consider replacing the unions with the common definition CPU_DoubleU in cpu-all.h and also add CPU_FloatU.

Good idea. Please find and updated patch below.

The patch below uses the float32 and float64 types instead of the float and double types in the PPC code. This doesn't change anything when using softfloat-native as the types are the same, but that helps compiling the PPC target with softfloat.

It also defines a new union CPU_FloatU in addition to CPU_DoubleU, and use them instead of identical unions that are defined in numerous places.

 cpu-all.h                  |    5 
 target-ppc/op.c            |   83 ++------
 target-ppc/op_helper.c     |  418 +++++++++++++++------------------------------
 target-ppc/op_helper.h     |  104 +++--------
 target-ppc/op_helper_mem.h |   18 -
 target-ppc/op_mem.h        |   69 ++-----
 6 files changed, 240 insertions(+), 457 deletions(-)

Index: cpu-all.h
===================================================================
RCS file: /sources/qemu/qemu/cpu-all.h,v
retrieving revision 1.81

cpu-all.h +5 -0

diff -u -d -p -r1.81 cpu-all.h
@@ -116,6 +116,11 @@ static inline void tswap64s(uint64_t *s)
 #define bswaptls(s) bswap64s(s)
 #endif
 
+typedef union {
+    float32 f;
+    uint32_t l;
+} CPU_FloatU;
+
 /* NOTE: arm FPA is horrible as double 32 bit words are stored in big
    endian ! */
 typedef union {

Index: target-ppc/op.c
===================================================================
RCS file: /sources/qemu/qemu/target-ppc/op.c,v
retrieving revision 1.68

op.c +26 ~~-57~~

127 lines not on this page · raw message

Index: target-ppc/op_helper.c
===================================================================
RCS file: /sources/qemu/qemu/target-ppc/op_helper.c,v retrieving revision 1.73

op_helper.c +145 ~~-273~~

784 lines not on this page · raw message

Index: target-ppc/op_helper.h
===================================================================
RCS file: /sources/qemu/qemu/target-ppc/op_helper.h,v retrieving revision 1.30

op_helper.h +37 ~~-67~~

145 lines not on this page · raw message

Index: target-ppc/op_helper_mem.h
===================================================================
RCS file: /sources/qemu/qemu/target-ppc/op_helper_mem.h,v retrieving revision 1.16

op_helper_mem.h +6 ~~-12~~

diff -u -d -p -r1.16 op_helper_mem.h
@@ -316,15 +316,12 @@ void glue(do_POWER2_lfq, MEMSUFFIX) (voi
     FT1 = glue(ldfq, MEMSUFFIX)((uint32_t)(T0 + 4));
 }
 
-static always_inline double glue(ldfqr, MEMSUFFIX) (target_ulong EA)
+static always_inline float64 glue(ldfqr, MEMSUFFIX) (target_ulong EA)
 {
-    union {
-        double d;
-        uint64_t u;
-    } u;
+    CPU_DoubleU u;
 
     u.d = glue(ldfq, MEMSUFFIX)(EA);
-    u.u = bswap64(u.u);
+    u.ll = bswap64(u.ll);
 
     return u.d;
 }

@@ -341,15 +338,12 @@ void glue(do_POWER2_stfq, MEMSUFFIX) (vo
     glue(stfq, MEMSUFFIX)((uint32_t)(T0 + 4), FT1);
 }
 
-static always_inline void glue(stfqr, MEMSUFFIX) (target_ulong EA, double d)
+static always_inline void glue(stfqr, MEMSUFFIX) (target_ulong EA, float64 d)
 {
-    union {
-        double d;
-        uint64_t u;
-    } u;
+    CPU_DoubleU u;
 
     u.d = d;
-    u.u = bswap64(u.u);
+    u.ll = bswap64(u.ll);
     glue(stfq, MEMSUFFIX)(EA, u.d);
 }

Index: target-ppc/op_mem.h
===================================================================
RCS file: /sources/qemu/qemu/target-ppc/op_mem.h,v retrieving revision 1.27

op_mem.h +21 ~~-48~~

128 lines not on this page · raw message

Signature · 4 lines

  .''`.  Aurelien Jarno	            | GPG: 1024D/F1BCDB73
 : :' :  Debian developer           | Electrical Engineer
 `. `'   [email protected]         | [email protected]
   `-    people.debian.org/~aurel32 | www.aurel32.net

Aurelien Jarno

author

2008-01-23 15:20 UTC #3 lore raw

Quoted 21 lines · Aurelien Jarno

Quoted 7 lines · Blue Swirl
Quoted 4 lines · Aurelien Jarno
The patch below changes the float and double types into float32 and and float64 types in the PPC code. This doesn't change anything when using softfloat-native as the types are the same, but that helps compiling the PPC target with softfloat.
You could also consider replacing the unions with the common definition CPU_DoubleU in cpu-all.h and also add CPU_FloatU.
Good idea. Please find and updated patch below.
The patch below uses the float32 and float64 types instead of the float and double types in the PPC code. This doesn't change anything when using softfloat-native as the types are the same, but that helps compiling the PPC target with softfloat.
It also defines a new union CPU_FloatU in addition to CPU_DoubleU, and use them instead of identical unions that are defined in numerous places.

Quoted 7 lines

 cpu-all.h                  |    5 
 target-ppc/op.c            |   83 ++------
 target-ppc/op_helper.c     |  418 +++++++++++++++------------------------------
 target-ppc/op_helper.h     |  104 +++--------
 target-ppc/op_helper_mem.h |   18 -
 target-ppc/op_mem.h        |   69 ++-----
 6 files changed, 240 insertions(+), 457 deletions(-)

Any news about this patch?

Signature · 4 lines

  .''`.  Aurelien Jarno	            | GPG: 1024D/F1BCDB73
 : :' :  Debian developer           | Electrical Engineer
 `. `'   [email protected]         | [email protected]
   `-    people.debian.org/~aurel32 | www.aurel32.net

Blue Swirl

2008-01-25 20:33 UTC #4 lore raw

Quoted 31 lines · Aurelien Jarno

Quoted 21 lines · Aurelien Jarno
Quoted 7 lines · Blue Swirl
Quoted 4 lines · Aurelien Jarno
The patch below changes the float and double types into float32 and and float64 types in the PPC code. This doesn't change anything when using softfloat-native as the types are the same, but that helps compiling the PPC target with softfloat.
You could also consider replacing the unions with the common definition CPU_DoubleU in cpu-all.h and also add CPU_FloatU.
Good idea. Please find and updated patch below.
The patch below uses the float32 and float64 types instead of the float and double types in the PPC code. This doesn't change anything when using softfloat-native as the types are the same, but that helps compiling the PPC target with softfloat.
It also defines a new union CPU_FloatU in addition to CPU_DoubleU, and use them instead of identical unions that are defined in numerous places.
Quoted 7 lines
 cpu-all.h                  |    5
 target-ppc/op.c            |   83 ++------
 target-ppc/op_helper.c     |  418 +++++++++++++++------------------------------
 target-ppc/op_helper.h     |  104 +++--------
 target-ppc/op_helper_mem.h |   18 -
 target-ppc/op_mem.h        |   69 ++-----
 6 files changed, 240 insertions(+), 457 deletions(-)

Quoted 1 line

Any news about this patch?

Looks OK to me, but I can't test it. Anyway it's better to wait a bit for Fabrice's new code generator.