85xx: Remove cache config from configs.h

PATCH New Kumar Gala 4 participants 5 messages Jan 8, 2008 – Jan 9, 2008

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Kumar Gala

author

2008-01-08 07:24 UTC #0 lore raw

PATCH 1/1 85xx: Remove cache config from configs.h

Either use the standard defines in asm/cache.h or grab the information at runtime from the L1CFG SPR.

Also, minor cleanup in cache.h to make the code a bit more readable.

Signed-off-by Kumar Gala <[email protected]>

---

Again, this is my kernel.org u-boot tree in the mpc85xx branch and supercedes the previous patch that was fixup in the cache warnings.

 cpu/mpc85xx/start.S           |    9 +++++++--
 include/asm-ppc/cache.h       |   10 ++++------
 include/asm-ppc/processor.h   |    4 ++++
 include/configs/MPC8540ADS.h  |    7 -------
 include/configs/MPC8540EVAL.h |    7 -------
 include/configs/MPC8541CDS.h  |    7 -------
 include/configs/MPC8544DS.h   |    7 -------
 include/configs/MPC8548CDS.h  |    7 -------
 include/configs/MPC8555CDS.h  |    7 -------
 include/configs/MPC8560ADS.h  |    7 -------
 include/configs/MPC8568MDS.h  |    7 -------
 include/configs/MPC8641HPCN.h |    7 -------
 include/configs/PM854.h       |    7 -------
 include/configs/PM856.h       |    7 -------
 include/configs/SBC8540.h     |    7 -------
 include/configs/TQM85xx.h     |    7 -------
 include/configs/sbc8560.h     |    7 -------
 include/configs/stxgp3.h      |    7 -------
 include/configs/stxssa.h      |    7 -------
 19 files changed, 15 insertions(+), 120 deletions(-)

cpu/mpc85xx/start.S +7 -2

index b769ef8..b489d2f 100644
@@ -268,7 +268,10 @@ _start_e500:
 	 */
 	lis	r3,CFG_INIT_RAM_ADDR at h
 	ori	r3,r3,CFG_INIT_RAM_ADDR at l
-	li	r2,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE))
+	mfspr	r2, L1CFG0
+	andi.	r2, r2, 0x1ff
+	/* cache size * 1024 / (2 * L1 line size) */
+	slwi	r2, r2, (10 - 1 - L1_CACHE_SHIFT)
 	mtctr	r2
 	li	r0,0
 1:

@@ -1061,7 +1064,9 @@ unlock_ram_in_cache:
 	/* invalidate the INIT_RAM section */
 	lis	r3,(CFG_INIT_RAM_ADDR & ~31)@h
 	ori	r3,r3,(CFG_INIT_RAM_ADDR & ~31)@l
-	li	r4,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE))
+	mfspr	r4,L1CFG0
+	andi.	r4,r4,0x1ff
+	slwi	r4,r4,(10 - 1 - L1_CACHE_SHIFT)
 	mtctr	r4
 1:	icbi	r0,r3
 	dcbi	r0,r3

include/asm-ppc/cache.h +4 -6

index e29bfc2..9d9b971 100644
@@ -8,15 +8,13 @@
 #include <asm/processor.h>
 
 /* bytes per L1 cache line */
-#if !(defined(CONFIG_8xx) || defined(CONFIG_IOP480))
-#if defined(CONFIG_PPC64BRIDGE)
+#if defined(CONFIG_8xx) || defined(CONFIG_IOP480)
+#define	L1_CACHE_SHIFT	4
+#elif defined(CONFIG_PPC64BRIDGE)
 #define L1_CACHE_SHIFT	7
 #else
 #define	L1_CACHE_SHIFT	5
-#endif /* PPC64 */
-#else
-#define	L1_CACHE_SHIFT	4
-#endif /* !(8xx || IOP480) */
+#endif
 
 #define L1_CACHE_BYTES          (1 << L1_CACHE_SHIFT)

include/asm-ppc/processor.h +4 -0

index f58b38a..b0c7bae 100644
@@ -424,6 +424,8 @@
 #define SPRN_IVOR15	0x19f	/* Interrupt Vector Offset Register 15 */
 
 /* e500 definitions */
+#define SPRN_L1CFG0     0x203   /* L1 Cache Configuration Register 0 */
+#define SPRN_L1CFG1     0x204   /* L1 Cache Configuration Register 1 */
 #define SPRN_L1CSR0     0x3f2   /* L1 Data Cache Control and Status Register 0 */
 #define   L1CSR0_CPE            0x00010000	/* Data Cache Parity Enable */
 #define   L1CSR0_DCFI           0x00000002      /* Data Cache Flash Invalidate */

@@ -621,6 +623,8 @@
 #define MCSRR1	SPRN_MCSRR1
 #define L1CSR0	SPRN_L1CSR0
 #define L1CSR1	SPRN_L1CSR1
+#define L1CFG0	SPRN_L1CFG0
+#define L1CFG1	SPRN_L1CFG1
 #define MCSR	SPRN_MCSR
 #define MMUCSR0	SPRN_MMUCSR0
 #define BUCSR	SPRN_BUCSR

include/configs/MPC8540ADS.h +0 -7

index 35e1d63..afce7fb 100644
@@ -460,13 +460,6 @@
  */
 #define CFG_BOOTMAPSZ	(8 << 20)	/* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE		32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/MPC8540EVAL.h +0 -7

index e376c11..2868dcb 100644
@@ -319,13 +319,6 @@
  */
 #define CFG_BOOTMAPSZ	(8 << 20) 	/* Initial Memory map for Linux */
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE	32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value */
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/MPC8541CDS.h +0 -7

index d2e7237..c83382f 100644
@@ -450,13 +450,6 @@ extern unsigned long get_clock_freq(void);
  */
 #define CFG_BOOTMAPSZ	(8 << 20) 	/* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE	32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/MPC8544DS.h +0 -7

index 545a76c..5a96db5 100644
@@ -444,13 +444,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  */
 #define CFG_BOOTMAPSZ	(8 << 20)	/* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE		32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/MPC8548CDS.h +0 -7

index 3f382e5..90beb25 100644
@@ -512,13 +512,6 @@ extern unsigned long get_clock_freq(void);
  */
 #define CFG_BOOTMAPSZ	(8 << 20)	/* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE	32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/MPC8555CDS.h +0 -7

index 90ef3d6..76d673c 100644
@@ -450,13 +450,6 @@ extern unsigned long get_clock_freq(void);
  */
 #define CFG_BOOTMAPSZ	(8 << 20) 	/* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE	32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/MPC8560ADS.h +0 -7

index d4e0de0..5f10555 100644
@@ -490,13 +490,6 @@
  */
 #define CFG_BOOTMAPSZ	(8 << 20)	/* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE		32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/MPC8568MDS.h +0 -7

index 59f490e..2b089d9 100644
@@ -480,13 +480,6 @@ extern unsigned long get_clock_freq(void);
  */
 #define CFG_BOOTMAPSZ	(8 << 20) 	/* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE	32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/MPC8641HPCN.h +0 -7

index 6f87240..344f6b2 100644
@@ -577,13 +577,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  */
 #define CFG_BOOTMAPSZ	(8 << 20)	/* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE		32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-    #define CFG_CACHELINE_SHIFT	5	/*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/PM854.h +0 -7

index a6a1e73..f0d0399 100644
@@ -366,13 +366,6 @@
  */
 #define CFG_BOOTMAPSZ	(8 << 20)	/* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE		32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/PM856.h +0 -7

index 9a17e3d..ae2645c 100644
@@ -365,13 +365,6 @@
  */
 #define CFG_BOOTMAPSZ	(8 << 20)	/* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE		32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/SBC8540.h +0 -7

index f2c3699..3ca85b8 100644
@@ -395,13 +395,6 @@
  */
 #define CFG_BOOTMAPSZ		(8 << 20) /* Initial Memory map for Linux */
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE		32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-  #define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value */
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/TQM85xx.h +0 -7

index 6dbd392..f3b1a53 100644
@@ -417,13 +417,6 @@
  */
 #define CFG_BOOTMAPSZ	(8 << 20)	/* Initial Memory map for Linux	*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE		32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/*log base 2 of the above value	*/
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/sbc8560.h +0 -7

index defc428..b71ba78 100644
@@ -377,13 +377,6 @@
  */
 #define CFG_BOOTMAPSZ		(8 << 20) /* Initial Memory map for Linux */
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE		32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-  #define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value */
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/stxgp3.h +0 -7

index c5ae0cd..3baa32c 100644
@@ -357,13 +357,6 @@
  */
 #define CFG_BOOTMAPSZ		(8 << 20) /* Initial Memory map for Linux */
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE		32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value */
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/stxssa.h +0 -7

index c6e7953..9457bce 100644
@@ -391,13 +391,6 @@
  */
 #define CFG_BOOTMAPSZ		(8 << 20) /* Initial Memory map for Linux */
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE		32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value */
-#endif
-
 /*
  * Internal Definitions
  *

Signature · 1 line

1.5.3.7

Stefan Roese

2008-01-08 07:36 UTC #1 lore raw

PATCH 1/1 85xx: Remove cache config from configs.h

Quoted 4 lines · Kumar Gala

Either use the standard defines in asm/cache.h or grab the information at runtime from the L1CFG SPR.
Also, minor cleanup in cache.h to make the code a bit more readable.

This part looks good. Thanks.

Acked-by Stefan Roese <[email protected]>

I suggest that the other remaining PPC custodians (5xxx, 8xx, 82xx, 83xx, 86xx, etc) also remove the cache config defines from the board config files.

Best regards,
Stefan

=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================

Andy Fleming

Applied

2008-01-09 08:10 UTC #2 lore raw

PATCH 1/1 85xx: Remove cache config from configs.h

In reply to Kumar Gala

applied, thanks!

Quoted 407 lines · Kumar Gala

Either use the standard defines in asm/cache.h or grab the information at runtime from the L1CFG SPR.

Also, minor cleanup in cache.h to make the code a bit more readable.

Signed-off-by Kumar Gala <[email protected]>

---

Again, this is my kernel.org u-boot tree in the mpc85xx branch and supercedes the previous patch that was fixup in the cache warnings.

 cpu/mpc85xx/start.S           |    9 +++++++--
 include/asm-ppc/cache.h       |   10 ++++------
 include/asm-ppc/processor.h   |    4 ++++
 include/configs/MPC8540ADS.h  |    7 -------
 include/configs/MPC8540EVAL.h |    7 -------
 include/configs/MPC8541CDS.h  |    7 -------
 include/configs/MPC8544DS.h   |    7 -------
 include/configs/MPC8548CDS.h  |    7 -------
 include/configs/MPC8555CDS.h  |    7 -------
 include/configs/MPC8560ADS.h  |    7 -------
 include/configs/MPC8568MDS.h  |    7 -------
 include/configs/MPC8641HPCN.h |    7 -------
 include/configs/PM854.h       |    7 -------
 include/configs/PM856.h       |    7 -------
 include/configs/SBC8540.h     |    7 -------
 include/configs/TQM85xx.h     |    7 -------
 include/configs/sbc8560.h     |    7 -------
 include/configs/stxgp3.h      |    7 -------
 include/configs/stxssa.h      |    7 -------
 19 files changed, 15 insertions(+), 120 deletions(-)

cpu/mpc85xx/start.S +7 -2

index b769ef8..b489d2f 100644
@@ -268,7 +268,10 @@ _start_e500:
         */
        lis     r3,CFG_INIT_RAM_ADDR at h
        ori     r3,r3,CFG_INIT_RAM_ADDR at l
-       li      r2,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE))
+       mfspr   r2, L1CFG0
+       andi.   r2, r2, 0x1ff
+       /* cache size * 1024 / (2 * L1 line size) */
+       slwi    r2, r2, (10 - 1 - L1_CACHE_SHIFT)
        mtctr   r2
        li      r0,0
 1:

@@ -1061,7 +1064,9 @@ unlock_ram_in_cache:
        /* invalidate the INIT_RAM section */
        lis     r3,(CFG_INIT_RAM_ADDR & ~31)@h
        ori     r3,r3,(CFG_INIT_RAM_ADDR & ~31)@l
-       li      r4,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE))
+       mfspr   r4,L1CFG0
+       andi.   r4,r4,0x1ff
+       slwi    r4,r4,(10 - 1 - L1_CACHE_SHIFT)
        mtctr   r4
 1:     icbi    r0,r3
        dcbi    r0,r3

include/asm-ppc/cache.h +4 -6

index e29bfc2..9d9b971 100644
@@ -8,15 +8,13 @@
 #include <asm/processor.h>
 
 /* bytes per L1 cache line */
-#if !(defined(CONFIG_8xx) || defined(CONFIG_IOP480))
-#if defined(CONFIG_PPC64BRIDGE)
+#if defined(CONFIG_8xx) || defined(CONFIG_IOP480)
+#define        L1_CACHE_SHIFT  4
+#elif defined(CONFIG_PPC64BRIDGE)
 #define L1_CACHE_SHIFT 7
 #else
 #define        L1_CACHE_SHIFT  5
-#endif /* PPC64 */
-#else
-#define        L1_CACHE_SHIFT  4
-#endif /* !(8xx || IOP480) */
+#endif
 
 #define L1_CACHE_BYTES          (1 << L1_CACHE_SHIFT)

include/asm-ppc/processor.h +4 -0

index f58b38a..b0c7bae 100644
@@ -424,6 +424,8 @@
 #define SPRN_IVOR15    0x19f   /* Interrupt Vector Offset Register 15 */
 
 /* e500 definitions */
+#define SPRN_L1CFG0     0x203   /* L1 Cache Configuration Register 0 */
+#define SPRN_L1CFG1     0x204   /* L1 Cache Configuration Register 1 */
 #define SPRN_L1CSR0     0x3f2   /* L1 Data Cache Control and Status Register 0 */
 #define   L1CSR0_CPE            0x00010000     /* Data Cache Parity Enable */
 #define   L1CSR0_DCFI           0x00000002      /* Data Cache Flash Invalidate */

@@ -621,6 +623,8 @@
 #define MCSRR1 SPRN_MCSRR1
 #define L1CSR0 SPRN_L1CSR0
 #define L1CSR1 SPRN_L1CSR1
+#define L1CFG0 SPRN_L1CFG0
+#define L1CFG1 SPRN_L1CFG1
 #define MCSR   SPRN_MCSR
 #define MMUCSR0        SPRN_MMUCSR0
 #define BUCSR  SPRN_BUCSR

include/configs/MPC8540ADS.h +0 -7

index 35e1d63..afce7fb 100644
@@ -460,13 +460,6 @@
  */
 #define CFG_BOOTMAPSZ  (8 << 20)       /* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE                32768
-#define CFG_CACHELINE_SIZE     32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT    5       /*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/MPC8540EVAL.h +0 -7

index e376c11..2868dcb 100644
@@ -319,13 +319,6 @@
  */
 #define CFG_BOOTMAPSZ  (8 << 20)       /* Initial Memory map for Linux */
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE        32768
-#define CFG_CACHELINE_SIZE     32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT    5       /* log base 2 of the above value */
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/MPC8541CDS.h +0 -7

index d2e7237..c83382f 100644
@@ -450,13 +450,6 @@ extern unsigned long get_clock_freq(void);
  */
 #define CFG_BOOTMAPSZ  (8 << 20)       /* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE        32768
-#define CFG_CACHELINE_SIZE     32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT    5       /*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/MPC8544DS.h +0 -7

index 545a76c..5a96db5 100644
@@ -444,13 +444,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  */
 #define CFG_BOOTMAPSZ  (8 << 20)       /* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE                32768
-#define CFG_CACHELINE_SIZE     32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT    5       /*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/MPC8548CDS.h +0 -7

index 3f382e5..90beb25 100644
@@ -512,13 +512,6 @@ extern unsigned long get_clock_freq(void);
  */
 #define CFG_BOOTMAPSZ  (8 << 20)       /* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE        32768
-#define CFG_CACHELINE_SIZE     32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT    5       /*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/MPC8555CDS.h +0 -7

index 90ef3d6..76d673c 100644
@@ -450,13 +450,6 @@ extern unsigned long get_clock_freq(void);
  */
 #define CFG_BOOTMAPSZ  (8 << 20)       /* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE        32768
-#define CFG_CACHELINE_SIZE     32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT    5       /*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/MPC8560ADS.h +0 -7

index d4e0de0..5f10555 100644
@@ -490,13 +490,6 @@
  */
 #define CFG_BOOTMAPSZ  (8 << 20)       /* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE                32768
-#define CFG_CACHELINE_SIZE     32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT    5       /*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/MPC8568MDS.h +0 -7

index 59f490e..2b089d9 100644
@@ -480,13 +480,6 @@ extern unsigned long get_clock_freq(void);
  */
 #define CFG_BOOTMAPSZ  (8 << 20)       /* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE        32768
-#define CFG_CACHELINE_SIZE     32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT    5       /*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/MPC8641HPCN.h +0 -7

index 6f87240..344f6b2 100644
@@ -577,13 +577,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  */
 #define CFG_BOOTMAPSZ  (8 << 20)       /* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE                32768
-#define CFG_CACHELINE_SIZE     32
-#if defined(CONFIG_CMD_KGDB)
-    #define CFG_CACHELINE_SHIFT        5       /*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/PM854.h +0 -7

index a6a1e73..f0d0399 100644
@@ -366,13 +366,6 @@
  */
 #define CFG_BOOTMAPSZ  (8 << 20)       /* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE                32768
-#define CFG_CACHELINE_SIZE     32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT    5       /*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/PM856.h +0 -7

index 9a17e3d..ae2645c 100644
@@ -365,13 +365,6 @@
  */
 #define CFG_BOOTMAPSZ  (8 << 20)       /* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE                32768
-#define CFG_CACHELINE_SIZE     32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT    5       /*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/SBC8540.h +0 -7

index f2c3699..3ca85b8 100644
@@ -395,13 +395,6 @@
  */
 #define CFG_BOOTMAPSZ          (8 << 20) /* Initial Memory map for Linux */
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE                32768
-#define CFG_CACHELINE_SIZE     32
-#if defined(CONFIG_CMD_KGDB)
-  #define CFG_CACHELINE_SHIFT  5       /* log base 2 of the above value */
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/TQM85xx.h +0 -7

index 6dbd392..f3b1a53 100644
@@ -417,13 +417,6 @@
  */
 #define CFG_BOOTMAPSZ  (8 << 20)       /* Initial Memory map for Linux */
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE                32768
-#define CFG_CACHELINE_SIZE     32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT    5       /*log base 2 of the above value */
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/sbc8560.h +0 -7

index defc428..b71ba78 100644
@@ -377,13 +377,6 @@
  */
 #define CFG_BOOTMAPSZ          (8 << 20) /* Initial Memory map for Linux */
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE                32768
-#define CFG_CACHELINE_SIZE     32
-#if defined(CONFIG_CMD_KGDB)
-  #define CFG_CACHELINE_SHIFT  5       /* log base 2 of the above value */
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/stxgp3.h +0 -7

index c5ae0cd..3baa32c 100644
@@ -357,13 +357,6 @@
  */
 #define CFG_BOOTMAPSZ          (8 << 20) /* Initial Memory map for Linux */
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE                32768
-#define CFG_CACHELINE_SIZE     32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT    5       /* log base 2 of the above value */
-#endif
-
 /*
  * Internal Definitions
  *

include/configs/stxssa.h +0 -8

index c6e7953..9457bce 100644
@@ -391,13 +391,6 @@
  */
 #define CFG_BOOTMAPSZ          (8 << 20) /* Initial Memory map for Linux */
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE                32768
-#define CFG_CACHELINE_SIZE     32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT    5       /* log base 2 of the above value */
-#endif
-
 /*
  * Internal Definitions
  *
--

1.5.3.7

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Jon Loeliger

2008-01-09 18:12 UTC #3 lore raw

PATCH 1/1 85xx: Remove cache config from configs.h

In reply to Kumar Gala

Quoted 49 lines · Kumar Gala

Either use the standard defines in asm/cache.h or grab the information at runtime from the L1CFG SPR.

Also, minor cleanup in cache.h to make the code a bit more readable.

Signed-off-by Kumar Gala <[email protected]>

---

Again, this is my kernel.org u-boot tree in the mpc85xx branch and supercedes the previous patch that was fixup in the cache warnings.

 cpu/mpc85xx/start.S           |    9 +++++++--
 include/asm-ppc/cache.h       |   10 ++++------
 include/asm-ppc/processor.h   |    4 ++++
 include/configs/MPC8540ADS.h  |    7 -------
 include/configs/MPC8540EVAL.h |    7 -------
 include/configs/MPC8541CDS.h  |    7 -------
 include/configs/MPC8544DS.h   |    7 -------
 include/configs/MPC8548CDS.h  |    7 -------
 include/configs/MPC8555CDS.h  |    7 -------
 include/configs/MPC8560ADS.h  |    7 -------
 include/configs/MPC8568MDS.h  |    7 -------
 include/configs/MPC8641HPCN.h |    7 -------
 include/configs/PM854.h       |    7 -------
 include/configs/PM856.h       |    7 -------
 include/configs/SBC8540.h     |    7 -------
 include/configs/TQM85xx.h     |    7 -------
 include/configs/sbc8560.h     |    7 -------
 include/configs/stxgp3.h      |    7 -------
 include/configs/stxssa.h      |    7 -------
 19 files changed, 15 insertions(+), 120 deletions(-)

cpu/mpc85xx/start.S +4 -1

index b769ef8..b489d2f 100644
@@ -268,7 +268,10 @@ _start_e500:
 	 */
 	lis	r3,CFG_INIT_RAM_ADDR at h
 	ori	r3,r3,CFG_INIT_RAM_ADDR at l
-	li	r2,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE))
+	mfspr	r2, L1CFG0
+	andi.	r2, r2, 0x1ff
+	/* cache size * 1024 / (2 * L1 line size) */
+	slwi	r2, r2, (10 - 1 - L1_CACHE_SHIFT)
 	mtctr	r2
 	li	r0,0
 1:

cpu/mpc85xx/start.S unlock_ram_in_cache: · line 1072

Quoted 10 lines

cpu/mpc85xx/start.S +3 -1

@@ -1061,7 +1064,9 @@ unlock_ram_in_cache:
 	/* invalidate the INIT_RAM section */
 	lis	r3,(CFG_INIT_RAM_ADDR & ~31)@h
 	ori	r3,r3,(CFG_INIT_RAM_ADDR & ~31)@l
-	li	r4,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE))
+	mfspr	r4,L1CFG0
+	andi.	r4,r4,0x1ff
+	slwi	r4,r4,(10 - 1 - L1_CACHE_SHIFT)
 	mtctr	r4
 1:	icbi	r0,r3
 	dcbi	r0,r3

Kumar,

As per Stefan's question:

Those above changes weren't needed in the 86xx/start.S code, so you removed the cache bits from the MPC8641HPCN.h config file as well. Good.

I'm assuming that the generic/cache.h is now supplying the right defines for 8641, right?

Quoted 8 lines

include/configs/MPC8641HPCN.h +0 -0

index 6f87240..344f6b2 100644
@@ -577,13 +577,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  */
 #define CFG_BOOTMAPSZ	(8 << 20)	/* Initial Memory map for Linux*/

include/configs/MPC8641HPCN.h extern unsigned long get_board_sys_clk(unsigned long dummy); · line 582

Quoted 10 lines

include/configs/MPC8641HPCN.h +0 -7

-/* Cache Configuration */
-#define CFG_DCACHE_SIZE		32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-    #define CFG_CACHELINE_SHIFT	5	/*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *

You didn't apply the same removal to the MPC8610HPCD.h config file, though. Was that just oversight, or was there an issue with the generic values from cache.h now? If it is the former, I'll just knock out the obvious removal of that cache #defineage from the MPC8610HPCD.h file as well.

Thanks,
jdl

Kumar Gala

author

2008-01-09 19:19 UTC #4 lore raw

PATCH 1/1 85xx: Remove cache config from configs.h

Quoted 84 lines · Jon Loeliger

Quoted 59 lines · Kumar Gala
Either use the standard defines in asm/cache.h or grab the information
at runtime from the L1CFG SPR.
Also, minor cleanup in cache.h to make the code a bit more readable.
Signed-off-by Kumar Gala <[email protected]>
---
Again, this is my kernel.org u-boot tree in the mpc85xx branch and supercedes the previous patch that was fixup in the cache warnings.
cpu/mpc85xx/start.S           |    9 +++++++--
include/asm-ppc/cache.h       |   10 ++++------
include/asm-ppc/processor.h   |    4 ++++
include/configs/MPC8540ADS.h  |    7 -------
include/configs/MPC8540EVAL.h |    7 -------
include/configs/MPC8541CDS.h  |    7 -------
include/configs/MPC8544DS.h   |    7 -------
include/configs/MPC8548CDS.h  |    7 -------
include/configs/MPC8555CDS.h  |    7 -------
include/configs/MPC8560ADS.h  |    7 -------
include/configs/MPC8568MDS.h  |    7 -------
include/configs/MPC8641HPCN.h |    7 -------
include/configs/PM854.h       |    7 -------
include/configs/PM856.h       |    7 -------
include/configs/SBC8540.h     |    7 -------
include/configs/TQM85xx.h     |    7 -------
include/configs/sbc8560.h     |    7 -------
include/configs/stxgp3.h      |    7 -------
include/configs/stxssa.h      |    7 -------
19 files changed, 15 insertions(+), 120 deletions(-)
cpu/mpc85xx/start.S +4 -1
index b769ef8..b489d2f 100644
@@ -268,7 +268,10 @@ _start_e500:
 	 */
 	lis	r3,CFG_INIT_RAM_ADDR at h
 	ori	r3,r3,CFG_INIT_RAM_ADDR at l
-	li	r2,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE))
+	mfspr	r2, L1CFG0
+	andi.	r2, r2, 0x1ff
+	/* cache size * 1024 / (2 * L1 line size) */
+	slwi	r2, r2, (10 - 1 - L1_CACHE_SHIFT)
 	mtctr	r2
 	li	r0,0
1:
cpu/mpc85xx/start.S +3 -1
@@ -1061,7 +1064,9 @@ unlock_ram_in_cache:
 	/* invalidate the INIT_RAM section */
 	lis	r3,(CFG_INIT_RAM_ADDR & ~31)@h
 	ori	r3,r3,(CFG_INIT_RAM_ADDR & ~31)@l
-	li	r4,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE))
+	mfspr	r4,L1CFG0
+	andi.	r4,r4,0x1ff
+	slwi	r4,r4,(10 - 1 - L1_CACHE_SHIFT)
 	mtctr	r4
1: icbi r0,r3
Quoted 1 line
	dcbi	r0,r3
Kumar,
As per Stefan's question:
Those above changes weren't needed in the 86xx/start.S code, so you removed the cache bits from the MPC8641HPCN.h config file as well. Good.
I'm assuming that the generic/cache.h is now supplying the right defines for 8641, right?
Quoted 10 lines
include/configs/ renamed from include/configs/MPC8641HPCN.h +0 -0
MPC8641HPCN.h
index 6f87240..344f6b2 100644
include/configs/MPC8641HPCN.h +0 -0
@@ -577,13 +577,6 @@ extern unsigned long  
 get_board_sys_clk(unsigned long dummy);
 */
 #define CFG_BOOTMAPSZ	(8 << 20)	/* Initial Memory map for Linux*/
 

Quoted 16 lines

Quoted 10 lines
include/configs/MPC8641HPCN.h +0 -7
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE		32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-    #define CFG_CACHELINE_SHIFT	5	/*log base 2 of the above value*/
-#endif
-
 /*
 * Internal Definitions
*
You didn't apply the same removal to the MPC8610HPCD.h config file, though. Was that just oversight, or was there an issue with the generic values from cache.h now? If it is the former, I'll just knock out the obvious removal of that cache #defineage from the MPC8610HPCD.h file as well.

I wasn't intending to touch 86xx with my patch.. but since it works out good :)

[cscope was a bit too generous on my, but I see you've fixed up 8610 so everything works out in the end]

- k