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: AR7 GPIO

PATCH In review Matteo Croce 2 participants 3 messages Jan 12, 2008 – Jan 13, 2008

Subsystems (2)
MIPS Char and misc drivers
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Matteo Croce

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#0 lore raw

PATCH 1/1 : AR7 GPIO

This new patch caches addresses as suggested by Atsushi Nemoto

Signed-off-by Matteo Croce <[email protected]>
Signed-off-by Nicolas Thill <[email protected]>
Signed-off-by Florian Fainelli <[email protected]>
drivers/char/Kconfig +9 -0
index ef1ed5d..307b8c8 100644
@@ -904,6 +904,15 @@ config MWAVE
 	  To compile this driver as a module, choose M here: the
 	  module will be called mwave.
 
+config AR7_GPIO
+	tristate "TI AR7 GPIO Support"
+	depends on AR7
+	help
+	  Give userspace access to the GPIO pins on the Texas Instruments AR7 
+	  processors.
+
+	  If compiled as a module, it will be called ar7_gpio.
+
 config SCx200_GPIO
 	tristate "NatSemi SCx200 GPIO Support"
 	depends on SCx200
drivers/char/Makefile +1 -0
index 07304d5..15b479d 100644
@@ -89,6 +89,7 @@ obj-$(CONFIG_COBALT_LCD)	+= lcd.o
 obj-$(CONFIG_PPDEV)		+= ppdev.o
 obj-$(CONFIG_NWBUTTON)		+= nwbutton.o
 obj-$(CONFIG_NWFLASH)		+= nwflash.o
+obj-$(CONFIG_AR7_GPIO)		+= ar7_gpio.o
 obj-$(CONFIG_SCx200_GPIO)	+= scx200_gpio.o
 obj-$(CONFIG_PC8736x_GPIO)	+= pc8736x_gpio.o
 obj-$(CONFIG_NSC_GPIO)		+= nsc_gpio.o
drivers/char/ar7_gpio.c new file +158 -0

158 lines not on this page · raw message

include/asm-mips/ar7/gpio.h new file +117 -0

117 lines not on this page · raw message

#1 lore raw
Quoted 1 line · Matteo Croce

This new patch caches addresses as suggested by Atsushi Nemoto

Well, I cannot remember any suggestion about caches. I just said you should kill all volatiles.

include/asm-mips/ar7/gpio.h line 40

Quoted 12 lines
include/asm-mips/ar7/gpio.h new file +12 -0
+static inline int gpio_get_value(unsigned gpio)
+{
+	static unsigned addr;
+
+	if (!addr) {
+		void __iomem *gpio_in = (void __iomem *)
+				KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_INPUT);
+		addr = readl(gpio_in);
+	}
+
+	return addr & (1 << gpio);
+}

Anyway, this is absolutely broken. You are caching the GPIO value, not the address.

---
Atsushi Nemoto

#2 lore raw
In reply to Matteo Croce
Quoted 4 lines · Matteo Croce
include/asm-mips/ar7/gpio.h new file +4 -0
+static inline void gpio_set_value(unsigned gpio, int value)
+{
+	static void __iomem *gpio_out;
+	unsigned tmp;

include/asm-mips/ar7/gpio.h line 55

Quoted 10 lines
include/asm-mips/ar7/gpio.h new file +10 -0
+
+	if (!gpio_out)
+		gpio_out = (void __iomem *)
+				KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_OUTPUT);
+
+	tmp = readl(gpio_out) & ~(1 << gpio);
+	if (value)
+		tmp |= 1 << gpio;
+	writel(tmp, gpio_out);
+}

It seems the compiler can calculate gpio_out value at compile time. So I think caching it just make the function slower.

---
Atsushi Nemoto