Add the RapidIO framework for U-Boot

PATCH New Zhang Wei 3 participants 13 messages Jan 10, 2008 – Jan 12, 2008 Kbuild

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Zhang Wei

author

2008-01-10 11:38 UTC #0 lore raw

PATCH 1/3 Add the RapidIO framework for U-Boot

The patch adds the RapidIO framework into U-Boot. The board configuration can be added into individual rio_init_board() function. Some functions about RapidIO can be added later.

The support for Freescale PowerPC RapidIO controller is also added.

Signed-off-by Zhang Wei <[email protected]>

---
 Makefile              |    1 +
 drivers/rio/Makefile  |   35 ++++++++++++++++++++++++++
 drivers/rio/fsl_rio.c |   64 ++++++++++++++++++++++++++++++++++++++++++++++++
 drivers/rio/rio.c     |   65 +++++++++++++++++++++++++++++++++++++++++++++++++
 include/common.h      |    3 ++
 include/rio.h         |   46 ++++++++++++++++++++++++++++++++++
 include/rio_ids.h     |    9 +++++++
 lib_ppc/board.c       |    5 ++++
 8 files changed, 228 insertions(+), 0 deletions(-)
 create mode 100644 drivers/rio/Makefile
 create mode 100644 drivers/rio/fsl_rio.c
 create mode 100644 drivers/rio/rio.c
 create mode 100644 include/rio.h
 create mode 100644 include/rio_ids.h

Makefile +1 -0

index 1983ca0..1f3f26a 100644
@@ -228,6 +228,7 @@ endif
 ifeq ($(CPU),mpc85xx)
 LIBS += drivers/qe/qe.a
 endif
+LIBS += drivers/rio/librio.a
 LIBS += drivers/rtc/librtc.a
 LIBS += drivers/serial/libserial.a
 LIBS += drivers/usb/libusb.a

drivers/rio/Makefile new file +35 -0

new file mode 100644
index 0000000..4b940c2
@@ -0,0 +1,35 @@
+#
+# Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+#
+# Author: Zhang Wei, wei.zhang at freescale.com, Jan 2008
+#
+# This is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+
+include $(TOPDIR)/config.mk
+
+LIB 	:= $(obj)librio.a
+
+COBJS-y += rio.o
+COBJS-y += fsl_rio.o
+
+COBJS	:= $(COBJS-y)
+SRCS 	:= $(COBJS:.o=.c)
+OBJS 	:= $(addprefix $(obj),$(COBJS))
+
+all:	$(LIB)
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

drivers/rio/fsl_rio.c new file +64 -0

64 lines not on this page · raw message

drivers/rio/rio.c new file +65 -0

65 lines not on this page · raw message

include/common.h +3 -0

index 9ef9344..84ff943 100644
@@ -275,6 +275,9 @@ void	pciinfo	      (int, int);
 #endif
 #endif
 
+void	rio_init      (void);
+void	rio_init_board(void);
+
 int	misc_init_f   (void);
 int	misc_init_r   (void);

include/rio.h new file +46 -0

46 lines not on this page · raw message

include/rio_ids.h new file +9 -0

new file mode 100644
index 0000000..b6a4ab8
@@ -0,0 +1,9 @@
+
+#define RIO_VENDOR_ID_FREESCALE	0x0002
+
+#define RIO_DEVICE_ID_MPC8548E	0x0012
+#define RIO_DEVICE_ID_MPC8548	0x0013
+#define RIO_DEVICE_ID_MPC8568E	0x0020
+#define RIO_DEVICE_ID_MPC8568	0x0021
+#define RIO_DEVICE_ID_MPC8641	0x7010
+#define RIO_DEVICE_ID_MPC8641D	0x7011

lib_ppc/board.c +5 -0

index 0719745..75746ff 100644
@@ -921,6 +921,11 @@ void board_init_r (gd_t *id, ulong dest_addr)
 	pci_init ();
 #endif
 
+#if defined(CONFIG_RAPIDIO)
+	/* Do RapidIO configuration */
+	rio_init ();
+#endif
+
 /** leave this here (after malloc(), environment and PCI are working) **/
 	/* Initialize devices */
 	devices_init ();

Signature · 1 line

1.5.2

Zhang Wei

author

2008-01-10 11:38 UTC #1 lore raw

PATCH 2/3 Fixed the error in immap RapidIO definition.

Signed-off-by Zhang Wei <[email protected]>

---
 include/asm-ppc/immap_85xx.h    |  169 +---------------
 include/asm-ppc/immap_86xx.h    |  232 +---------------------
 include/asm-ppc/immap_fsl_rio.h |  426 +++++++++++++++++++++++++++++++++++++++
 3 files changed, 428 insertions(+), 399 deletions(-)
 create mode 100644 include/asm-ppc/immap_fsl_rio.h

include/asm-ppc/immap_85xx.h +1 ~~-168~~

index d769d70..7d8522b 100644
@@ -13,6 +13,7 @@
 
 #include <asm/types.h>
 #include <asm/fsl_i2c.h>
+#include <asm/immap_fsl_rio.h>
 
 /*
  * Local-Access Registers and ECM Registers(0x0000-0x2000)

@@ -1353,174 +1354,6 @@ typedef struct ccsr_cpm {
 } ccsr_cpm_t;
 #endif
 
-/*
- * RapidIO Registers(0xc_0000-0xe_0000)
- */
-typedef struct ccsr_rio {
-	uint	didcar;		/* 0xc0000 - Device Identity Capability Register */
-	uint	dicar;		/* 0xc0004 - Device Information Capability Register */
-	uint	aidcar;		/* 0xc0008 - Assembly Identity Capability Register */
-	uint	aicar;		/* 0xc000c - Assembly Information Capability Register */
-	uint	pefcar;		/* 0xc0010 - Processing Element Features Capability Register */
-	uint	spicar;		/* 0xc0014 - Switch Port Information Capability Register */
-	uint	socar;		/* 0xc0018 - Source Operations Capability Register */
-	uint	docar;		/* 0xc001c - Destination Operations Capability Register */
-	char	res1[32];
-	uint	msr;		/* 0xc0040 - Mailbox Command And Status Register */
-	uint	pwdcsr;		/* 0xc0044 - Port-Write and Doorbell Command And Status Register */
-	char	res2[4];
-	uint	pellccsr;	/* 0xc004c - Processing Element Logic Layer Control Command and Status Register */
-	char	res3[12];
-	uint	lcsbacsr;	/* 0xc005c - Local Configuration Space Base Address Command and Status Register */
-	uint	bdidcsr;	/* 0xc0060 - Base Device ID Command and Status Register */
-	char	res4[4];
-	uint	hbdidlcsr;	/* 0xc0068 - Host Base Device ID Lock Command and Status Register */
-	uint	ctcsr;		/* 0xc006c - Component Tag Command and Status Register */
-	char	res5[144];
-	uint	pmbh0csr;	/* 0xc0100 - 8/16 LP-LVDS Port Maintenance Block Header 0 Command and Status Register */
-	char	res6[28];
-	uint	pltoccsr;	/* 0xc0120 - Port Link Time-out Control Command and Status Register */
-	uint	prtoccsr;	/* 0xc0124 - Port Response Time-out Control Command and Status Register */
-	char	res7[20];
-	uint	pgccsr;		/* 0xc013c - Port General Command and Status Register */
-	uint	plmreqcsr;	/* 0xc0140 - Port Link Maintenance Request Command and Status Register */
-	uint	plmrespcsr;	/* 0xc0144 - Port Link Maintenance Response Command and Status Register */
-	uint	plascsr;	/* 0xc0148 - Port Local Ackid Status Command and Status Register */
-	char	res8[12];
-	uint	pescsr;		/* 0xc0158 - Port Error and Status Command and Status Register */
-	uint	pccsr;		/* 0xc015c - Port Control Command and Status Register */
-	char	res9[65184];
-	uint	cr;		/* 0xd0000 - Port Control Command and Status Register */
-	char	res10[12];
-	uint	pcr;		/* 0xd0010 - Port Configuration Register */
-	uint	peir;		/* 0xd0014 - Port Error Injection Register */
-	char	res11[3048];
-	uint	rowtar0;	/* 0xd0c00 - RapidIO Outbound Window Translation Address Register 0 */
-	char	res12[12];
-	uint	rowar0;		/* 0xd0c10 - RapidIO Outbound Attributes Register 0 */
-	char	res13[12];
-	uint	rowtar1;	/* 0xd0c20 - RapidIO Outbound Window Translation Address Register 1 */
-	char	res14[4];
-	uint	rowbar1;	/* 0xd0c28 - RapidIO Outbound Window Base Address Register 1 */
-	char	res15[4];
-	uint	rowar1;		/* 0xd0c30 - RapidIO Outbound Attributes Register 1 */
-	char	res16[12];
-	uint	rowtar2;	/* 0xd0c40 - RapidIO Outbound Window Translation Address Register 2 */
-	char	res17[4];
-	uint	rowbar2;	/* 0xd0c48 - RapidIO Outbound Window Base Address Register 2 */
-	char	res18[4];
-	uint	rowar2;		/* 0xd0c50 - RapidIO Outbound Attributes Register 2 */
-	char	res19[12];
-	uint	rowtar3;	/* 0xd0c60 - RapidIO Outbound Window Translation Address Register 3 */
-	char	res20[4];
-	uint	rowbar3;	/* 0xd0c68 - RapidIO Outbound Window Base Address Register 3 */
-	char	res21[4];
-	uint	rowar3;		/* 0xd0c70 - RapidIO Outbound Attributes Register 3 */
-	char	res22[12];
-	uint	rowtar4;	/* 0xd0c80 - RapidIO Outbound Window Translation Address Register 4 */
-	char	res23[4];
-	uint	rowbar4;	/* 0xd0c88 - RapidIO Outbound Window Base Address Register 4 */
-	char	res24[4];
-	uint	rowar4;		/* 0xd0c90 - RapidIO Outbound Attributes Register 4 */
-	char	res25[12];
-	uint	rowtar5;	/* 0xd0ca0 - RapidIO Outbound Window Translation Address Register 5 */
-	char	res26[4];
-	uint	rowbar5;	/* 0xd0ca8 - RapidIO Outbound Window Base Address Register 5 */
-	char	res27[4];
-	uint	rowar5;		/* 0xd0cb0 - RapidIO Outbound Attributes Register 5 */
-	char	res28[12];
-	uint	rowtar6;	/* 0xd0cc0 - RapidIO Outbound Window Translation Address Register 6 */
-	char	res29[4];
-	uint	rowbar6;	/* 0xd0cc8 - RapidIO Outbound Window Base Address Register 6 */
-	char	res30[4];
-	uint	rowar6;		/* 0xd0cd0 - RapidIO Outbound Attributes Register 6 */
-	char	res31[12];
-	uint	rowtar7;	/* 0xd0ce0 - RapidIO Outbound Window Translation Address Register 7 */
-	char	res32[4];
-	uint	rowbar7;	/* 0xd0ce8 - RapidIO Outbound Window Base Address Register 7 */
-	char	res33[4];
-	uint	rowar7;		/* 0xd0cf0 - RapidIO Outbound Attributes Register 7 */
-	char	res34[12];
-	uint	rowtar8;	/* 0xd0d00 - RapidIO Outbound Window Translation Address Register 8 */
-	char	res35[4];
-	uint	rowbar8;	/* 0xd0d08 - RapidIO Outbound Window Base Address Register 8 */
-	char	res36[4];
-	uint	rowar8;		/* 0xd0d10 - RapidIO Outbound Attributes Register 8 */
-	char	res37[76];
-	uint	riwtar4;	/* 0xd0d60 - RapidIO Inbound Window Translation Address Register 4 */
-	char	res38[4];
-	uint	riwbar4;	/* 0xd0d68 - RapidIO Inbound Window Base Address Register 4 */
-	char	res39[4];
-	uint	riwar4;		/* 0xd0d70 - RapidIO Inbound Attributes Register 4 */
-	char	res40[12];
-	uint	riwtar3;	/* 0xd0d80 - RapidIO Inbound Window Translation Address Register 3 */
-	char	res41[4];
-	uint	riwbar3;	/* 0xd0d88 - RapidIO Inbound Window Base Address Register 3 */
-	char	res42[4];
-	uint	riwar3;		/* 0xd0d90 - RapidIO Inbound Attributes Register 3 */
-	char	res43[12];
-	uint	riwtar2;	/* 0xd0da0 - RapidIO Inbound Window Translation Address Register 2 */
-	char	res44[4];
-	uint	riwbar2;	/* 0xd0da8 - RapidIO Inbound Window Base Address Register 2 */
-	char	res45[4];
-	uint	riwar2;		/* 0xd0db0 - RapidIO Inbound Attributes Register 2 */
-	char	res46[12];
-	uint	riwtar1;	/* 0xd0dc0 - RapidIO Inbound Window Translation Address Register 1 */
-	char	res47[4];
-	uint	riwbar1;	/* 0xd0dc8 - RapidIO Inbound Window Base Address Register 1 */
-	char	res48[4];
-	uint	riwar1;		/* 0xd0dd0 - RapidIO Inbound Attributes Register 1 */
-	char	res49[12];
-	uint	riwtar0;	/* 0xd0de0 - RapidIO Inbound Window Translation Address Register 0 */
-	char	res50[12];
-	uint	riwar0;		/* 0xd0df0 - RapidIO Inbound Attributes Register 0 */
-	char	res51[12];
-	uint	pnfedr;		/* 0xd0e00 - Port Notification/Fatal Error Detect Register */
-	uint	pnfedir;	/* 0xd0e04 - Port Notification/Fatal Error Detect Register */
-	uint	pnfeier;	/* 0xd0e08 - Port Notification/Fatal Error Interrupt Enable Register */
-	uint	pecr;		/* 0xd0e0c - Port Error Control Register */
-	uint	pepcsr0;	/* 0xd0e10 - Port Error Packet/Control Symbol Register 0 */
-	uint	pepr1;		/* 0xd0e14 - Port Error Packet Register 1 */
-	uint	pepr2;		/* 0xd0e18 - Port Error Packet Register 2 */
-	char	res52[4];
-	uint	predr;		/* 0xd0e20 - Port Recoverable Error Detect Register */
-	char	res53[4];
-	uint	pertr;		/* 0xd0e28 - Port Error Recovery Threshold Register */
-	uint	prtr;		/* 0xd0e2c - Port Retry Threshold Register */
-	char	res54[464];
-	uint	omr;		/* 0xd1000 - Outbound Mode Register */
-	uint	osr;		/* 0xd1004 - Outbound Status Register */
-	uint	eodqtpar;	/* 0xd1008 - Extended Outbound Descriptor Queue Tail Pointer Address Register */
-	uint	odqtpar;	/* 0xd100c - Outbound Descriptor Queue Tail Pointer Address Register */
-	uint	eosar;		/* 0xd1010 - Extended Outbound Unit Source Address Register */
-	uint	osar;		/* 0xd1014 - Outbound Unit Source Address Register */
-	uint	odpr;		/* 0xd1018 - Outbound Destination Port Register */
-	uint	odatr;		/* 0xd101c - Outbound Destination Attributes Register */
-	uint	odcr;		/* 0xd1020 - Outbound Doubleword Count Register */
-	uint	eodqhpar;	/* 0xd1024 - Extended Outbound Descriptor Queue Head Pointer Address Register */
-	uint	odqhpar;	/* 0xd1028 - Outbound Descriptor Queue Head Pointer Address Register */
-	char	res55[52];
-	uint	imr;		/* 0xd1060 - Outbound Mode Register */
-	uint	isr;		/* 0xd1064 - Inbound Status Register */
-	uint	eidqtpar;	/* 0xd1068 - Extended Inbound Descriptor Queue Tail Pointer Address Register */
-	uint	idqtpar;	/* 0xd106c - Inbound Descriptor Queue Tail Pointer Address Register */
-	uint	eifqhpar;	/* 0xd1070 - Extended Inbound Frame Queue Head Pointer Address Register */
-	uint	ifqhpar;	/* 0xd1074 - Inbound Frame Queue Head Pointer Address Register */
-	char	res56[1000];
-	uint	dmr;		/* 0xd1460 - Doorbell Mode Register */
-	uint	dsr;		/* 0xd1464 - Doorbell Status Register */
-	uint	edqtpar;	/* 0xd1468 - Extended Doorbell Queue Tail Pointer Address Register */
-	uint	dqtpar;		/* 0xd146c - Doorbell Queue Tail Pointer Address Register */
-	uint	edqhpar;	/* 0xd1470 - Extended Doorbell Queue Head Pointer Address Register */
-	uint	dqhpar;		/* 0xd1474 - Doorbell Queue Head Pointer Address Register */
-	char	res57[104];
-	uint	pwmr;		/* 0xd14e0 - Port-Write Mode Register */
-	uint	pwsr;		/* 0xd14e4 - Port-Write Status Register */
-	uint	epwqbar;	/* 0xd14e8 - Extended Port-Write Queue Base Address Register */
-	uint	pwqbar;		/* 0xd14ec - Port-Write Queue Base Address Register */
-	char	res58[60176];
-} ccsr_rio_t;
-
 /* Quick Engine Block Pin Muxing Registers (0xe_0100 - 0xe_01bf) */
 typedef struct par_io {
 	uint	cpodr;		/* 0x100 */

include/asm-ppc/immap_86xx.h +1 ~~-231~~

244 lines not on this page · raw message

include/asm-ppc/immap_fsl_rio.h new file +426 -0

426 lines not on this page · raw message

Signature · 1 line

1.5.2

Zhang Wei

author

2008-01-10 11:38 UTC #2 lore raw

PATCH 3/3 Add RapidIO support to MPC8641HPCN, MPC8548CDS, MPC8568MDS boards.

Signed-off-by Zhang Wei <[email protected]>

---
 board/freescale/mpc8548cds/mpc8548cds.c   |    8 ++++++++
 board/freescale/mpc8568mds/mpc8568mds.c   |    9 +++++++++
 board/freescale/mpc8641hpcn/mpc8641hpcn.c |    9 +++++++++
 3 files changed, 26 insertions(+), 0 deletions(-)

board/freescale/mpc8548cds/mpc8548cds.c +8 -0

index 47e2dd8..fe0ff27 100644
@@ -24,6 +24,7 @@
 
 #include <common.h>
 #include <pci.h>
+#include <rio.h>
 #include <asm/processor.h>
 #include <asm/immap_85xx.h>
 #include <asm/immap_fsl_pci.h>

@@ -517,6 +518,13 @@ int last_stage_init(void)
 	return 0;
 }
 
+#ifdef CONFIG_RAPIDIO
+void rio_init_board()
+{
+	volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
+	fsl_rio_init(&immap->im_rio, 0);
+}
+#endif
 
 #if defined(CONFIG_OF_BOARD_SETUP)
 void

board/freescale/mpc8568mds/mpc8568mds.c +9 -0

index 3c3726b..239cf2a 100644
@@ -24,6 +24,7 @@
 
 #include <common.h>
 #include <pci.h>
+#include <rio.h>
 #include <asm/processor.h>
 #include <asm/immap_85xx.h>
 #include <asm/immap_fsl_pci.h>

@@ -534,6 +535,14 @@ pci_init_board(void)
 }
 #endif /* CONFIG_PCI */
 
+#ifdef CONFIG_RAPIDIO
+void rio_init_board()
+{
+	volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
+	fsl_rio_init(&immap->im_rio, 0);
+}
+#endif
+
 #if defined(CONFIG_OF_BOARD_SETUP)
 void
 ft_board_setup(void *blob, bd_t *bd)

board/freescale/mpc8641hpcn/mpc8641hpcn.c +9 -0

index 8278789..cc7c8be 100644
@@ -22,6 +22,7 @@
 
 #include <common.h>
 #include <pci.h>
+#include <rio.h>
 #include <asm/processor.h>
 #include <asm/immap_86xx.h>
 #include <asm/immap_fsl_pci.h>

@@ -321,6 +322,14 @@ void pci_init_board(void)
 
 }
 
+#ifdef CONFIG_RAPIDIO
+void rio_init_board()
+{
+	volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
+	fsl_rio_init(&immap->im_rio, 0);
+}
+#endif
+
 #if defined(CONFIG_OF_BOARD_SETUP)
 void
 ft_board_setup(void *blob, bd_t *bd)

Signature · 1 line

1.5.2

Kumar Gala

2008-01-10 14:43 UTC #3 lore raw

PATCH 1/3 Add the RapidIO framework for U-Boot

In reply to Zhang Wei

Quoted 4 lines · Zhang Wei

The patch adds the RapidIO framework into U-Boot. The board configuration
can be added into individual rio_init_board() function. Some functions about RapidIO can be added later.

can you explain what might get added in the future. At this point all this code seems to exist to just do fsl_rio_quirk.

Quoted 20 lines

The support for Freescale PowerPC RapidIO controller is also added.
Signed-off-by Zhang Wei <[email protected]>
---
Makefile              |    1 +
drivers/rio/Makefile  |   35 ++++++++++++++++++++++++++
drivers/rio/fsl_rio.c |   64 ++++++++++++++++++++++++++++++++++++++++ 
++++++++
drivers/rio/rio.c     |   65 ++++++++++++++++++++++++++++++++++++++++ 
+++++++++
include/common.h      |    3 ++
include/rio.h         |   46 ++++++++++++++++++++++++++++++++++
include/rio_ids.h     |    9 +++++++
lib_ppc/board.c       |    5 ++++
8 files changed, 228 insertions(+), 0 deletions(-)
create mode 100644 drivers/rio/Makefile
create mode 100644 drivers/rio/fsl_rio.c
create mode 100644 drivers/rio/rio.c
create mode 100644 include/rio.h
create mode 100644 include/rio_ids.h

[snip]

Quoted 22 lines

drivers/rio/fsl_rio.c new file +2 -0
new file mode 100644
index 0000000..c8bfa92
@@ -0,0 +1,64 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights  
reserved.
+ *
+ * Author: Zhang Wei, wei.zhang at freescale.com, Jan 2008
+ *
+ * Description:
+ * Freescale PowerPC RapidIO controller initialization file.
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */

drivers/rio/fsl_rio.c line 18

Quoted 4 lines

drivers/rio/fsl_rio.c new file +4 -0
+
+#include <common.h>
+
+#ifdef CONFIG_RAPIDIO

you don't need to do file protection like this anymore with the new build system.

Quoted 98 lines

drivers/rio/fsl_rio.c new file +46 -0

+#include <command.h>
+#include <malloc.h>
+#include <rio.h>
+#include <rio_ids.h>
+
+#include <asm/processor.h>
+#include <asm/io.h>
+#include <asm/immap_86xx.h>
+#include <asm/io.h>
+
+void fsl_rio_init(void *base, int busno)
+{
+	struct rio_dev *dev;
+	volatile ccsr_rio_t *rio = base;
+	struct rio_controller *hose;
+
+	dev = malloc(sizeof(struct rio_dev));
+	memset(dev, 0, sizeof(struct rio_dev));
+
+	dev->vendor = in_be32(&rio->didcar) & 0xffff;
+	dev->device = (in_be32(&rio->didcar) >> 16) & 0xffff;
+
+	hose = malloc(sizeof(struct rio_controller));
+	memset(hose, 0, sizeof(struct rio_controller));
+
+	INIT_LIST_HEAD(&hose->dev_list);
+	hose->busno = busno;
+	hose->base = base;
+	hose->self = dev;
+	list_add_tail(&hose->node, &rio_hose_list);
+
+	printf("RIO%d (%04x:%04x) on 0x%08x\n", hose->busno, dev->vendor,
+			dev->device, base);
+}
+
+void fsl_rio_quirk(struct rio_controller *hose, struct rio_dev *rdev)
+{
+#ifdef FSL_RIO_IP_V2
+	volatile ccsr_rio_t *rio = hose->base;
+	/* Set the controller to accept all packets
+	 * without checking the target ID
+	 */
+	out_be32(&rio->ptaacr, 1);
+#endif
+}
+#endif

drivers/rio/rio.c new file +2 -0

new file mode 100644
index 0000000..9391384
@@ -0,0 +1,65 @@
+/*
+ * Copyright (C) 2007-2008 Freescale Semiconductor, Inc. All rights

reserved.
+ *
+ * Author: Zhang Wei, wei.zhang at freescale.com, Jun 2007
+ *
+ * Description:
+ * RapidIO initialization file.
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */

drivers/rio/rio.c new file +29 -0

+
+#include <common.h>
+
+#ifdef CONFIG_RAPIDIO
+
+#include <command.h>
+#include <linux/list.h>
+#include <rio.h>
+#include <rio_ids.h>
+#include <asm/processor.h>
+#include <asm/io.h>
+
+struct list_head rio_hose_list;
+
+struct rio_quirk rio_post_quirk[] = {
+	{RIO_VENDOR_ID_FREESCALE, RIO_DEVICE_ID_MPC8548E, fsl_rio_quirk},
+	{RIO_VENDOR_ID_FREESCALE, RIO_DEVICE_ID_MPC8548, fsl_rio_quirk},
+	{RIO_VENDOR_ID_FREESCALE, RIO_DEVICE_ID_MPC8568E, fsl_rio_quirk},
+	{RIO_VENDOR_ID_FREESCALE, RIO_DEVICE_ID_MPC8568, fsl_rio_quirk},
+	{RIO_VENDOR_ID_FREESCALE, RIO_DEVICE_ID_MPC8641, fsl_rio_quirk},
+	{RIO_VENDOR_ID_FREESCALE, RIO_DEVICE_ID_MPC8641D, fsl_rio_quirk},
+	{},
+};
+
+void rio_hose_post(void)
+{
+	struct rio_controller *hose;
+	struct rio_quirk *post_quirk;
+

drivers/rio/rio.c line 53

Quoted 10 lines

drivers/rio/rio.c new file +10 -0

+	list_for_each_entry(hose, &rio_hose_list, node)
+		for (post_quirk = rio_post_quirk;
+		     post_quirk->vendor || post_quirk->device; post_quirk++)
+			if ((post_quirk->vendor == hose->self->vendor)
+				  && (post_quirk->device == hose->self->device)
+				  && post_quirk->quirk) {
+				post_quirk->quirk(hose, hose->self);
+				break;
+			}
+}

do we really need a full blown quirk system, or can we just let the board code handle this?

drivers/rio/rio.c line 60

Quoted 8 lines

drivers/rio/rio.c new file +7 -0

+
+void rio_init(void)
+{
+	INIT_LIST_HEAD(&rio_hose_list);
+
+	/* Call board specific rio_init() */
+	rio_init_board();

what's the point of this. Why not just do this from some pre-existing board init function?

Quoted 6 lines

drivers/rio/rio.c new file +5 -0

+
+	rio_hose_post();
+}
+
+#endif /* CONFIG_RAPIDIO */

Zhang Wei

author

2008-01-11 02:10 UTC #4 lore raw

PATCH 1/3 Add the RapidIO framework for U-Boot

Quoted 6 lines · Zhang Wei

Quoted 4 lines
The patch adds the RapidIO framework into U-Boot. The board configuration
can be added into individual rio_init_board() function.

Quoted 6 lines

Some functions
Quoted 1 line
about RapidIO can be added later.
can you explain what might get added in the future. At this point all
this code seems to exist to just do fsl_rio_quirk.

Now only fsl_rio_quirk. We can add other jobs such as RapidIO network enumeration in the future.

Cheers!
Wei.

Quoted 201 lines

Quoted 8 lines
The support for Freescale PowerPC RapidIO controller is also added.
Signed-off-by Zhang Wei <[email protected]>
---
Makefile              |    1 +
drivers/rio/Makefile  |   35 ++++++++++++++++++++++++++
drivers/rio/fsl_rio.c |   64 
++++++++++++++++++++++++++++++++++++++++
Quoted 2 lines
++++++++
drivers/rio/rio.c | 65
++++++++++++++++++++++++++++++++++++++++
Quoted 11 lines
+++++++++
include/common.h      |    3 ++
include/rio.h         |   46 ++++++++++++++++++++++++++++++++++
include/rio_ids.h     |    9 +++++++
lib_ppc/board.c       |    5 ++++
8 files changed, 228 insertions(+), 0 deletions(-)
create mode 100644 drivers/rio/Makefile
create mode 100644 drivers/rio/fsl_rio.c
create mode 100644 drivers/rio/rio.c
create mode 100644 include/rio.h
create mode 100644 include/rio_ids.h
[snip]
Quoted 11 lines
drivers/rio/fsl_rio.c new file +2 -0
new file mode 100644
index 0000000..c8bfa92
@@ -0,0 +1,64 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights  
reserved.
+ *
+ * Author: Zhang Wei, wei.zhang at freescale.com, Jan 2008
Quoted 8 lines
+ *
+ * Description:
+ * Freescale PowerPC RapidIO controller initialization file.
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the
License, or
drivers/rio/fsl_rio.c line 18
Quoted 7 lines
+ * (at your option) any later version.
+ *
+ */
drivers/rio/fsl_rio.c new file +4 -0
+
+#include <common.h>
+
+#ifdef CONFIG_RAPIDIO
you don't need to do file protection like this anymore with the new build system.
Quoted 23 lines
drivers/rio/fsl_rio.c new file +22 -0
+#include <command.h>
+#include <malloc.h>
+#include <rio.h>
+#include <rio_ids.h>
+
+#include <asm/processor.h>
+#include <asm/io.h>
+#include <asm/immap_86xx.h>
+#include <asm/io.h>
+
+void fsl_rio_init(void *base, int busno)
+{
+	struct rio_dev *dev;
+	volatile ccsr_rio_t *rio = base;
+	struct rio_controller *hose;
+
+	dev = malloc(sizeof(struct rio_dev));
+	memset(dev, 0, sizeof(struct rio_dev));
+
+	dev->vendor = in_be32(&rio->didcar) & 0xffff;
+	dev->device = (in_be32(&rio->didcar) >> 16) & 0xffff;
+
drivers/rio/fsl_rio.c
Quoted 10 lines
drivers/rio/fsl_rio.c new file +10 -0
+	hose = malloc(sizeof(struct rio_controller));
+	memset(hose, 0, sizeof(struct rio_controller));
+
+	INIT_LIST_HEAD(&hose->dev_list);
+	hose->busno = busno;
+	hose->base = base;
+	hose->self = dev;
+	list_add_tail(&hose->node, &rio_hose_list);
+
+	printf("RIO%d (%04x:%04x) on 0x%08x\n", hose->busno, 
dev->vendor,
drivers/rio/fsl_rio.c
Quoted 4 lines
drivers/rio/fsl_rio.c new file +4 -0
+			dev->device, base);
+}
+
+void fsl_rio_quirk(struct rio_controller *hose, struct 
rio_dev *rdev)
Quoted 16 lines
drivers/rio/fsl_rio.c new file +10 -0
+{
+#ifdef FSL_RIO_IP_V2
+	volatile ccsr_rio_t *rio = hose->base;
+	/* Set the controller to accept all packets
+	 * without checking the target ID
+	 */
+	out_be32(&rio->ptaacr, 1);
+#endif
+}
+#endif
drivers/rio/rio.c new file +0 -0
new file mode 100644
index 0000000..9391384
drivers/rio/rio.c line 2
Quoted 2 lines
drivers/rio/rio.c new file +2 -0
@@ -0,0 +1,65 @@
+/*
+ * Copyright (C) 2007-2008 Freescale Semiconductor, Inc. 
All rights
Quoted 11 lines
reserved.
+ *
+ * Author: Zhang Wei, wei.zhang at freescale.com, Jun 2007
+ *
+ * Description:
+ * RapidIO initialization file.
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the
License, or
Quoted 9 lines
+ * (at your option) any later version.
+ *
+ */
drivers/rio/rio.c new file +6 -0
+
+#include <common.h>
+
+#ifdef CONFIG_RAPIDIO
+
+#include <command.h>
drivers/rio/rio.c
Quoted 10 lines
drivers/rio/rio.c new file +10 -0
+#include <linux/list.h>
+#include <rio.h>
+#include <rio_ids.h>
+#include <asm/processor.h>
+#include <asm/io.h>
+
+struct list_head rio_hose_list;
+
+struct rio_quirk rio_post_quirk[] = {
+	{RIO_VENDOR_ID_FREESCALE, RIO_DEVICE_ID_MPC8548E, 
fsl_rio_quirk},
drivers/rio/rio.c
Quoted 2 lines
drivers/rio/rio.c new file +2 -0
+	{RIO_VENDOR_ID_FREESCALE, RIO_DEVICE_ID_MPC8548, fsl_rio_quirk},
+	{RIO_VENDOR_ID_FREESCALE, RIO_DEVICE_ID_MPC8568E, 
fsl_rio_quirk},
drivers/rio/rio.c
Quoted 3 lines
drivers/rio/rio.c new file +3 -0
+	{RIO_VENDOR_ID_FREESCALE, RIO_DEVICE_ID_MPC8568, fsl_rio_quirk},
+	{RIO_VENDOR_ID_FREESCALE, RIO_DEVICE_ID_MPC8641, fsl_rio_quirk},
+	{RIO_VENDOR_ID_FREESCALE, RIO_DEVICE_ID_MPC8641D, 
fsl_rio_quirk},
drivers/rio/rio.c
Quoted 11 lines
drivers/rio/rio.c new file +11 -0
+	{},
+};
+
+void rio_hose_post(void)
+{
+	struct rio_controller *hose;
+	struct rio_quirk *post_quirk;
+
+	list_for_each_entry(hose, &rio_hose_list, node)
+		for (post_quirk = rio_post_quirk;
+		     post_quirk->vendor || post_quirk->device; 
post_quirk++)
drivers/rio/rio.c
Quoted 2 lines
drivers/rio/rio.c new file +2 -0
+			if ((post_quirk->vendor == hose->self->vendor)
+				  && (post_quirk->device == 
hose->self->device)
drivers/rio/rio.c line 53
Quoted 5 lines
drivers/rio/rio.c new file +5 -0
+				  && post_quirk->quirk) {
+				post_quirk->quirk(hose, hose->self);
+				break;
+			}
+}
do we really need a full blown quirk system, or can we just let the board code handle this?
drivers/rio/rio.c line 60
Quoted 8 lines
drivers/rio/rio.c new file +7 -0
+
+void rio_init(void)
+{
+	INIT_LIST_HEAD(&rio_hose_list);
+
+	/* Call board specific rio_init() */
+	rio_init_board();
what's the point of this. Why not just do this from some pre-existing
board init function?
Quoted 6 lines
drivers/rio/rio.c new file +5 -0
+
+	rio_hose_post();
+}
+
+#endif /* CONFIG_RAPIDIO */

Kumar Gala

2008-01-11 04:41 UTC #5 lore raw

PATCH 1/3 Add the RapidIO framework for U-Boot

Quoted 7 lines · Zhang Wei

Quoted 7 lines · Zhang Wei
Quoted 4 lines
The patch adds the RapidIO framework into U-Boot. The board configuration
can be added into individual rio_init_board() function.
Some functions

Quoted 8 lines

Quoted 5 lines
Quoted 1 line
about RapidIO can be added later.
can you explain what might get added in the future. At this point all
this code seems to exist to just do fsl_rio_quirk.
Now only fsl_rio_quirk. We can add other jobs such as RapidIO network enumeration in the future.

seems like a lot of code until we are at that point.

- k

Zhang Wei

author

2008-01-11 05:06 UTC #6 lore raw

PATCH 1/3 Add the RapidIO framework for U-Boot

Quoted 16 lines · Zhang Wei

Quoted 14 lines
Quoted 13 lines · Zhang Wei
Quoted 4 lines
The patch adds the RapidIO framework into U-Boot. The board configuration
can be added into individual rio_init_board() function.
Some functions
Quoted 1 line
about RapidIO can be added later.
can you explain what might get added in the future. At this point all
this code seems to exist to just do fsl_rio_quirk.

Quoted 5 lines

Quoted 1 line
Now only fsl_rio_quirk. We can add other jobs such as
RapidIO network
Quoted 1 line
enumeration in the future.
seems like a lot of code until we are at that point.

Right, lots of work :). The roadmap also depends on kernel driver of RapidIO.

Cheers!
Wei.

Kumar Gala

2008-01-11 05:40 UTC #7 lore raw

PATCH 1/3 Add the RapidIO framework for U-Boot

Quoted 16 lines · Zhang Wei

Quoted 16 lines · Zhang Wei
Quoted 14 lines
Quoted 13 lines · Zhang Wei
Quoted 4 lines
The patch adds the RapidIO framework into U-Boot. The board configuration
can be added into individual rio_init_board() function.
Some functions
Quoted 1 line
about RapidIO can be added later.
can you explain what might get added in the future. At this point all
this code seems to exist to just do fsl_rio_quirk.

Quoted 8 lines

Quoted 5 lines
Quoted 1 line
Now only fsl_rio_quirk. We can add other jobs such as
RapidIO network
Quoted 1 line
enumeration in the future.
seems like a lot of code until we are at that point.
Right, lots of work :). The roadmap also depends on kernel driver of RapidIO.

Sure, I guess my point is that until there is something beyond fsl_rio_quirk that would use the framework I don't see why we should put it into u-boot.

- k

Zhang Wei

author

2008-01-11 09:27 UTC #8 lore raw

PATCH 1/3 Add the RapidIO framework for U-Boot

Quoted 23 lines · Zhang Wei

Quoted 21 lines
Quoted 21 lines · Zhang Wei
Quoted 7 lines
Quoted 7 lines · Zhang Wei
Quoted 4 lines
The patch adds the RapidIO framework into U-Boot. The board configuration
can be added into individual rio_init_board() function.
Quoted 8 lines
Quoted 6 lines
Some functions
Quoted 1 line
about RapidIO can be added later.
can you explain what might get added in the future. At this point all
this code seems to exist to just do fsl_rio_quirk.
Now only fsl_rio_quirk. We can add other jobs such as
RapidIO network
Quoted 1 line
enumeration in the future.

Quoted 9 lines

Quoted 4 lines
Quoted 1 line
seems like a lot of code until we are at that point.
Right, lots of work :). The roadmap also depends on kernel driver of RapidIO.
Sure, I guess my point is that until there is something beyond fsl_rio_quirk that would use the framework I don't see why we should put it into u-boot.

Why we do not start the job with a formal framework?

Cheers!
Wei.

Kumar Gala

2008-01-11 15:38 UTC #9 lore raw

PATCH 1/3 Add the RapidIO framework for U-Boot

Quoted 8 lines

Quoted 7 lines
Quoted 2 lines
Right, lots of work :). The roadmap also depends on kernel driver of RapidIO.
Sure, I guess my point is that until there is something beyond fsl_rio_quirk that would use the framework I don't see why we should put it into u-boot.
Why we do not start the job with a formal framework?

I'll leave the decision up to Wolfgang. Just giving my two cents about it.

- k

Wolfgang Denk

2008-01-12 20:06 UTC #10 lore raw

PATCH 1/3 Add the RapidIO framework for U-Boot

Quoted 11 lines · In message <[email protected]> you wrote:

Quoted 8 lines
Quoted 7 lines
Quoted 2 lines
Right, lots of work :). The roadmap also depends on kernel driver of RapidIO.
Sure, I guess my point is that until there is something beyond fsl_rio_quirk that would use the framework I don't see why we should put it into u-boot.
Why we do not start the job with a formal framework?
I'll leave the decision up to Wolfgang. Just giving my two cents about it.

Always all difficult decisions are left up to me :-(

I'd appreciate to see a formal framework for this, but then I also think that this needs some generalization which may be difficult or even impossible with the initial implementation. So I will neither protest against nor insist on such a formal framework.

Best regards,

Wolfgang Denk

Signature · 4 lines

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Imagination is more important than knowledge.      -- Albert Einstein

Wolfgang Denk

2008-01-12 20:11 UTC #11 lore raw

PATCH 1/3 Add the RapidIO framework for U-Boot

In reply to Zhang Wei

Quoted 5 lines · In message <[email protected]> you wrote:

The patch adds the RapidIO framework into U-Boot. The board configuration can be added into individual rio_init_board() function. Some functions about RapidIO can be added later.
The support for Freescale PowerPC RapidIO controller is also added.

I'm afraid I lost track of the status of these patches while reading all the discussion - is this supposed to go into this release as is, or is there some rework going on?

Best regards,

Wolfgang Denk

Signature · 5 lines

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
If only God would give me some clear sign! Like making a large  depo-
sit in my name at a Swiss Bank.                         - Woody Allen

Kumar Gala

2008-01-12 23:07 UTC #12 lore raw

PATCH 1/3 Add the RapidIO framework for U-Boot

Quoted 8 lines · Wolfgang Denk

In message <[email protected]>
Quoted 6 lines · you
The patch adds the RapidIO framework into U-Boot. The board configuration
can be added into individual rio_init_board() function. Some functions
about RapidIO can be added later.

Quoted 5 lines

Quoted 1 line
The support for Freescale PowerPC RapidIO controller is also added.
I'm afraid I lost track of the status of these patches while reading all the discussion - is this supposed to go into this release as is, or is there some rework going on?

I think I had a minor comment about not needing the file level #ifdef anymore because of the new build system.

- k