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sh: add support for sh7366 processor

PATCH New Magnus Damm 1 participant 1 message Feb 8, 2008 SuperH

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Magnus Damm

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PATCH 1/1 sh: add support for sh7366 processor

This patch adds sh7366 cpu supports. Just the most basic things like interrupt controller, clocks and serial port are included at this point.

Signed-off-by Magnus Damm <[email protected]>

---

 arch/sh/Kconfig                        |    7 +
 arch/sh/Kconfig.debug                  |    2 
 arch/sh/kernel/cpu/sh4/probe.c         |    6 +
 arch/sh/kernel/cpu/sh4a/Makefile       |    2 
 arch/sh/kernel/cpu/sh4a/clock-sh7722.c |   10 +
 arch/sh/kernel/cpu/sh4a/setup-sh7366.c |  177 ++++++++++++++++++++++++++++++++
 arch/sh/kernel/setup.c                 |    2 
 drivers/serial/sh-sci.c                |    2 
 drivers/serial/sh-sci.h                |    8 +
 include/asm-sh/cpu-sh4/freq.h          |    4 
 include/asm-sh/processor.h             |    2 
 11 files changed, 215 insertions(+), 7 deletions(-)
arch/sh/Kconfig +7 -0
@@ -308,6 +308,13 @@ config CPU_SUBTYPE_SH7722
 	select ARCH_SPARSEMEM_ENABLE
 	select SYS_SUPPORTS_NUMA
 
+config CPU_SUBTYPE_SH7366
+	bool "Support SH7366 processor"
+	select CPU_SH4AL_DSP
+	select CPU_SHX2
+	select ARCH_SPARSEMEM_ENABLE
+	select SYS_SUPPORTS_NUMA
+
 # SH-5 Processor Support
 
 config CPU_SUBTYPE_SH5_101
arch/sh/Kconfig.debug +1 -1
@@ -30,7 +30,7 @@ config EARLY_SCIF_CONSOLE_PORT
 	hex
 	depends on EARLY_SCIF_CONSOLE
  	default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763
- 	default "0xffe00000" if CPU_SUBTYPE_SH7722
+ 	default "0xffe00000" if CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366
 	default "0xffea0000" if CPU_SUBTYPE_SH7785
 	default "0xfffe8000" if CPU_SUBTYPE_SH7203
 	default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263
arch/sh/kernel/cpu/sh4/probe.c +6 -0
@@ -132,6 +132,12 @@ int __init detect_cpu_and_cache_system(v
 			boot_cpu_data.dcache.ways = 4;
 			boot_cpu_data.flags |= CPU_HAS_LLSC;
 		}
+		else if (prr = 0x70) {
+			boot_cpu_data.type = CPU_SH7366;
+			boot_cpu_data.icache.ways = 4;
+			boot_cpu_data.dcache.ways = 4;
+			boot_cpu_data.flags |= CPU_HAS_LLSC;
+		}
 		break;
 	case 0x4000:	/* 1st cut */
 	case 0x4001:	/* 2nd cut */
arch/sh/kernel/cpu/sh4a/Makefile +2 -0
@@ -9,6 +9,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7780)	+= setu
 obj-$(CONFIG_CPU_SUBTYPE_SH7785)	+= setup-sh7785.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7343)	+= setup-sh7343.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7722)	+= setup-sh7722.o
+obj-$(CONFIG_CPU_SUBTYPE_SH7366)	+= setup-sh7366.o
 obj-$(CONFIG_CPU_SUBTYPE_SHX3)		+= setup-shx3.o
 
 # SMP setup

@@ -21,6 +22,7 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7780)	:= cl
 clock-$(CONFIG_CPU_SUBTYPE_SH7785)	:= clock-sh7785.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7343)	:= clock-sh7343.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7722)	:= clock-sh7722.o
+clock-$(CONFIG_CPU_SUBTYPE_SH7366)	:= clock-sh7722.o
 clock-$(CONFIG_CPU_SUBTYPE_SHX3)	:= clock-shx3.o
 
 obj-y			+= $(clock-y)
arch/sh/kernel/cpu/sh4a/clock-sh7722.c +9 -1
@@ -1,7 +1,7 @@
 /*
  * arch/sh/kernel/cpu/sh4a/clock-sh7722.c
  *
- * SH7722 support for the clock framework
+ * SH7722 & SH7366 support for the clock framework
  *
  * Copyright (c) 2006-2007 Nomad Global Solutions Inc
  * Based on code for sh7343 by Paul Mundt

@@ -417,15 +417,19 @@ static int sh7722_siu_which(struct clk *
 		return 0;
 	if (!strcmp(clk->name, "siu_b_clk"))
 		return 1;
+#if defined(CONFIG_CPU_SUBTYPE_SH7722)
 	if (!strcmp(clk->name, "irda_clk"))
 		return 2;
+#endif
 	return -EINVAL;
 }
 
 static unsigned long sh7722_siu_regs[] = {
 	[0] = SCLKACR,
 	[1] = SCLKBCR,
+#if defined(CONFIG_CPU_SUBTYPE_SH7722)
 	[2] = IrDACLKCR,
+#endif
 };
 
 static int sh7722_siu_start_stop(struct clk *clk, int enable)

@@ -571,10 +575,12 @@ static struct clk sh7722_siu_b_clock = {
 	.ops = &sh7722_siu_clk_ops,
 };
 
+#if defined(CONFIG_CPU_SUBTYPE_SH7722)
 static struct clk sh7722_irda_clock = {
 	.name = "irda_clk",
 	.ops = &sh7722_siu_clk_ops,
 };
+#endif
 
 static struct clk sh7722_video_clock = {
 	.name = "video_clk",

@@ -588,7 +594,9 @@ static struct clk *sh7722_clocks[] = {
 	&sh7722_sdram_clock,
 	&sh7722_siu_a_clock,
 	&sh7722_siu_b_clock,
+#if defined(CONFIG_CPU_SUBTYPE_SH7722)
 	&sh7722_irda_clock,
+#endif
 	&sh7722_video_clock,
 };
arch/sh/kernel/cpu/sh4a/setup-sh7366.c new file +177 -0

177 lines not on this page · raw message

arch/sh/kernel/setup.c +1 -1
@@ -324,7 +324,7 @@ static const char *cpu_name[] = {
 	[CPU_SH7343]	= "SH7343",	[CPU_SH7785]	= "SH7785",
 	[CPU_SH7722]	= "SH7722",	[CPU_SHX3]	= "SH-X3",
 	[CPU_SH5_101]	= "SH5-101",	[CPU_SH5_103]	= "SH5-103",
-	[CPU_SH_NONE]	= "Unknown"
+	[CPU_SH7366]	= "SH7366",	[CPU_SH_NONE]	= "Unknown"
 };
 
 const char *get_cpu_subtype(struct sh_cpuinfo *c)
drivers/serial/sh-sci.c +1 -1
@@ -393,7 +393,7 @@ static void sci_init_pins_scif(struct ua
 	if (cflag & CRTSCTS) {
 		fcr_val |= SCFCR_MCE;
 	} else {
-#ifdef CONFIG_CPU_SUBTYPE_SH7343
+#if defined(CONFIG_CPU_SUBTYPE_SH7343) || defined(CONFIG_CPU_SUBTYPE_SH7366)
 		/* Nothing */
 #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
       defined(CONFIG_CPU_SUBTYPE_SH7780) || \
drivers/serial/sh-sci.h +7 -1
@@ -97,6 +97,12 @@
 # define SCSCR_INIT(port)	0x0038	/* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
 # define SCIF_ONLY
 # define PORT_PSCR		0xA405011E
+#elif defined(CONFIG_CPU_SUBTYPE_SH7366)
+# define SCPDR0			0xA405013E      /* 16 bit SCIF0 PSDR */
+# define SCSPTR0		SCPDR0
+# define SCIF_ORER		0x0001  /* overrun error bit */
+# define SCSCR_INIT(port)	0x0038  /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
+# define SCIF_ONLY
 #elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
 # define SCSPTR2 0xffe80020 /* 16 bit SCIF */
 # define SCIF_ORER 0x0001   /* overrun error bit */

@@ -577,7 +583,7 @@ static inline int sci_rxd_in(struct uart
 		return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
 	return 1;
 }
-#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
+#elif defined(CONFIG_CPU_SUBTYPE_SH7722) || defined(CONFIG_CPU_SUBTYPE_SH7366)
 static inline int sci_rxd_in(struct uart_port *port)
 {
 	if (port->mapbase = 0xffe00000)
include/asm-sh/cpu-sh4/freq.h +3 -1
@@ -10,12 +10,14 @@
 #ifndef __ASM_CPU_SH4_FREQ_H
 #define __ASM_CPU_SH4_FREQ_H
 
-#if defined(CONFIG_CPU_SUBTYPE_SH7722)
+#if defined(CONFIG_CPU_SUBTYPE_SH7722) || defined(CONFIG_CPU_SUBTYPE_SH7366)
 #define FRQCR		        0xa4150000
 #define VCLKCR			0xa4150004
 #define SCLKACR			0xa4150008
 #define SCLKBCR			0xa415000c
+#if defined(CONFIG_CPU_SUBTYPE_SH7722)
 #define IrDACLKCR		0xa4150010
+#endif
 #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
       defined(CONFIG_CPU_SUBTYPE_SH7780)
 #define	FRQCR			0xffc80000
include/asm-sh/processor.h +1 -1
@@ -33,7 +33,7 @@ enum cpu_type {
 	CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SHX3,
 
 	/* SH4AL-DSP types */
-	CPU_SH7343, CPU_SH7722,
+	CPU_SH7343, CPU_SH7722, CPU_SH7366,
 
 	/* SH-5 types */
         CPU_SH5_101, CPU_SH5_103,