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Yet another ccio fix idea?

PATCH Joel Soete 4 participants 6 messages Mar 9, 2008 – Mar 14, 2008 PA-RISC architecture

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Joel Soete

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#0 lore raw

Hello Grant,

Always tracking this ccio-dma bug, I figure out this stuff could be helpfull:

drivers/parisc/ccio-dma.c +1 -1
@@ -802,7 +802,7 @@
 			 * Hopefully someone figures out how to patch (NOP) the
 			 * FDC/SYNC out at boot time.
 			 */
-			asm volatile("fdc %%r0(%0)" : : "r" (pdir_ptr[7]));
+			asm volatile("fdc %%r0(%0)" : : "r" (pdir_ptr));

What's your opinion?

Tx,

	r.
#1 lore raw
Quoted 13 lines · Joel Soete

Hello Grant,

Always tracking this ccio-dma bug, I figure out this stuff could be helpfull:

drivers/parisc/ccio-dma.c +1 -1
@@ -802,7 +802,7 @@
 			 * Hopefully someone figures out how to patch (NOP) the
 			 * FDC/SYNC out at boot time.
 			 */
-			asm volatile("fdc %%r0(%0)" : : "r" (pdir_ptr[7]));
+			asm volatile("fdc %%r0(%0)" : : "r" (pdir_ptr));
Quoted 1 line

What's your opinion?

I think you are right. That's what sba_iommu.c is using on line 560.

Have you tested this to see if it solves your problem?

cheers,
grant

#2 lore raw
In reply to Joel Soete

drivers/parisc/ccio-dma.c line 805

Quoted 12 lines · Joel Soete

Hello Grant,

Always tracking this ccio-dma bug, I figure out this stuff could be helpfull:

drivers/parisc/ccio-dma.c +1 -1
@@ -802,7 +802,7 @@
 			 * Hopefully someone figures out how to patch (NOP) the
 			 * FDC/SYNC out at boot time.
 			 */
-			asm volatile("fdc %%r0(%0)" : : "r" (pdir_ptr[7]));
+			asm volatile("fdc %%r0(%0)" : : "r" (pdir_ptr));

BTW, once you've tested/demostrated this fixes the DMA problems on C-xxx, please resend with "Signed-off-by:" line.

thanks,
grant

Quoted 5 lines

What's your opinion?

Tx,

	r.
maintainer
#3 lore raw
In reply to Joel Soete

drivers/parisc/ccio-dma.c line 805

Quoted 11 lines · Joel Soete

Hello Grant,

Always tracking this ccio-dma bug, I figure out this stuff could be helpfull:

drivers/parisc/ccio-dma.c +1 -1
@@ -802,7 +802,7 @@
  			 * Hopefully someone figures out how to patch (NOP) the
  			 * FDC/SYNC out at boot time.
  			 */
-			asm volatile("fdc %%r0(%0)" : : "r" (pdir_ptr[7]));
+			asm volatile("fdc %%r0(%0)" : : "r" (pdir_ptr));

That's the wrong fix. What it's trying to do is flush the write made above this to pdir_ptr[7]. Therefore there should be an '&' in front, so

asm volatile("fdc %%r0(%0)" : : "r" (&pdir_ptr[7]))

Flushing pdir_ptr may or may not work depending on the cache line width (pdr_ptr[7] is 28 bytes away, so if the line size is 16 it will fail; although I think almost every machine with a ccio has a 32 byte or higher cache line width).

James

#4 lore raw
Quoted 6 lines

asm volatile("fdc %%r0(%0)" : : "r" (&pdir_ptr[7]))

Flushing pdir_ptr may or may not work depending on the cache line width (pdr_ptr[7] is 28 bytes away, so if the line size is 16 it will fail; although I think almost every machine with a ccio has a 32 byte or higher cache line width).

Actually, pdr_ptr is a char *, so this is 7 bytes away. However, I think you are correct in saying that pdr_ptr[7] needs to be flushed.

The same issue would appear to apply to the other flush in the file.

The cache line alignment of pdir's isn't immediately apparent to me. If the pdir was defined as a two word array, it might span two lines.

Dave

Signature · 2 lines
J. David Anglin                                  [email protected]
National Research Council of Canada              (613) 990-0752 (FAX: 952-6602)
#5 lore raw
In reply to James Bottomley
Quoted 17 lines · James Bottomley

drivers/parisc/ccio-dma.c line 805

Quoted 11 lines · Joel Soete

Hello Grant,

Always tracking this ccio-dma bug, I figure out this stuff could be helpfull:

drivers/parisc/ccio-dma.c +1 -1
@@ -802,7 +802,7 @@
  			 * Hopefully someone figures out how to patch (NOP) the
  			 * FDC/SYNC out at boot time.
  			 */
-			asm volatile("fdc %%r0(%0)" : : "r" (pdir_ptr[7]));
+			asm volatile("fdc %%r0(%0)" : : "r" (pdir_ptr));

That's the wrong fix. What it's trying to do is flush the write made above this to pdir_ptr[7]. Therefore there should be an '&' in front, so

Quoted 1 line

asm volatile("fdc %%r0(%0)" : : "r" (&pdir_ptr[7]))

In this case, it's certainly the same cacheline.
I can guarantee pdir_ptr is 8 byte aligned.

Quoted 4 lines

Flushing pdir_ptr may or may not work depending on the cache line width (pdr_ptr[7] is 28 bytes away, so if the line size is 16 it will fail; although I think almost every machine with a ccio has a 32 byte or higher cache line width).

Yes (32-byte cachelines at least) and jda already pointed out pdir_ptr is a char*.

thanks,
grant

Quoted 8 lines

James

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