Fix PMU + soft interrupt disable bug

Since the PMU is an NMI now, it can come at any time we are only soft disabled. We must hard disable around the two places we allow the kernel stack SLB and r1 to go out of sync. Otherwise the PMU exception can force a kernel stack SLB into another slot.

Signed-off-by Anton Blanchard <[email protected]>

---

Index: kernel/arch/powerpc/mm/slb.c
===================================================================

arch/powerpc/mm/slb.c +6 -0

@@ -113,6 +113,12 @@ void slb_flush_and_rebolt(void)
 		slb_shadow_update(get_paca()->kstack, lflags, 2);
 	}
 
+	/*
+	 * We can't take a PMU exception in the following code, so hard
+	 * disable interrupts.
+	 */
+	hard_irq_disable();
+
 	/* We need to do this all in asm, so we're sure we don't touch
 	 * the stack between the slbia and rebolting it. */
 	asm volatile("isync\n"

Index: kernel/arch/powerpc/kernel/process.c
===================================================================

arch/powerpc/kernel/process.c +6 -0

@@ -331,6 +331,12 @@ struct task_struct *__switch_to(struct t
 	account_process_vtime(current);
 	calculate_steal_time();
 
+	/*
+	 * We can't take a PMU exception inside _switch() since there is a
+	 * window where the kernel stack SLB and the kernel stack are out
+	 * of sync. Hard disable here.
+	 */
+	hard_irq_disable();
 	last = _switch(old_thread, new_thread);
 
 	local_irq_restore(flags);

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Since the PMU is an NMI now, it can come at any time we are only soft disabled. We must hard disable around the two places we allow the kernel stack SLB and r1 to go out of sync. Otherwise the PMU exception can force a kernel stack SLB into another slot.

Signed-off-by Anton Blanchard <[email protected]>