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mpc83xx: MPC837XERDB: add support for PCI-Express

PATCH New Anton Vorontsov 2 participants 3 messages Mar 24, 2008

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#0 lore raw

PATCH 2/2 mpc83xx: MPC837XERDB: add support for PCI-Express

This is largely based on the MDS boards' code (patch by Tony Li <[email protected]>).

---
 board/freescale/mpc837xerdb/Makefile      |    5 +-
 board/freescale/mpc837xerdb/mpc837xerdb.c |   13 ++++-
 board/freescale/mpc837xerdb/pcie.c        |   87 +++++++++++++++++++++++++++++
 include/configs/MPC837XERDB.h             |   28 +++++++++
 4 files changed, 131 insertions(+), 2 deletions(-)
 create mode 100644 board/freescale/mpc837xerdb/pcie.c
board/freescale/mpc837xerdb/Makefile +4 -1
index 5ec7a87..5d9e188 100644
@@ -25,8 +25,11 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).a
 
-COBJS	:= $(BOARD).o pci.o
+COBJS-y += $(BOARD).o
+COBJS-$(CONFIG_PCI) += pci.o
+COBJS-$(CONFIG_PCIE) += pcie.o
 
+COBJS	:= $(COBJS-y)
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
 SOBJS	:= $(addprefix $(obj),$(SOBJS))
board/freescale/mpc837xerdb/mpc837xerdb.c +12 -1
index 70f52da..78e208f 100644
@@ -19,7 +19,7 @@
 #include <asm/fsl_serdes.h>
 #include <spd_sdram.h>
 #include <vsc7385.h>
-
+#include "pcie.h"
 
 #if defined(CFG_DRAM_TEST)
 int
@@ -170,6 +170,17 @@ int board_early_init_f(void)
 	return 0;
 }
 
+int board_early_init_r(void)
+{
+	immap_t *immr = (immap_t *)CFG_IMMR;
+	u32 part = in_be32(&immr->sysconf.spridr) >> 16;
+
+	if (part != SPR_8379E_REV10 >> 16 && part != SPR_8379_REV10 >> 16)
+		pcie_init_board();
+
+	return 0;
+}
+
 /*
  * Miscellaneous late-boot configurations
  *
board/freescale/mpc837xerdb/pcie.c new file +87 -0

87 lines not on this page · raw message

include/configs/MPC837XERDB.h +28 -0
index 3b5d035..b628f38 100644
@@ -31,8 +31,10 @@
 #define CONFIG_MPC837XERDB	1
 
 #define CONFIG_PCI	1
+#define CONFIG_PCIE	1
 
 #define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_EARLY_INIT_R
 #define CONFIG_MISC_INIT_R
 
 /*
@@ -380,6 +382,32 @@
 
 #undef CONFIG_PCI_SCAN_SHOW	/* show pci devices on startup */
 #define CFG_PCI_SUBSYS_VENDORID 0x1957	/* Freescale */
+
+#ifdef CONFIG_PCIE
+#define CONFIG_83XX_GENERIC_PCIE	1 /* Use generic PCIE setup*/
+
+/* PCIE address map */
+#define CFG_PCIE1_BASE		0xA0000000
+#define CFG_PCIE1_MEM_BASE	CFG_PCIE1_BASE
+#define CFG_PCIE1_MEM_PHYS	CFG_PCIE1_MEM_BASE
+#define CFG_PCIE1_MEM_SIZE	0x10000000
+#define CFG_PCIE1_CFG_BASE	(CFG_PCIE1_MEM_BASE + CFG_PCIE1_MEM_SIZE)
+#define CFG_PCIE1_CFG_SIZE	0x01000000
+#define CFG_PCIE1_IO_BASE	0x0
+#define CFG_PCIE1_IO_PHYS	(CFG_PCIE1_CFG_BASE + CFG_PCIE1_CFG_SIZE)
+#define CFG_PCIE1_IO_SIZE	0x00800000
+
+#define CFG_PCIE2_BASE		0xC0000000
+#define CFG_PCIE2_MEM_BASE	CFG_PCIE2_BASE
+#define CFG_PCIE2_MEM_PHYS	CFG_PCIE2_MEM_BASE
+#define CFG_PCIE2_MEM_SIZE	0x10000000
+#define CFG_PCIE2_CFG_BASE	(CFG_PCIE2_MEM_BASE + CFG_PCIE2_MEM_SIZE)
+#define CFG_PCIE2_CFG_SIZE	0x01000000
+#define CFG_PCIE2_IO_BASE	0x0
+#define CFG_PCIE2_IO_PHYS	(CFG_PCIE2_CFG_BASE + CFG_PCIE2_CFG_SIZE)
+#define CFG_PCIE2_IO_SIZE	0x00800000
+
+#endif /* CONFIG_PCIE */
 #endif	/* CONFIG_PCI */
 
 /*
Signature · 1 line
1.5.2.2
#1 lore raw

PATCH 2/2 mpc83xx: MPC837XERDB: add support for PCI-Express

Quoted 2 lines · Anton Vorontsov

This is largely based on the MDS boards' code (patch by Tony Li <[email protected]>).

Oops. I meant Li Li, sorry.

Signature · 3 lines
Anton Vorontsov
email: cboumailru at gmail.com
irc://irc.freenode.net/bd2
#2 lore raw

PATCH 2/2 mpc83xx: MPC837XERDB: add support for PCI-Express

In reply to Anton Vorontsov

include/configs/MPC837XERDB.h line 395

Quoted 7 lines · On Mon, 24 Mar 2008 21:42:37 +0300 Anton Vorontsov <[email protected]>…
include/configs/MPC837XERDB.h +7 -0
+/* PCIE address map */
+#define CFG_PCIE1_BASE		0xA0000000
+#define CFG_PCIE1_MEM_BASE	CFG_PCIE1_BASE
+#define CFG_PCIE1_MEM_PHYS	CFG_PCIE1_MEM_BASE
+#define CFG_PCIE1_MEM_SIZE	0x10000000
+#define CFG_PCIE1_CFG_BASE	(CFG_PCIE1_MEM_BASE + CFG_PCIE1_MEM_SIZE)
+#define CFG_PCIE1_CFG_SIZE	0x01000000

I'm going to wait until I see how the kernel 83xx PCIE patches do before I apply this -- afaik, it's going to make the PCIE config mapping a 4K window (with translation being changed at run time) instead of a 16MB one.

Kim