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x86: pat cpu feature bit setting for known cpus

PATCH In review Yinghai Lu 7 participants 17 messages Mar 25, 2008 – Mar 30, 2008

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Yinghai Lu

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#0 lore raw

PATCH 1/1 x86: pat cpu feature bit setting for known cpus

[PATCH] x86: pat cpu feature bit setting for known cpus

Signed-off-by Yinghai Lu <[email protected]>
arch/x86/kernel/cpu/common.c +25 -0
index eb94460..b186047 100644
@@ -309,6 +309,19 @@ static void __cpuinit early_get_cap(struct cpuinfo_x86 *c)
 
 	}
 
+	clear_cpu_cap(c, X86_FEATURE_PAT);
+
+	switch (c->x86_vendor) {
+	case X86_VENDOR_AMD:
+		if (c->x86 >= 0xf && c->x86 <= 0x11)
+			set_cpu_cap(c, X86_FEATURE_PAT);
+		break;
+	case X86_VENDOR_INTEL:
+		if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
+			set_cpu_cap(c, X86_FEATURE_PAT);
+		break;
+	}
+
 }
 
 /*

@@ -397,6 +410,18 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
 		init_scattered_cpuid_features(c);
 	}
 
+	clear_cpu_cap(c, X86_FEATURE_PAT);
+
+	switch (c->x86_vendor) {
+	case X86_VENDOR_AMD:
+		if (c->x86 >= 0xf && c->x86 <= 0x11)
+			set_cpu_cap(c, X86_FEATURE_PAT);
+		break;
+	case X86_VENDOR_INTEL:
+		if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
+			set_cpu_cap(c, X86_FEATURE_PAT);
+		break;
+	}
 }
 
 static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
arch/x86/kernel/setup_64.c +7 -0
index 3f1dc97..ddaaaaa 100644
@@ -979,12 +979,19 @@ static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
 	if (c->extended_cpuid_level >= 0x80000007)
 		c->x86_power = cpuid_edx(0x80000007);
 
+
+	clear_cpu_cap(c, X86_FEATURE_PAT);
+
 	switch (c->x86_vendor) {
 	case X86_VENDOR_AMD:
 		early_init_amd(c);
+		if (c->x86 >= 0xf && c->x86 <= 0x11)
+			set_cpu_cap(c, X86_FEATURE_PAT);
 		break;
 	case X86_VENDOR_INTEL:
 		early_init_intel(c);
+		if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
+			set_cpu_cap(c, X86_FEATURE_PAT);
 		break;
 	}
arch/x86/mm/pat.c +2 -13
@@ -42,19 +42,8 @@
 	if (!pat_wc_enabled)
 		return 0;
 
-	if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
-	    (boot_cpu_data.x86 == 0xF ||
-	     (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model >= 15))) {
-		if (cpu_has_pat) {
-			return 1;
-		}
-	}
-	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
-	     boot_cpu_data.x86 >= 0xf && boot_cpu_data.x86 <= 0x11) {
-		if (cpu_has_pat) {
-			return 1;
-		}
-	}
+	if (cpu_has_pat)
+		return 1;
 
 	pat_wc_enabled = 0;
 	printk(KERN_INFO "CPU and/or kernel does not support PAT.\n");
#1 lore raw
Quoted 1 line · Yinghai Lu

[PATCH] x86: pat cpu feature bit setting for known cpus

thanks, applied - we need this to widen the testing scope of the PAT changes.

Ingo

#3 lore raw
Quoted 7 lines · H. Peter Anvin
Quoted 3 lines · Yinghai Lu

[PATCH] x86: pat cpu feature bit setting for known cpus

Signed-off-by Yinghai Lu <[email protected]>

OK, note previous question: what is the motivation for having this as a whitelist (as opposed to a blacklist)?

Venkatesh could tell?

YH

#4 lore raw
Quoted 10 lines · Yinghai Lu
Quoted 7 lines · H. Peter Anvin
Quoted 3 lines · Yinghai Lu

[PATCH] x86: pat cpu feature bit setting for known cpus

Signed-off-by Yinghai Lu <[email protected]>

OK, note previous question: what is the motivation for having this as a whitelist (as opposed to a blacklist)?

Venkatesh could tell?

Main reason for white-list at this point is not to be side-tracked by real or potential erratas on older CPUs. Focussing on getting the support for this feature on current and future CPUs. If older CPUs have survived all these days without this feature, they should be doing OK.

Other reason being the amount of testing we get on those older systems. I mean, any regression on some specific CPU is hard to find unless it is being tested or someone audits all the errata documents to prepare the blacklist (Unless we want to have big blacklist which is just !current_whitelist). We do not have any self test that can detect and report any problematic CPUs that we can add to the blacklist.

Having said that, if there is a need for this on older CPUs, I am OK with having this as a blacklist.

Thanks,
Venki

#5 lore raw
Quoted 10 lines · Venki Pallipadi
Quoted 4 lines
Quoted 2 lines

OK, note previous question: what is the motivation for having this as a whitelist (as opposed to a blacklist)?

Venkatesh could tell?

Main reason for white-list at this point is not to be side-tracked by real or potential erratas on older CPUs. Focussing on getting the support for this feature on current and future CPUs. If older CPUs have survived all these days without this feature, they should be doing OK.

well, the upside would be that since most testing of Linux kernels is done on _old_ hardware (people tend to risk their old hw first ;-), we'd get faster convergence of the codebase, even though we have the risk of erratas (known and unknown ones alike). Code that artificially limits its utility is almost always slow to stabilize.

Ingo

reviewer
#6 lore raw
Quoted 9 lines · Ingo Molnar
Quoted 4 lines · Venki Pallipadi
Quoted 3 lines
Quoted 2 lines

OK, note previous question: what is the motivation for having this as a whitelist (as opposed to a blacklist)?

Venkatesh could tell?

Main reason for white-list at this point is not to be side-tracked by real or potential erratas on older CPUs. Focussing on getting the support for this feature on current and future CPUs. If older CPUs have survived all these days without this feature, they should be doing OK.

well, the upside would be that since most testing of Linux kernels is done on _old_ hardware (people tend to risk their old hw first ;-), we'd get faster convergence of the codebase, even though we have the risk of erratas (known and unknown ones alike). Code that artificially limits its utility is almost always slow to stabilize.

Yes, using a whitelist of this type is wrong, IMO, and smells faintly of vendor-lockin.

-hpa

reviewer
#7 lore raw
Quoted 5 lines · H. Peter Anvin
Quoted 4 lines · Ingo Molnar
Quoted 2 lines · Venki Pallipadi
Quoted 2 lines
Quoted 2 lines

OK, note previous question: what is the motivation for having this as a whitelist (as opposed to a blacklist)?

Quoted 8 lines
Quoted 5 lines
Quoted 2 lines
Quoted 1 line

Venkatesh could tell?

Main reason for white-list at this point is not to be side-tracked by real or potential erratas on older CPUs. Focussing on getting the support for this feature on current and future CPUs. If older CPUs have survived all these days without this feature, they should be doing OK.

well, the upside would be that since most testing of Linux kernels is done on _old_ hardware (people tend to risk their old hw first ;-), we'd get faster convergence of the codebase, even though we have the risk of erratas (known and unknown ones alike). Code that artificially limits its utility is almost always slow to stabilize.

Yes, using a whitelist of this type is wrong, IMO, and smells faintly of vendor-lockin.

By the way, I want to clarify: I didn't mean it was *intended* as vendor-lockin, just that it's an undesirable effect of this.

-hpa

#8 lore raw
Quoted 21 lines · H. Peter Anvin
Quoted 19 lines · H. Peter Anvin
Quoted 17 lines · Ingo Molnar
Quoted 8 lines · Venki Pallipadi
Quoted 3 lines
Quoted 2 lines

OK, note previous question: what is the motivation for having this as a whitelist (as opposed to a blacklist)?

Venkatesh could tell?

Main reason for white-list at this point is not to be side-tracked by real or potential erratas on older CPUs. Focussing on getting the support for this feature on current and future CPUs. If older CPUs have survived all these days without this feature, they should be doing OK.

well, the upside would be that since most testing of Linux kernels is done on _old_ hardware (people tend to risk their old hw first ;-), we'd get faster convergence of the codebase, even though we have the risk of erratas (known and unknown ones alike). Code that artificially limits its utility is almost always slow to stabilize.

Quoted 6 lines
Quoted 3 lines

Yes, using a whitelist of this type is wrong, IMO, and smells faintly of vendor-lockin.

By the way, I want to clarify: I didn't mean it was *intended* as vendor-lockin, just that it's an undesirable effect of this.

if the PAT works, we may need to trim the memory according to MTRR, right?

YH

reviewer
#9 lore raw
Quoted 6 lines · Yinghai Lu
Quoted 3 lines

By the way, I want to clarify: I didn't mean it was *intended* as vendor-lockin, just that it's an undesirable effect of this.

if the PAT works, we may need to trim the memory according to MTRR, right?

That doesn't seem like it's specific to PAT?

-hpa

#10 lore raw
Quoted 9 lines · H. Peter Anvin
Quoted 6 lines · Yinghai Lu
Quoted 3 lines

By the way, I want to clarify: I didn't mean it was *intended* as vendor-lockin, just that it's an undesirable effect of this.

if the PAT works, we may need to trim the memory according to MTRR, right?

That doesn't seem like it's specific to PAT?

could page table to set WRBACK the range that is not covered by MTRR in e820..

YH

#11 lore raw
Quoted 17 lines

-----Original Message-----
From: Yinghai Lu [mailto:[email protected]]
Sent: Tuesday, March 25, 2008 4:09 PM
To: H. Peter Anvin
Cc: Ingo Molnar; Pallipadi, Venkatesh; Thomas Gleixner; Andrew Morton; kernel list; Siddha, Suresh B
Subject: Re: [PATCH] x86: pat cpu feature bit setting for known cpus

Quoted 3 lines · H. Peter Anvin
Quoted 2 lines · Yinghai Lu
Quoted 2 lines

By the way, I want to clarify: I didn't mean it was

*intended* as

Quoted 2 lines
Quoted 2 lines
Quoted 1 line

vendor-lockin, just that it's an undesirable effect of this.

Quoted 9 lines
Quoted 1 line
Quoted 1 line

if the PAT works, we may need to trim the memory

according to MTRR, right?

Quoted 3 lines
Quoted 1 line

That doesn't seem like it's specific to PAT?

could page table to set WRBACK the range that is not covered by MTRR in e820..

Trimming of e820 memory is already done by Jesse's patch here commit 99fc8d424bc5d80
Are you referring to similar thing?

Thanks,
Venki

#12 lore raw
Quoted 24 lines · Venkatesh
Quoted 24 lines

-----Original Message-----
From: Yinghai Lu [mailto:[email protected]]
Sent: Tuesday, March 25, 2008 4:09 PM
To: H. Peter Anvin
Cc: Ingo Molnar; Pallipadi, Venkatesh; Thomas Gleixner; Andrew Morton; kernel list; Siddha, Suresh B
Subject: Re: [PATCH] x86: pat cpu feature bit setting for known cpus

Quoted 3 lines · H. Peter Anvin
Quoted 2 lines · Yinghai Lu
Quoted 2 lines

By the way, I want to clarify: I didn't mean it was

*intended* as

Quoted 3 lines
Quoted 3 lines
Quoted 1 line

vendor-lockin, just that it's an undesirable effect of this.

if the PAT works, we may need to trim the memory

according to MTRR, right?

Quoted 3 lines
Quoted 1 line

That doesn't seem like it's specific to PAT?

Quoted 8 lines
Quoted 3 lines

could page table to set WRBACK the range that is not covered by MTRR in e820..

Trimming of e820 memory is already done by Jesse's patch here commit 99fc8d424bc5d80
Are you referring to similar thing?

Yes.

YH

reviewer
#13 lore raw
In reply to Yinghai Lu
Quoted 6 lines · Yinghai Lu
Quoted 5 lines · H. Peter Anvin
Quoted 4 lines · Yinghai Lu
Quoted 3 lines

By the way, I want to clarify: I didn't mean it was *intended* as vendor-lockin, just that it's an undesirable effect of this.

Quoted 7 lines
Quoted 4 lines
Quoted 2 lines

if the PAT works, we may need to trim the memory according to MTRR, right?

That doesn't seem like it's specific to PAT?

could page table to set WRBACK the range that is not covered by MTRR in e820..

We have to trim anyway... lest we end up using uncached memory and then we're in a world of hurt.

-hpa

#14 lore raw
In reply to Yinghai Lu
Quoted 36 lines · Yinghai Lu

[PATCH] x86: pat cpu feature bit setting for known cpus

Signed-off-by Yinghai Lu <[email protected]>
arch/x86/kernel/cpu/common.c +17 -0
index eb94460..b186047 100644
@@ -309,6 +309,19 @@ static void __cpuinit early_get_cap(struct cpuinfo_x86 *c)
 
 	}
 
+	clear_cpu_cap(c, X86_FEATURE_PAT);
+
+	switch (c->x86_vendor) {
+	case X86_VENDOR_AMD:
+		if (c->x86 >= 0xf && c->x86 <= 0x11)
+			set_cpu_cap(c, X86_FEATURE_PAT);
+		break;
+	case X86_VENDOR_INTEL:
+		if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
+			set_cpu_cap(c, X86_FEATURE_PAT);
+		break;
+	}
+
 }
 
 /*

@@ -397,6 +410,18 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
 		init_scattered_cpuid_features(c);
 	}
 
+	clear_cpu_cap(c, X86_FEATURE_PAT);
+
+	switch (c->x86_vendor) {
+	case X86_VENDOR_AMD:

arch/x86/kernel/cpu/common.c static void __cpuinit generic_identify(struct cpuinfo_x86 *c) · line 426

Quoted 10 lines
arch/x86/kernel/cpu/common.c +8 -0
+		if (c->x86 >= 0xf && c->x86 <= 0x11)
+			set_cpu_cap(c, X86_FEATURE_PAT);
+		break;
+	case X86_VENDOR_INTEL:
+		if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
+			set_cpu_cap(c, X86_FEATURE_PAT);
+		break;
+	}
 }

Cut&paste programming? Can you make it a function?

Quoted 15 lines
arch/x86/kernel/setup_64.c +2 -0
index 3f1dc97..ddaaaaa 100644
@@ -979,12 +979,19 @@ static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
 	if (c->extended_cpuid_level >= 0x80000007)
 		c->x86_power = cpuid_edx(0x80000007);
 
+
+	clear_cpu_cap(c, X86_FEATURE_PAT);
 
 
 
 	switch (c->x86_vendor) {
 	case X86_VENDOR_AMD:

arch/x86/kernel/setup_64.c static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c) · line 996

Quoted 10 lines
arch/x86/kernel/setup_64.c +4 -0
 		early_init_amd(c);
+		if (c->x86 >= 0xf && c->x86 <= 0x11)
+			set_cpu_cap(c, X86_FEATURE_PAT);
 		break;
 	case X86_VENDOR_INTEL:
 		early_init_intel(c);
+		if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
+			set_cpu_cap(c, X86_FEATURE_PAT);
 		break;
 	}

one more copy...
Pavel

Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
#15 lore raw
Quoted 35 lines · Pavel Machek
Quoted 32 lines · Yinghai Lu

[PATCH] x86: pat cpu feature bit setting for known cpus

Signed-off-by Yinghai Lu <[email protected]>
arch/x86/kernel/cpu/common.c +13 -0
index eb94460..b186047 100644
@@ -309,6 +309,19 @@ static void __cpuinit early_get_cap(struct cpuinfo_x86 *c)
 
      }
 
+     clear_cpu_cap(c, X86_FEATURE_PAT);
+
+     switch (c->x86_vendor) {
+     case X86_VENDOR_AMD:
+             if (c->x86 >= 0xf && c->x86 <= 0x11)
+                     set_cpu_cap(c, X86_FEATURE_PAT);
+             break;
+     case X86_VENDOR_INTEL:
+             if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
+                     set_cpu_cap(c, X86_FEATURE_PAT);
+             break;
+     }
+
 }
 
 /*

@@ -397,6 +410,18 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
              init_scattered_cpuid_features(c);
      }
Quoted 16 lines
Quoted 4 lines
arch/x86/kernel/cpu/common.c +4 -0
+     clear_cpu_cap(c, X86_FEATURE_PAT);
+
+     switch (c->x86_vendor) {
+     case X86_VENDOR_AMD:

arch/x86/kernel/cpu/common.c static void __cpuinit early_get_cap(struct cpuinfo_x86 *c) · line 326

Quoted 10 lines
arch/x86/kernel/cpu/common.c +8 -0
+             if (c->x86 >= 0xf && c->x86 <= 0x11)
+                     set_cpu_cap(c, X86_FEATURE_PAT);
+             break;
+     case X86_VENDOR_INTEL:
+             if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
+                     set_cpu_cap(c, X86_FEATURE_PAT);
+             break;
+     }
 }

Cut&paste programming? Can you make it a function?

yes. just want to leave one stub, so could add other cap setting if needed later in early or late identify_cpu.

Quoted 28 lines
Quoted 17 lines
arch/x86/kernel/setup_64.c +2 -0
index 3f1dc97..ddaaaaa 100644
@@ -979,12 +979,19 @@ static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
      if (c->extended_cpuid_level >= 0x80000007)
              c->x86_power = cpuid_edx(0x80000007);
 
+
+     clear_cpu_cap(c, X86_FEATURE_PAT);
 
 
 
      switch (c->x86_vendor) {
      case X86_VENDOR_AMD:

arch/x86/kernel/setup_64.c static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c) · line 996

Quoted 10 lines
arch/x86/kernel/setup_64.c +4 -0
              early_init_amd(c);
+             if (c->x86 >= 0xf && c->x86 <= 0x11)
+                     set_cpu_cap(c, X86_FEATURE_PAT);
              break;
      case X86_VENDOR_INTEL:
              early_init_intel(c);
+             if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
+                     set_cpu_cap(c, X86_FEATURE_PAT);
              break;
      }
Quoted 1 line

one more copy...

for 64 bit.

YH

#16 lore raw
In reply to Yinghai Lu
Quoted 9 lines · Yinghai Lu

[PATCH] x86: pat cpu feature bit setting for known cpus

Signed-off-by Yinghai Lu <[email protected]>
arch/x86/kernel/cpu/common.c +0 -0
index eb94460..b186047 100644

arch/x86/kernel/cpu/common.c static void __cpuinit early_get_cap(struct cpuinfo_x86 *c) · line 317

Quoted 9 lines
arch/x86/kernel/cpu/common.c +6 -0
@@ -309,6 +309,19 @@ static void __cpuinit early_get_cap(struct cpuinfo_x86 *c)
 
 	}
 
+	clear_cpu_cap(c, X86_FEATURE_PAT);
+
+	switch (c->x86_vendor) {
+	case X86_VENDOR_AMD:
+		if (c->x86 >= 0xf && c->x86 <= 0x11)
+			set_cpu_cap(c, X86_FEATURE_PAT);

just a general comment on things like this... "x->x86 <= 0x11" ensures this file will have to be updated every time a new AMD CPU is released.

arch/x86/kernel/cpu/common.c static void __cpuinit early_get_cap(struct cpuinfo_x86 *c) · line 320

Quoted 3 lines
arch/x86/kernel/cpu/common.c +3 -0
+		break;
+	case X86_VENDOR_INTEL:
+		if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))

note that you didn't limit intel the same way... at least for the numerous core2 processor models.

-dean