Freescale eLBC FCM NAND driver
Subsystems (2)
PATCH 2/2 Freescale eLBC FCM NAND driver
This is a driver for the Flash Control Machine of the enhanched Local Bus Controller found on some Freescale chips (such as the mpc8313 and the mpc8379).
---
This patch applies to the mtd-2.6.22.1 branch of the nand tree.
drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/fsl_elbc_nand.c | 764 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 765 insertions(+), 0 deletions(-) create mode 100644 drivers/mtd/nand/fsl_elbc_nand.c
drivers/mtd/nand/Makefile +1 -0
@@ -32,6 +32,7 @@ COBJS-y += nand_ecc.o COBJS-y += nand_bbt.o COBJS-y += nand_util.o +COBJS-y += fsl_elbc_nand.o COBJS-y += fsl_upm.o COBJS := $(COBJS-y)
drivers/mtd/nand/fsl_elbc_nand.c new file +764 -0
764 lines not on this page · raw message
Signature · 1 line
1.5.3
PATCH 2/2 Freescale eLBC FCM NAND driver
Quoted 46 lines · Scott Wood
This is a driver for the Flash Control Machine of the enhanched Local Bus Controller found on some Freescale chips (such as the mpc8313 and the mpc8379).
Signed-off-by Scott Wood <[email protected]>---
This patch applies to the mtd-2.6.22.1 branch of the nand tree.drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/fsl_elbc_nand.c | 764 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 765 insertions(+), 0 deletions(-) create mode 100644 drivers/mtd/nand/fsl_elbc_nand.cdrivers/mtd/nand/Makefile +1
-0@@ -32,6 +32,7 @@ COBJS-y += nand_ecc.o COBJS-y += nand_bbt.o COBJS-y += nand_util.o +COBJS-y += fsl_elbc_nand.o COBJS-y += fsl_upm.o COBJS := $(COBJS-y)drivers/mtd/nand/fsl_elbc_nand.c new file +15
-0@@ -0,0 +1,764 @@ +/* Freescale Enhanced Local Bus Controller FCM NAND driver +* +* Copyright (c) 2006-2008 Freescale Semiconductor +* +* Authors: Nick Spence <[email protected]>, +* Scott Wood <[email protected]> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
drivers/mtd/nand/fsl_elbc_nand.c line 25
Quoted 10 lines
drivers/mtd/nand/fsl_elbc_nand.c new file +10
-0+* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ + +#include <common.h> + +#if defined(CONFIG_CMD_NAND ) && defined(CONFIG_NAND_FSL_ELBC )
Please move to the Makefile
Quoted 10 lines
drivers/mtd/nand/fsl_elbc_nand.c new file +10
-0+ +#include <malloc.h> + +#include <linux/mtd/mtd.h> +#include <linux/mtd/nand.h> +#include <linux/mtd/nand_ecc.h> + +#include <asm/io.h> +#include <asm/errno.h> +
....
Quoted 10 lines
drivers/mtd/nand/fsl_elbc_nand.c new file +10
-0+ ctrl->read_bytes = mtd->writesize + mtd->oobsize; + ctrl->index += column; + +fsl_elbc_do_read (chip,0 ); +fsl_elbc_run_command (mtd); +return ; + +/* READOOB reads only the OOB because no ECC is performed. */ +case NAND_CMD_READOOB : + vdbg("fsl_elbc_cmdfunc: NAND_CMD_READOOB, page_addr:"
drivers/mtd/nand/fsl_elbc_nand.c line 305
Quoted 10 lines
drivers/mtd/nand/fsl_elbc_nand.c new file +10
-0+ " 0x%x, column: 0x%x.\n", page_addr, column); + +out_be32 (&lbc->fbcr, mtd->oobsize - column); +set_addr (mtd, column, page_addr,1 ); + + ctrl->read_bytes = mtd->writesize + mtd->oobsize; + +fsl_elbc_do_read (chip,1 ); +fsl_elbc_run_command (mtd); +
^^^^^^^^^^^^^
WhiteSpace please remove
Quoted 20 lines
drivers/mtd/nand/fsl_elbc_nand.c new file +20
-0+return ; + +/* READID must read all 5 possible bytes while CEB is active */ +case NAND_CMD_READID : +vdbg ("fsl_elbc_cmdfunc: NAND_CMD_READID.\n" ); + +out_be32 (&lbc->fir, (FIR_OP_CW0 <<FIR_OP0_SHIFT ) | + (FIR_OP_UA <<FIR_OP1_SHIFT ) | + (FIR_OP_RBW <<FIR_OP2_SHIFT )); +out_be32 (&lbc->fcr,NAND_CMD_READID <<FCR_CMD0_SHIFT ); +/* 5 bytes for manuf, device and exts */ +out_be32 (&lbc->fbcr,5 ); + ctrl->read_bytes =5 ; + ctrl->use_mdr =1 ; + ctrl->mdr =0 ; + +set_addr (mtd,0 ,0 ,0 ); +fsl_elbc_run_command (mtd); +return ; +
....
drivers/mtd/nand/fsl_elbc_nand.c line 482
Quoted 10 lines
drivers/mtd/nand/fsl_elbc_nand.c new file +10
-0+printf ("fsl_elbc_cmdfunc: error, unsupported command 0x%x.\n" , + command); + } +} + +static void fsl_elbc_select_chip (struct mtd_info *mtd,int chip) +{ +/* The hardware does not seem to support multiple +* chips per bank. +*/
please use this comment style
/*
* ...
* ....
*/
Quoted 12 lines
drivers/mtd/nand/fsl_elbc_nand.c new file +12
-0+} + +/* +* Write buf to the FCM Controller Data Buffer +*/ +static void fsl_elbc_write_buf (struct mtd_info *mtd,const u8 *buf,int len) +{ +struct nand_chip *chip = mtd->priv; +struct fsl_elbc_mtd *priv = chip->priv; +struct fsl_elbc_ctrl *ctrl = priv->ctrl; +unsigned int bufsize = mtd->writesize + mtd->oobsize; +
....
drivers/mtd/nand/fsl_elbc_nand.c line 583
Quoted 7 lines
drivers/mtd/nand/fsl_elbc_nand.c new file +7
-0+ +for (i =0 ; i < len; i++) +if (in_8 (&ctrl->addr[ctrl->index + i]) != buf[i]) +break ; + + ctrl->index += len; +return i == len && ctrl->status ==LTESR_CC ?0 : -EIO ;
please use something like that to help the reading
return ((i==len) && (ctrl->status==LTESR_CC))? 0 : -EIO;
drivers/mtd/nand/fsl_elbc_nand.c line 588
Quoted 5 lines
drivers/mtd/nand/fsl_elbc_nand.c new file +5
-0+} + +/* This function is called after Program and Erase Operations to +* check for success or failure. +*/
Comment same as before
Quoted 37 lines
drivers/mtd/nand/fsl_elbc_nand.c new file +37
-0+static int fsl_elbc_wait (struct mtd_info *mtd,struct nand_chip *chip) +{ +struct fsl_elbc_mtd *priv = chip->priv; +struct fsl_elbc_ctrl *ctrl = priv->ctrl; +lbus83xx_t *lbc = ctrl->regs; + +if (ctrl->status !=LTESR_CC ) +return NAND_STATUS_FAIL ; + +/* Use READ_STATUS command, but wait for the device to be ready */ + ctrl->use_mdr =0 ; +out_be32 (&lbc->fir, + (FIR_OP_CW0 <<FIR_OP0_SHIFT ) | + (FIR_OP_RBW <<FIR_OP1_SHIFT )); +out_be32 (&lbc->fcr,NAND_CMD_STATUS <<FCR_CMD0_SHIFT ); +out_be32 (&lbc->fbcr,1 ); +set_addr (mtd,0 ,0 ,0 ); + ctrl->read_bytes =1 ; + +fsl_elbc_run_command (mtd); + +if (ctrl->status !=LTESR_CC ) +return NAND_STATUS_FAIL ; + +/* The chip always seems to report that it is +* write-protected, even when it is not. +*/ +out_8 (ctrl->addr,in_8 (ctrl->addr) |NAND_STATUS_WP ); +return fsl_elbc_read_byte (mtd); +} + +static int fsl_elbc_read_page (struct mtd_info *mtd, +struct nand_chip *chip, +uint8_t *buf) +{ +fsl_elbc_read_buf (mtd, buf, mtd->writesize); +fsl_elbc_read_buf (mtd, chip->oob_poi, mtd->oobsize);
drivers/mtd/nand/fsl_elbc_nand.c line 635
Quoted 10 lines
drivers/mtd/nand/fsl_elbc_nand.c new file +10
-0+ +if (fsl_elbc_wait (mtd, chip) &NAND_STATUS_FAIL ) + mtd->ecc_stats.failed++; + +return 0 ; +} + +/* ECC will be calculated automatically, and errors will be detected in +* waitfunc. +*/
Comment same as before
Quoted 14 lines
drivers/mtd/nand/fsl_elbc_nand.c new file +14
-0+static void fsl_elbc_write_page (struct mtd_info *mtd, +struct nand_chip *chip, +const uint8_t *buf) +{ +struct fsl_elbc_mtd *priv = chip->priv; +struct fsl_elbc_ctrl *ctrl = priv->ctrl; + +fsl_elbc_write_buf (mtd, buf, mtd->writesize); +fsl_elbc_write_buf (mtd, chip->oob_poi, mtd->oobsize); + + ctrl->oob_poi = chip->oob_poi; +} + +static struct fsl_elbc_ctrl *elbc_ctrl;
drivers/mtd/nand/fsl_elbc_nand.c line 693
Quoted 10 lines
drivers/mtd/nand/fsl_elbc_nand.c new file +10
-0+ +if (!priv) +return -ENOMEM ; + + priv->ctrl = elbc_ctrl; + priv->vbase = nand->IO_ADDR_R; + +/* Find which chip select it is connected to. It'd be nice +* if we could pass more than one datum to the NAND driver... +*/
Comment same as before
Quoted 7 lines
drivers/mtd/nand/fsl_elbc_nand.c new file +7
-0+for (priv->bank =0 ; priv->bank <MAX_BANKS ; priv->bank++) { + br =in_be32 (&elbc_ctrl->regs->bank[priv->bank].br); + or =in_be32 (&elbc_ctrl->regs->bank[priv->bank].or); + +if ((br &BR_V ) && (br &BR_MSEL ) ==BR_MS_FCM && + (br & or &BR_BA ) == (phys_addr_t )nand->IO_ADDR_R) +break ;
drivers/mtd/nand/fsl_elbc_nand.c line 710
Quoted 10 lines
drivers/mtd/nand/fsl_elbc_nand.c new file +10
-0+ } + +if (priv->bank >=MAX_BANKS ) { +printf ("fsl_elbc_nand: address did not match any " +"chip selects\n" ); +return -ENODEV ; + } + + elbc_ctrl->chips[priv->bank] = priv; +
Please check all comments.
Best Regards,
J.
PATCH 2/2 Freescale eLBC FCM NAND driver
Quoted 2 lines · Jean-Christophe PLAGNIOL-VILLARD
Quoted 1 line
+#if
defined(CONFIG_CMD_NAND)&&defined(CONFIG_NAND_FSL_ELBC)Please move to the
Makefile
OK.
Quoted 7 lines
Quoted 7 lines
drivers/mtd/nand/fsl_elbc_nand.c new file +7
-0+/* READOOB reads only the OOB because no ECC is performed. */ +case NAND_CMD_READOOB : +vdbg ("fsl_elbc_cmdfunc: NAND_CMD_READOOB, page_addr:" +" 0x%x, column: 0x%x.\n" , page_addr, column); + +out_be32 (&lbc->fbcr, mtd->oobsize - column); +set_addr (mtd, column, page_addr,1 );
Quoted 8 lines
drivers/mtd/nand/fsl_elbc_nand.c line 305
Quoted 6 lines
drivers/mtd/nand/fsl_elbc_nand.c new file +6
-0+ + ctrl->read_bytes = mtd->writesize + mtd->oobsize; + +fsl_elbc_do_read (chip,1 ); +fsl_elbc_run_command (mtd); +^^^^^^^^^^^^^
WhiteSpace please remove
Grr... I keep forgetting to enable the post-commit hook in new git repositories. I wish it could be configured globally in a ~/.gitrc or similar.
Of course, I also wish people wouldn't get so bent out of shape about blank lines being indented to the level of the code around them.
Quoted 6 lines
drivers/mtd/nand/fsl_elbc_nand.c line 482
Quoted 5 lines
drivers/mtd/nand/fsl_elbc_nand.c new file +5
-0+static void fsl_elbc_select_chip (struct mtd_info *mtd,int chip) +{ +/* The hardware does not seem to support multiple +* chips per bank. +*/ please use this comment style
Do we really need such trivial style differences with the Linux driver, which will only serve as an annoyance when keeping the two in sync, not to mention wasting vertical space with no readability benefit because there's pretty much always a (mostly) blank line above the comment?
Quoted 3 lines
drivers/mtd/nand/fsl_elbc_nand.c line 583
Quoted 1 line
drivers/mtd/nand/fsl_elbc_nand.c new file +1
-0+return i == len && ctrl->status ==LTESR_CC ?0 : -EIO ;please use something like that to help the reading
return ((i==len) && (ctrl->status==LTESR_CC))? 0 : -EIO;
That's not the style I've generally seen used.
-Scott
PATCH 2/2 Freescale eLBC FCM NAND driver
Quoted 8 lines · Scott Wood
Quoted 7 lines
drivers/mtd/nand/fsl_elbc_nand.c line 482
Quoted 5 lines
drivers/mtd/nand/fsl_elbc_nand.c new file +5
-0+static void fsl_elbc_select_chip (struct mtd_info *mtd,int chip) +{ +/* The hardware does not seem to support multiple +* chips per bank. +*/ please use this comment style
Quoted 4 lines
Do we really need such trivial style differences with the Linux driver, which will only serve as an annoyance when keeping the two in sync, not to mention wasting vertical space with no readability benefit because there's pretty much always a (mostly) blank line above the comment?
This preferred comment style *should* be used. But I would not object to your (and others) multi-line comment style either. It's being used in Linux frequently and as you already mentioned saves one line. Especially when moving Linux drivers to U-Boot, we should allow this coding style for better maintenance.
Just my 2 cents.
Best regards,
Stefan
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