ads5121e DRAM init (fwd)
PATCH 1/1 ads5121e DRAM init (fwd)
Dear Chris,
as discussed, I have this patch for the ads5121e DRAM init code sitting in my queue; you mentioned you had a more recent / better patch available. I would appreciate if you could submit it soon to this mailing list so we can include it as part of the upcoming next U-Boot release.
Thanks in advance.
------- Forwarded Message
Date: Wed, 02 Apr 2008 20:34:14 +0200 From: Kenneth Johansson <[email protected]> To: u-boot-users at lists.sourceforge.net Subject: [U-Boot-Users] [PATCH] ads5121e DRAM init
Do the DRAM init according to micron MT47H64M8B6-37E documentation.
board/ads5121/ads5121.c +10 -18
@@ -158,26 +158,18 @@ long int fixed_sdram (void) im->mddrc.ddr_command =CFG_MICRON_NOP ; im->mddrc.ddr_command =CFG_MICRON_PCHG_ALL ; - im->mddrc.ddr_command =CFG_MICRON_NOP ; - im->mddrc.ddr_command =CFG_MICRON_RFSH ; - im->mddrc.ddr_command =CFG_MICRON_NOP ; - im->mddrc.ddr_command =CFG_MICRON_RFSH ; - im->mddrc.ddr_command =CFG_MICRON_NOP ; - im->mddrc.ddr_command =CFG_MICRON_INIT_DEV_OP ; - im->mddrc.ddr_command =CFG_MICRON_NOP ; - im->mddrc.ddr_command =CFG_MICRON_EM2 ; - im->mddrc.ddr_command =CFG_MICRON_NOP ; - im->mddrc.ddr_command =CFG_MICRON_PCHG_ALL ; - im->mddrc.ddr_command =CFG_MICRON_EM2 ; - im->mddrc.ddr_command =CFG_MICRON_EM3 ; - im->mddrc.ddr_command =CFG_MICRON_EN_DLL ; - im->mddrc.ddr_command =CFG_MICRON_INIT_DEV_OP ; + im->mddrc.ddr_command =CFG_MICRON_DDR2_LM_EM2 ; + im->mddrc.ddr_command =CFG_MICRON_DDR2_LM_EM3 ; + im->mddrc.ddr_command =CFG_MICRON_DDR2_LM_EM ; + im->mddrc.ddr_command =CFG_MICRON_DDR2_LM_MR_DLL_RESET ; + im->mddrc.ddr_command =CFG_MICRON_PCHG_ALL ; im->mddrc.ddr_command =CFG_MICRON_RFSH ; - im->mddrc.ddr_command =CFG_MICRON_INIT_DEV_OP ; - im->mddrc.ddr_command =CFG_MICRON_OCD_DEFAULT ; - im->mddrc.ddr_command =CFG_MICRON_PCHG_ALL ; - im->mddrc.ddr_command =CFG_MICRON_NOP ; + im->mddrc.ddr_command =CFG_MICRON_RFSH ; + + im->mddrc.ddr_command =CFG_MICRON_DDR2_LM_MR ; + im->mddrc.ddr_command =CFG_MICRON_DDR2_LM_EM_OCD ; + im->mddrc.ddr_command =CFG_MICRON_DDR2_LM_EM_EXIT ;/* Start MDDRC */ im->mddrc.ddr_time_config0 =CFG_MDDRC_TIME_CFG0_RUN ;
include/configs/ads5121.h +16 -8
@@ -117,14 +117,22 @@#define CFG_MDDRC_TIME_CFG1 0x54EC1168#define CFG_MDDRC_TIME_CFG2 0x35210864 -#define CFG_MICRON_NOP 0x01380000 -#define CFG_MICRON_PCHG_ALL 0x01100400 -#define CFG_MICRON_EM2 0x01020000 -#define CFG_MICRON_EM3 0x01030000 -#define CFG_MICRON_EN_DLL 0x01010000 -#define CFG_MICRON_RFSH 0x01080000 -#define CFG_MICRON_INIT_DEV_OP 0x01000432 -#define CFG_MICRON_OCD_DEFAULT 0x01010780 +/* DRAM commands */ +#define CFG_MICRON_NOP 0x01380000 +#define CFG_MICRON_PCHG_ALL 0x01100400 +#define CFG_MICRON_RFSH 0x01080000 + +/* DDR2 specific commands */ +#define CFG_MICRON_DDR2_LM_MR_DLL_RESET 0x01000100/* reset DLL */ +#define CFG_MICRON_DDR2_LM_MR 0x01000432/* burst lenght 4 */ +/* CAS 3 */ +/* Write recovery 3 */ +#define CFG_MICRON_DDR2_LM_EM_OCD 0x01010780/* OCD default */ +/* DQS# enable */ +#define CFG_MICRON_DDR2_LM_EM_EXIT 0x01010400/* DQS# enable */ +#define CFG_MICRON_DDR2_LM_EM 0x01010000 +#define CFG_MICRON_DDR2_LM_EM2 0x01020000 +#define CFG_MICRON_DDR2_LM_EM3 0x01030000/* DDR Priority Manager Configuration */
#define CFG_MDDRCGRP_PM_CFG1 0x000777AA
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Best regards,
Wolfgang Denk
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DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de The reasonable man adapts himself to the world; the unreasonable one persists in trying to adapt the world to himself. Therefore all progress depends on the unreasonable man." - George Bernard Shaw