sh: update smc91x platform data for MigoR
PATCH 1/1 sh: update smc91x platform data for MigoR
Select smc91x bus width and irg flags using platform data for MigoR now when the smc91x header file is in place.
---
arch/sh/boards/renesas/migor/setup.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-)
arch/sh/boards/renesas/migor/setup.c +10 -1
@@ -14,6 +14,7 @@#include <linux/mtd/physmap.h> #include <linux/mtd/nand.h> #include <linux/i2c.h> +#include <linux/smc91x.h> #include <asm/machvec.h> #include <asm/io.h> #include <asm/sh_keysc.h>
@@ -27,6 +28,11 @@* 0x18000000 8GB 8 NAND Flash (K9K8G08U0A) */ +static struct smc91x_platdata smc91x_info = { + .flags =SMC91X_USE_16BIT , + .irq_flags =IRQF_TRIGGER_HIGH , +}; +static struct resource smc91x_eth_resources[] = { [0 ] = { .name ="SMC91C111" ,
@@ -36,7 +42,7 @@ static struct resource smc91x_eth_resour }, [1 ] = { .start =32 ,/* IRQ0 */ - .flags =IORESOURCE_IRQ |IRQF_TRIGGER_HIGH , + .flags =IORESOURCE_IRQ , }, };
@@ -44,6 +50,9 @@ static struct platform_device smc91x_eth .name = "smc91x", .num_resources = ARRAY_SIZE(smc91x_eth_resources), .resource = smc91x_eth_resources, + .dev = { + .platform_data = &smc91x_info, + }, };static struct sh_keysc_info sh_keysc_info = {
PATCH 1/1 sh: update smc91x platform data for se7722
Select smc91x bus width using platform data for se7722 now when the smc91x header file is in place.
---
arch/sh/boards/se/7722/setup.c | 6 ++++++ 1 file changed, 6 insertions(+)
arch/sh/boards/se/7722/setup.c +6 -0
@@ -14,6 +14,7 @@#include <linux/platform_device.h> #include <linux/ata_platform.h> #include <linux/input.h> +#include <linux/smc91x.h> #include <asm/machvec.h> #include <asm/se7722.h> #include <asm/io.h>
@@ -44,6 +45,10 @@ static struct platform_device heartbeat_ };/* SMC91x */ +static struct smc91x_platdata smc91x_info = { + .flags =SMC91X_USE_16BIT , +}; +static struct resource smc91x_eth_resources[] = { [0 ] = { .name ="smc91x-regs" ,
@@ -64,6 +69,7 @@ static struct platform_device smc91x_eth .dev = { .dma_mask = NULL, /* don't use dma */ .coherent_dma_mask = 0xffffffff, + .platform_data = &smc91x_info, }, .num_resources = ARRAY_SIZE(smc91x_eth_resources), .resource = smc91x_eth_resources,
Quoted 2 lines · Magnus Damm
Select smc91x bus width and irg flags using platform data for MigoR now when the smc91x header file is in place.
Quoted 2 lines · Magnus Damm
Select smc91x bus width using platform data for se7722 now when the smc91x header file is in place.
Quoted 1 line · Magnus Damm
Fix sh7705 interrupt sources for vectors
0xc80and0xca0.
Quoted 1 line · Magnus Damm
Do like everyone else and have a struct resource for kernel bss.
Quoted 2 lines · Magnus Damm
Add physical memory resources such as System RAM, Kernel code/data/bss and reserved crash dump area to
/proc/iomem. Same strategy as on x86.
Quoted 1 line · Magnus Damm
Use
sci_out()instead ofctrl_outw()for early printk setup code.
Quoted 2 lines · Magnus Damm
Drain by waiting for all characters to be sent, and make sure to wait a little bit after setting up the baud rate.
Quoted 1 line · Magnus Damm
Reset the transmitter and receiver when setting up early printk.
Quoted 2 lines · Magnus Damm
Improve sh7722 support for SCIF1 and SCIF2 and separate code from sh7366 implementation.
Quoted 2 lines · Magnus Damm
The sh7722 serial ports all lack SCSPTR registers, so mark them as nonexistent in the register table.
Quoted 1 line · Magnus Damm
Only write to hardware in
SCI_OUT()if the register size is valid.
Quoted 3 lines · Magnus Damm
This patch unifies the sh3 external irq pin code. It buys us some savings with reduced code redundancy, but the main feature with this change is irq sense selection support for all sh3 processors.
Quoted 3 lines · Magnus Damm
This patch adds interrupt acknowledge code for external interrupt sources on sh3 processors. Only really required for edge triggered interrupts, but we ack regardless of sense configuration.
Quoted 4 lines · Magnus Damm
Clean up the intc tables by removing unneeded #ifdefs. The vector list is what selects which interrupt sources that should be added, having unsupported bitfields listed is ok as long as the vector is excluded from the list.
Quoted 3 lines · Magnus Damm
The processor models sh7706, sh7707 and sh7709 don't support high level trigger sense configuration. And the intc code looks like crap these days so what's the difference.
Quoted 2 lines · Magnus Damm
Make sure register modifications stay atomic. Fixes processors with shared priority register masking. Dual bitmap masking is unaffected.
All applied, thanks.