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Move definition of container_of() to common.h

PATCH New Haavard Skinnemoen 5 participants 20 messages May 16, 2008 – Jun 5, 2008

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#0 lore raw

PATCH 1/6 Move definition of container_of() to common.h

AVR32 and AT91SAM9 both have their own identical definitions of container_of() taken from the Linux kernel. Move it to common.h so that all architectures can use it.

container_of() is already used by some drivers, and will be used extensively by the new and improved SPI API.

---
 include/asm-arm/arch-at91sam9/hardware.h |   11 -----------
 include/asm-avr32/u-boot.h               |   11 -----------
 include/common.h                         |   11 +++++++++++
 3 files changed, 11 insertions(+), 22 deletions(-)
include/asm-arm/arch-at91sam9/hardware.h +0 -11
index d2fe453..fba3908 100644
@@ -42,15 +42,4 @@
 #error "Unsupported AT91 processor"
 #endif
 
-/*
- * container_of - cast a member of a structure out to the containing structure
- *
- * @ptr:	the pointer to the member.
- * @type:	the type of the container struct this is embedded in.
- * @member:	the name of the member within the struct.
- */
-#define container_of(ptr, type, member) ({			\
-	const typeof(((type *)0)->member) *__mptr = (ptr);	\
-	(type *)((char *)__mptr - offsetof(type, member)); })
-
 #endif
include/asm-avr32/u-boot.h +0 -11
index 71dfcaf..85ef008 100644
@@ -42,15 +42,4 @@ typedef struct bd_info {
 #define bi_memstart bi_dram[0].start
 #define bi_memsize bi_dram[0].size
 
-/**
- *  container_of - cast a member of a structure out to the containing structure
- *
- *    @ptr:        the pointer to the member.
- *    @type:       the type of the container struct this is embedded in.
- *    @member:     the name of the member within the struct.
- */
-#define container_of(ptr, type, member) ({                      \
-	const typeof( ((type *)0)->member ) *__mptr = (ptr);    \
-	(type *)( (char *)__mptr - offsetof(type,member) );})
-
 #endif /* __ASM_U_BOOT_H__ */
include/common.h +11 -0
index d0f5704..26e1b46 100644
@@ -176,6 +176,17 @@ typedef void (interrupt_handler_t)(void *);
 		(__x > __y) ? __x : __y; })
 
 
+/**
+ * container_of - cast a member of a structure out to the containing structure
+ * @ptr:	the pointer to the member.
+ * @type:	the type of the container struct this is embedded in.
+ * @member:	the name of the member within the struct.
+ *
+ */
+#define container_of(ptr, type, member) ({			\
+	const typeof( ((type *)0)->member ) *__mptr = (ptr);	\
+	(type *)( (char *)__mptr - offsetof(type,member) );})
+
 /*
  * Function Prototypes
  */
Signature · 1 line
1.5.4.3
#1 lore raw

PATCH 2/6 SPI API improvements

From: Haavard Skinnemoen <[email protected]>

This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible.

Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks:
* spi_cs_activate(): Activates the chipselect for a given slave
* spi_cs_deactivate(): Deactivates the chipselect for a given slave
* spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated.

Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.)

To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this.

Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware.

spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future.

This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection.

I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API.

But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why?

Changed in v4:
- Build fixes for various boards, drivers and commands
- Provide common struct spi_slave definition that can be extended by drivers
- Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
- Make default bus and mode build-time configurable
- Override default SPI bus ID and mode on mx32ads and imx31_litekit.

Changed in v3:
- Add opaque struct spi_slave for controller-specific data associated with a slave.
- Add spi_claim_bus() and spi_release_bus()
- Add spi_free_slave()
- spi_setup() is now called spi_setup_slave() and returns a struct spi_slave
- soft_spi now supports four SPI modes (CPOL|CPHA)
- Add bus parameter to spi_setup_slave()
- Convert the new i.MX32 SPI driver
- Convert the new MC13783 RTC driver

Changed in v2:
- Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API.

---
 board/amcc/taihu/taihu.c                  |   16 ++-
 board/freescale/mpc8349emds/mpc8349emds.c |   25 +++---
 board/sacsng/sacsng.c                     |   35 +++----
 board/ssv/adnpesc1/adnpesc1.c             |   27 +++---
 common/cmd_df.c                           |   37 +++++++
 common/cmd_spi.c                          |   42 +++++----
 common/soft_spi.c                         |  124 ++++++++++++++++++------
 cpu/nios/spi.c                            |   79 +++++++++++----
 drivers/rtc/ds1306.c                      |   67 ++++++++++----
 drivers/rtc/mc13783-rtc.c                 |   43 +++++++-
 drivers/spi/mpc8xxx_spi.c                 |   54 +++++++++--
 drivers/spi/mxc_spi.c                     |   88 +++++++++++------
 include/configs/imx31_litekit.h           |    3 +-
 include/configs/mx31ads.h                 |    3 +-
 include/spi.h                             |  150 ++++++++++++++++++++++++-----
 15 files changed, 584 insertions(+), 209 deletions(-)
 create mode 100644 common/cmd_df.c
board/amcc/taihu/taihu.c +10 -6
index eedde59..891b4d9 100644
@@ -165,16 +165,20 @@ unsigned char spi_read(void)
 	return (unsigned char)gpio_read_in_bit(SPI_DIN_GPIO15);
 }
 
-void taihu_spi_chipsel(int cs)
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
 {
-	gpio_write_bit(SPI_CS_GPIO0, cs);
+	return bus == 0 && cs == 0;
 }
 
-spi_chipsel_type spi_chipsel[]= {
-	taihu_spi_chipsel
-};
+void spi_cs_activate(struct spi_slave *slave)
+{
+	gpio_write_bit(SPI_CS_GPIO0, 1);
+}
 
-int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+	gpio_write_bit(SPI_CS_GPIO0, 0);
+}
 
 #ifdef CONFIG_PCI
 static unsigned char int_lines[32] = {
board/freescale/mpc8349emds/mpc8349emds.c +12 -13
index 6c82596..e18e68e 100644
@@ -257,25 +257,24 @@ void sdram_init(void)
 
 #define SPI_CS_MASK	0x80000000
 
-void spi_eeprom_chipsel(int cs)
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+	return bus == 0 && cs == 0;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
 {
 	volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0];
 
-	if (cs)
-		iopd->dat &= ~SPI_CS_MASK;
-	else
-		iopd->dat |=  SPI_CS_MASK;
+	iopd->dat &= ~SPI_CS_MASK;
 }
 
-/*
- * The SPI command uses this table of functions for controlling the SPI
- * chip selects.
- */
-spi_chipsel_type spi_chipsel[] = {
-	spi_eeprom_chipsel,
-};
-int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+	volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0];
 
+	iopd->dat |=  SPI_CS_MASK;
+}
 #endif /* CONFIG_HARD_SPI */
 
 #if defined(CONFIG_OF_BOARD_SETUP)
board/sacsng/sacsng.c +14 -21
index 25209e0..e85a0fc 100644
@@ -842,37 +842,30 @@ void show_boot_progress (int status)
 #define SPI_ADC_CS_MASK	0x00000800
 #define SPI_DAC_CS_MASK	0x00001000
 
-void spi_adc_chipsel(int cs)
+static const u32 cs_mask[] = {
+    SPI_ADC_CS_MASK,
+    SPI_DAC_CS_MASK,
+};
+
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+    return bus == 0 && cs < sizeof(cs_mask) / sizeof(cs_mask[0]);
+}
+
+void spi_cs_activate(struct spi_slave *slave)
 {
     volatile ioport_t *iopd = ioport_addr((immap_t *)CFG_IMMR, 3 /* port D */);
 
-    if(cs)
-	iopd->pdat &= ~SPI_ADC_CS_MASK;	/* activate the chip select */
-    else
-	iopd->pdat |=  SPI_ADC_CS_MASK;	/* deactivate the chip select */
+    iopd->pdat &= ~cs_mask[slave->cs];
 }
 
-void spi_dac_chipsel(int cs)
+void spi_cs_deactivate(struct spi_slave *slave)
 {
     volatile ioport_t *iopd = ioport_addr((immap_t *)CFG_IMMR, 3 /* port D */);
 
-    if(cs)
-	iopd->pdat &= ~SPI_DAC_CS_MASK;	/* activate the chip select */
-    else
-	iopd->pdat |=  SPI_DAC_CS_MASK;	/* deactivate the chip select */
+    iopd->pdat |= cs_mask[slave->cs];
 }
 
-/*
- * The SPI command uses this table of functions for controlling the SPI
- * chip selects: it calls the appropriate function to control the SPI
- * chip selects.
- */
-spi_chipsel_type spi_chipsel[] = {
-	spi_adc_chipsel,
-	spi_dac_chipsel
-};
-int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
-
 #endif
 
 #endif /* CONFIG_MISC_INIT_R */
board/ssv/adnpesc1/adnpesc1.c +13 -14
index 2ec3a72..3ee8ba5 100644
@@ -69,25 +69,24 @@ long int initdram (int board_type)
 
 #define	SPI_RTC_CS_MASK	0x00000001
 
-void spi_rtc_chipsel(int cs)
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+	return bus == 0 && cs == 0;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
 {
 	nios_spi_t *spi = (nios_spi_t *)CFG_NIOS_SPIBASE;
 
-	if (cs)
-		spi->slaveselect = SPI_RTC_CS_MASK;	/* activate (1) */
-	else
-		spi->slaveselect = 0;			/* deactivate (0) */
+	spi->slaveselect = SPI_RTC_CS_MASK;	/* activate (1) */
 }
 
-/*
- * The SPI command uses this table of functions for controlling the SPI
- * chip selects: it calls the appropriate function to control the SPI
- * chip selects.
- */
-spi_chipsel_type spi_chipsel[] = {
-	spi_rtc_chipsel
-};
-int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+	nios_spi_t *spi = (nios_spi_t *)CFG_NIOS_SPIBASE;
+
+	spi->slaveselect = 0;			/* deactivate (0) */
+}
 
 #endif
 
common/cmd_df.c new file +37 -0
new file mode 100644
index 0000000..5f65044
@@ -0,0 +1,37 @@
+/*
+ * Command for accessing DataFlash.
+ *
+ * Copyright (C) 2008 Atmel Corporation
+ */
+#include <common.h>
+#include <df.h>
+
+static int do_df(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	const char *cmd;
+
+	/* need at least two arguments */
+	if (argc < 2)
+		goto usage;
+
+	cmd = argv[1];
+
+	if (strcmp(cmd, "init") == 0) {
+		df_init(0, 0, 1000000);
+		return 0;
+	}
+
+	if (strcmp(cmd, "info") == 0) {
+		df_show_info();
+		return 0;
+	}
+
+usage:
+	printf("Usage:\n%s\n", cmdtp->usage);
+	return 1;
+}
+
+U_BOOT_CMD(
+	sf,	2,	1,	do_serial_flash,
+	"sf	- Serial flash sub-system\n",
+	"probe [bus:]cs		- init flash device on given SPI bus and CS\n")
common/cmd_spi.c +25 -17

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common/soft_spi.c +93 -31

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cpu/nios/spi.c +58 -21

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drivers/rtc/ds1306.c +50 -17

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drivers/rtc/mc13783-rtc.c +37 -6

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drivers/spi/mpc8xxx_spi.c +47 -7

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drivers/spi/mxc_spi.c +57 -31

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include/configs/imx31_litekit.h +2 -1
index 4281d73..ec4ed1e 100644
@@ -65,7 +65,8 @@
 
 #define CONFIG_HARD_SPI		1
 #define CONFIG_MXC_SPI		1
-#define CONFIG_MXC_SPI_IFACE	1
+#define CONFIG_DEFAULT_SPI_BUS	1
+#define CONFIG_DEFAULT_SPI_MODE	(SPI_MODE_2 | SPI_CS_HIGH)
 
 #define CONFIG_RTC_MC13783	1
 
include/configs/mx31ads.h +2 -1
index 2ea48a6..37ba872 100644
@@ -62,7 +62,8 @@
 
 #define CONFIG_HARD_SPI		1
 #define CONFIG_MXC_SPI		1
-#define CONFIG_MXC_SPI_IFACE	1	/* Default SPI interface number */
+#define CONFIG_DEFAULT_SPI_BUS	1
+#define CONFIG_DEFAULT_SPI_MODE	(SPI_MODE_2 | SPI_CS_HIGH)
 
 #define CONFIG_RTC_MC13783	1
 
include/spi.h +127 -23

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Signature · 1 line
1.5.4.3
#2 lore raw

PATCH 3/6 atmel_spi: Driver for the Atmel SPI controller

From: Hans-Christian Egtvedt <[email protected]>

This adds a driver for the SPI controller found on most AT91 and AVR32 chips, implementing the new SPI API.

Changed in v4:
- Update to new API
- Handle zero-length transfers appropriately. The user may send a zero-length SPI transfer with SPI_XFER_END set in order to deactivate the chip select after a series of transfers with chip select active. This is useful e.g. when polling the status register of DataFlash.

---
 cpu/at32ap/at32ap700x/gpio.c                      |   43 +++++
 drivers/spi/Makefile                              |    1 +
 drivers/spi/atmel_spi.c                           |  210 +++++++++++++++++++++
 drivers/spi/atmel_spi.h                           |   95 +++++++++
 include/asm-avr32/arch-at32ap700x/chip-features.h |    1 +
 include/asm-avr32/arch-at32ap700x/clk.h           |    6 +
 include/asm-avr32/arch-at32ap700x/gpio.h          |    4 +
 7 files changed, 360 insertions(+), 0 deletions(-)
 create mode 100644 drivers/spi/atmel_spi.c
 create mode 100644 drivers/spi/atmel_spi.h
cpu/at32ap/at32ap700x/gpio.c +43 -0
index 859124a..3da35d4 100644
@@ -21,8 +21,11 @@
  */
 #include <common.h>
 
+#include <asm/io.h>
+
 #include <asm/arch/chip-features.h>
 #include <asm/arch/gpio.h>
+#include <asm/arch/memory-map.h>
 
 /*
  * Lots of small functions here. We depend on --gc-sections getting
@@ -142,3 +145,43 @@ void gpio_enable_mmci(void)
 	gpio_select_periph_A(GPIO_PIN_PA15, 0);	/* DATA3 */
 }
 #endif
+
+#ifdef AT32AP700x_CHIP_HAS_SPI
+void gpio_enable_spi0(unsigned long cs_mask)
+{
+	u32 pa_mask = 0;
+
+	gpio_select_periph_A(GPIO_PIN_PA0,  0);	/* MISO	*/
+	gpio_select_periph_A(GPIO_PIN_PA1,  0);	/* MOSI	*/
+	gpio_select_periph_A(GPIO_PIN_PA2,  0);	/* SCK	*/
+
+	if (cs_mask & (1 << 0))
+		pa_mask |= 1 << 3;	/* NPCS0 */
+	if (cs_mask & (1 << 1))
+		pa_mask |= 1 << 4;	/* NPCS1 */
+	if (cs_mask & (1 << 2))
+		pa_mask |= 1 << 5;	/* NPCS2 */
+	if (cs_mask & (1 << 3))
+		pa_mask |= 1 << 20;	/* NPCS3 */
+
+	__raw_writel(pa_mask, PIOA_BASE + 0x00);
+	__raw_writel(pa_mask, PIOA_BASE + 0x30);
+	__raw_writel(pa_mask, PIOA_BASE + 0x10);
+}
+
+void gpio_enable_spi1(unsigned long cs_mask)
+{
+	gpio_select_periph_B(GPIO_PIN_PA0,  0);	/* MISO	*/
+	gpio_select_periph_B(GPIO_PIN_PB1,  0);	/* MOSI	*/
+	gpio_select_periph_B(GPIO_PIN_PB5,  0);	/* SCK	*/
+
+	if (cs_mask & (1 << 0))
+		gpio_select_periph_B(GPIO_PIN_PB2,  0);	/* NPCS0 */
+	if (cs_mask & (1 << 1))
+		gpio_select_periph_B(GPIO_PIN_PB3,  0);	/* NPCS1 */
+	if (cs_mask & (1 << 2))
+		gpio_select_periph_B(GPIO_PIN_PB4,  0);	/* NPCS2 */
+	if (cs_mask & (1 << 3))
+		gpio_select_periph_A(GPIO_PIN_PA27, 0);	/* NPCS3 */
+}
+#endif
drivers/spi/Makefile +1 -0
index bc8a104..e66e0ee 100644
@@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk
 LIB	:= $(obj)libspi.a
 
 COBJS-y += mpc8xxx_spi.o
+COBJS-$(CONFIG_ATMEL_SPI) += atmel_spi.o
 COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o
 
 COBJS	:= $(COBJS-y)
drivers/spi/atmel_spi.c new file +210 -0

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drivers/spi/atmel_spi.h new file +95 -0

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include/asm-avr32/arch-at32ap700x/chip-features.h +1 -0
index 29b1fd6..c47107e 100644
@@ -25,6 +25,7 @@
 /* Currently, all the AP700x chips have these */
 #define AT32AP700x_CHIP_HAS_USART
 #define AT32AP700x_CHIP_HAS_MMCI
+#define AT32AP700x_CHIP_HAS_SPI
 
 /* Only AP7000 has ethernet interface */
 #ifdef CONFIG_AT32AP7000
include/asm-avr32/arch-at32ap700x/clk.h +6 -0
index 385319a..bd6f2e5 100644
@@ -74,6 +74,12 @@ static inline unsigned long get_mci_clk_rate(void)
 	return get_pbb_clk_rate();
 }
 #endif
+#ifdef AT32AP700x_CHIP_HAS_SPI
+static inline unsigned long get_spi_clk_rate(unsigned int dev_id)
+{
+	return get_pba_clk_rate();
+}
+#endif
 
 /* Board code may need the SDRAM base clock as a compile-time constant */
 #define SDRAMC_BUS_HZ	(MAIN_CLK_RATE >> CFG_CLKDIV_HSB)
include/asm-avr32/arch-at32ap700x/gpio.h +4 -0
index b10a3e4..ef20cea 100644
@@ -216,5 +216,9 @@ void gpio_enable_macb1(void);
 #ifdef AT32AP700x_CHIP_HAS_MMCI
 void gpio_enable_mmci(void);
 #endif
+#ifdef AT32AP700x_CHIP_HAS_SPI
+void gpio_enable_spi0(unsigned long cs_mask);
+void gpio_enable_spi1(unsigned long cs_mask);
+#endif
 
 #endif /* __ASM_AVR32_ARCH_GPIO_H__ */
Signature · 1 line
1.5.4.3
#3 lore raw

PATCH 4/6 SPI Flash subsystem

This adds a new SPI flash subsystem.

Currently, only AT45 DataFlash in non-power-of-two mode is supported, but some preliminary support for other flash types is in place as well.

---
 Makefile                             |    2 +
 drivers/mtd/spi/Makefile             |   47 +++++
 drivers/mtd/spi/atmel.c              |  362 ++++++++++++++++++++++++++++++++++
 drivers/mtd/spi/spi_flash.c          |  162 +++++++++++++++
 drivers/mtd/spi/spi_flash_internal.h |   45 +++++
 include/spi_flash.h                  |   70 +++++++
 6 files changed, 688 insertions(+), 0 deletions(-)
 create mode 100644 drivers/mtd/spi/Makefile
 create mode 100644 drivers/mtd/spi/atmel.c
 create mode 100644 drivers/mtd/spi/spi_flash.c
 create mode 100644 drivers/mtd/spi/spi_flash_internal.h
 create mode 100644 include/spi_flash.h
Makefile +2 -0
index 6548f8e..c09d8f9 100644
@@ -224,6 +224,7 @@ LIBS += drivers/mtd/libmtd.a
 LIBS += drivers/mtd/nand/libnand.a
 LIBS += drivers/mtd/nand_legacy/libnand_legacy.a
 LIBS += drivers/mtd/onenand/libonenand.a
+LIBS += drivers/mtd/spi/libspi_flash.a
 LIBS += drivers/net/libnet.a
 LIBS += drivers/net/sk98lin/libsk98lin.a
 LIBS += drivers/pci/libpci.a
@@ -390,6 +391,7 @@ TAG_SUBDIRS += drivers/mtd
 TAG_SUBDIRS += drivers/mtd/nand
 TAG_SUBDIRS += drivers/mtd/nand_legacy
 TAG_SUBDIRS += drivers/mtd/onenand
+TAG_SUBDIRS += drivers/mtd/spi
 TAG_SUBDIRS += drivers/net
 TAG_SUBDIRS += drivers/net/sk98lin
 TAG_SUBDIRS += drivers/pci
drivers/mtd/spi/Makefile new file +47 -0

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drivers/mtd/spi/atmel.c new file +362 -0

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drivers/mtd/spi/spi_flash.c new file +162 -0

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drivers/mtd/spi/spi_flash_internal.h new file +45 -0

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include/spi_flash.h new file +70 -0

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Signature · 1 line
1.5.4.3
#4 lore raw

PATCH 5/6 SPI Flash: Add "sf" command

This adds a new command, "sf" which can be used to manipulate SPI flash. Currently, initialization, reading, writing and erasing is supported.

---
 common/Makefile |    1 +
 common/cmd_sf.c |  191 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 192 insertions(+), 0 deletions(-)
 create mode 100644 common/cmd_sf.c
common/Makefile +1 -0
index 9678799..d90b5f2 100644
@@ -143,6 +143,7 @@ COBJS-y += xyzModem.o
 COBJS-y += cmd_mac.o
 COBJS-$(CONFIG_CMD_MFSL) += cmd_mfsl.o
 COBJS-$(CONFIG_MP) += cmd_mp.o
+COBJS-$(CONFIG_CMD_SF) += cmd_sf.o
 
 COBJS	:= $(COBJS-y)
 SRCS	:= $(AOBJS:.o=.S) $(COBJS:.o=.c)
common/cmd_sf.c new file +191 -0

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Signature · 1 line
1.5.4.3
#5 lore raw

PATCH 6/6 Add support for environment in SPI flash

This is pretty incomplete...it doesn't handle reading the environment before relocation, it doesn't support redundant environment, and it doesn't support embedded environment. But apart from that, it does seem to work.

---
 common/Makefile     |    1 +
 common/cmd_nvedit.c |    3 +-
 common/env_common.c |    3 +-
 common/env_sf.c     |  131 +++++++++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 136 insertions(+), 2 deletions(-)
 create mode 100644 common/env_sf.c
common/Makefile +1 -0
index d90b5f2..b425795 100644
@@ -113,6 +113,7 @@ COBJS-y += env_dataflash.o
 COBJS-y += env_flash.o
 COBJS-y += env_eeprom.o
 COBJS-y += env_onenand.o
+COBJS-y += env_sf.o
 COBJS-y += env_nvram.o
 COBJS-y += env_nowhere.o
 COBJS-y += exports.o
common/cmd_nvedit.c +2 -1
index 9c5d1fc..49f134a 100644
@@ -58,8 +58,9 @@ DECLARE_GLOBAL_DATA_PTR;
     !defined(CFG_ENV_IS_IN_DATAFLASH)	&& \
     !defined(CFG_ENV_IS_IN_NAND)	&& \
     !defined(CFG_ENV_IS_IN_ONENAND)	&& \
+    !defined(CFG_ENV_IS_IN_SPI_FLASH)	&& \
     !defined(CFG_ENV_IS_NOWHERE)
-# error Define one of CFG_ENV_IS_IN_{NVRAM|EEPROM|FLASH|DATAFLASH|ONENAND|NOWHERE}
+# error Define one of CFG_ENV_IS_IN_{NVRAM|EEPROM|FLASH|DATAFLASH|ONENAND|SPI_FLASH|NOWHERE}
 #endif
 
 #define XMK_STR(x)	#x
common/env_common.c +2 -1
index a494812..e6df9a5 100644
@@ -134,7 +134,8 @@ uchar default_environment[] = {
 	"\0"
 };
 
-#if defined(CFG_ENV_IS_IN_NAND)		/* Environment is in Nand Flash */
+#if defined(CFG_ENV_IS_IN_NAND)		/* Environment is in Nand Flash */ \
+	|| defined(CFG_ENV_IS_IN_SPI_FLASH)
 int default_environment_size = sizeof(default_environment);
 #endif
 
common/env_sf.c new file +131 -0

131 lines not on this page · raw message

Signature · 1 line
1.5.4.3
#6 lore raw

PATCH 6/6 Add support for environment in SPI flash

Quoted 4 lines · In message <[email protected]> you…

This is pretty incomplete...it doesn't handle reading the environment before relocation, it doesn't support redundant environment, and it doesn't support embedded environment. But apart from that, it does seem to work.

I suppose more patches to add the missing features will follow soon ?

Quoted 8 lines
---
 common/Makefile     |    1 +
 common/cmd_nvedit.c |    3 +-
 common/env_common.c |    3 +-
 common/env_sf.c     |  131 +++++++++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 136 insertions(+), 2 deletions(-)
 create mode 100644 common/env_sf.c

Applied, thanks.

Best regards,

Wolfgang Denk

Signature · 6 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
The joys of love made her human and the  agonies  of  love  destroyed
her.
	-- Spock, "Requiem for Methuselah", stardate 5842.8
#7 lore raw

PATCH 6/6 Add support for environment in SPI flash

Quoted 7 lines · Wolfgang Denk
Quoted 4 lines · In message <[email protected]> you…

This is pretty incomplete...it doesn't handle reading the environment before relocation, it doesn't support redundant environment, and it doesn't support embedded environment. But apart from that, it does seem to work.

I suppose more patches to add the missing features will follow soon ?

Yeah...I didn't actually expect you to apply it, hence the RFC. But now that it's in, I guess I should put in some effort to make it more complete.

As for reading the environment before relocation, I don't really know how to do it without using writeable RAM. env_nand does not support this either -- it depends on embedded environment.

Haavard

#8 lore raw

PATCH 5/6 SPI Flash: Add "sf" command

In reply to Haavard Skinnemoen
Quoted 10 lines · In message <[email protected]> you…

This adds a new command, "sf" which can be used to manipulate SPI flash. Currently, initialization, reading, writing and erasing is supported.

---
 common/Makefile |    1 +
 common/cmd_sf.c |  191 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 192 insertions(+), 0 deletions(-)
 create mode 100644 common/cmd_sf.c

Applied, thanks.

Best regards,

Wolfgang Denk

Signature · 6 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"The whole problem with the world is  that  fools  and  fanatics  are
always so certain of themselves, but wiser people so full of doubts."
- Bertrand Russell
#9 lore raw

PATCH 4/6 SPI Flash subsystem

In reply to Haavard Skinnemoen
Quoted 7 lines · In message <[email protected]> you…

This adds a new SPI flash subsystem.

Currently, only AT45 DataFlash in non-power-of-two mode is supported, but some preliminary support for other flash types is in place as well.

Quoted 13 lines
---
 Makefile                             |    2 +
 drivers/mtd/spi/Makefile             |   47 +++++
 drivers/mtd/spi/atmel.c              |  362 ++++++++++++++++++++++++++++++++++
 drivers/mtd/spi/spi_flash.c          |  162 +++++++++++++++
 drivers/mtd/spi/spi_flash_internal.h |   45 +++++
 include/spi_flash.h                  |   70 +++++++
 6 files changed, 688 insertions(+), 0 deletions(-)
 create mode 100644 drivers/mtd/spi/Makefile
 create mode 100644 drivers/mtd/spi/atmel.c
 create mode 100644 drivers/mtd/spi/spi_flash.c
 create mode 100644 drivers/mtd/spi/spi_flash_internal.h
 create mode 100644 include/spi_flash.h

Applied, thanks.

Best regards,

Wolfgang Denk

Signature · 7 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
The management question ... is not _whether_ to build a pilot  system
and  throw  it away. You _will_ do that. The only question is whether
to plan in advance to build a throwaway, or to promise to deliver the
throwaway to customers.       - Fred Brooks, "The Mythical Man Month"
#10 lore raw

PATCH 3/6 atmel_spi: Driver for the Atmel SPI controller

In reply to Haavard Skinnemoen
Quoted 14 lines · In message <[email protected]> you…

From: Hans-Christian Egtvedt <[email protected]>

This adds a driver for the SPI controller found on most AT91 and AVR32 chips, implementing the new SPI API.

Changed in v4:
- Update to new API
- Handle zero-length transfers appropriately. The user may send a zero-length SPI transfer with SPI_XFER_END set in order to deactivate the chip select after a series of transfers with chip select active. This is useful e.g. when polling the status register of DataFlash.

Quoted 11 lines
---
 cpu/at32ap/at32ap700x/gpio.c                      |   43 +++++
 drivers/spi/Makefile                              |    1 +
 drivers/spi/atmel_spi.c                           |  210 +++++++++++++++++++++
 drivers/spi/atmel_spi.h                           |   95 +++++++++
 include/asm-avr32/arch-at32ap700x/chip-features.h |    1 +
 include/asm-avr32/arch-at32ap700x/clk.h           |    6 +
 include/asm-avr32/arch-at32ap700x/gpio.h          |    4 +
 7 files changed, 360 insertions(+), 0 deletions(-)
 create mode 100644 drivers/spi/atmel_spi.c
 create mode 100644 drivers/spi/atmel_spi.h

Applied, thanks.

Best regards,

Wolfgang Denk

Signature · 6 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
This all sounds complicated, but it mostly does excatly what you  ex-
pect. It's just difficult for us to explain what you expect...
                       - L. Wall & R. L. Schwartz, _Programming Perl_
#11 lore raw

PATCH 2/6 SPI API improvements

In reply to Haavard Skinnemoen
Quoted 4 lines · Haavard Skinnemoen

From: Haavard Skinnemoen <[email protected]>

This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible.

Ok, this looks good to me now. And it works too. Just one question:

Quoted 39 lines
drivers/rtc/mc13783-rtc.c +14 -3
index 35b1b8b..b6e1501 100644
@@ -24,34 +24,50 @@
 #include <rtc.h>
 #include <spi.h>
 
+static struct spi_slave *slave;
+
 int rtc_get(struct rtc_time *rtc)
 {
 	u32 day1, day2, time;
 	u32 reg;
 	int err, tim, i = 0;
 
-	spi_select(1, 0, SPI_MODE_2 | SPI_CS_HIGH);
+	if (!slave) {
+		/* FIXME: Verify the max SCK rate */
+		slave = spi_setup_slave(1, 0, 1000000,
+				SPI_MODE_2 | SPI_CS_HIGH);
+		if (!slave)
+			return -1;
+	}
+
+	if (spi_claim_bus(slave))
+		return -1;
 
 	do {
 		reg = 0x2c000000;
-		err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day1);
+		err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day1,
+				SPI_XFER_BEGIN | SPI_XFER_END);
 
 		if (err)
 			return err;
 
 		reg = 0x28000000;
-		err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&time);

drivers/rtc/mc13783-rtc.c line 63

Quoted 10 lines
drivers/rtc/mc13783-rtc.c +4 -1
+		err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&time,
+				SPI_XFER_BEGIN | SPI_XFER_END);
 
 		if (err)
 			return err;
 
 		reg = 0x2c000000;
-		err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day2);
+		err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day2,
+				SPI_XFER_BEGIN | SPI_XFER_END);

Here... We perform 3 transfers on SPI one after another, and every time we do "SPI_XFER_BEGIN | SPI_XFER_EN"... Doesn't this defeat the whole purpose of these flags? Would it be bad, if we did

Quoted 12 lines
drivers/rtc/mc13783-rtc.c +3 -6
 		reg = 0x2c000000;
-		err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day1);
+		err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day1,
+				SPI_XFER_BEGIN);
- 
- 		if (err)
- 			return err;
 
 		reg = 0x28000000;
-		err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&time);
+		err |= spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&time, 0);
- 

drivers/rtc/mc13783-rtc.c line 66

Quoted 10 lines
drivers/rtc/mc13783-rtc.c +2 -3
- 		if (err)
- 			return err;
 
 		reg = 0x2c000000;
-		err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day2);
+		err |= spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day2,
+				SPI_XFER_END);
 
 		if (err)
 			return err;

? The worst that can happen with this, is that the first or the second transfer return an error, and we go on with one or two more transfers instead of aborting immediately. Can this have any negative effects?

Quoted 24 lines
drivers/rtc/mc13783-rtc.c +13 -1
@@ -65,16 +81,31 @@ void rtc_set(struct rtc_time *rtc)
 {
 	u32 time, day, reg;
 
+	if (!slave) {
+		/* FIXME: Verify the max SCK rate */
+		slave = spi_setup_slave(1, 0, 1000000,
+				SPI_MODE_2 | SPI_CS_HIGH);
+		if (!slave)
+			return;
+	}
+
 	time = mktime(rtc->tm_year, rtc->tm_mon, rtc->tm_mday,
 		      rtc->tm_hour, rtc->tm_min, rtc->tm_sec);
 	day = time / 86400;
 	time %= 86400;
 
+	if (spi_claim_bus(slave))
+		return;
+
 	reg = 0x2c000000 | day | 0x80000000;
-	spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day);
+	spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day,
+			SPI_XFER_BEGIN | SPI_XFER_END);

drivers/rtc/mc13783-rtc.c void rtc_set(struct rtc_time *rtc) · line 111

Quoted 10 lines
drivers/rtc/mc13783-rtc.c +4 -1
 
 	reg = 0x28000000 | time | 0x80000000;
-	spi_xfer(0, 32, (uchar *)&reg, (uchar *)&time);
+	spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&time,
+			SPI_XFER_BEGIN | SPI_XFER_END);
+
+	spi_release_bus(slave);
 }
 
 void rtc_reset(void)

Here error is not checked at all... So, it should be no problem doing only SPI_XFER_BEGIN in the first xfer and only SPI_XFER_END in the second one.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de

#12 lore raw

PATCH 2/6 SPI API improvements

Quoted 8 lines · On Fri, 16 May 2008 12:41:04 +0200 (CEST) Guennadi Liakhovetski <[email protected]>…
Quoted 4 lines · Haavard Skinnemoen

From: Haavard Skinnemoen <[email protected]>

This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible.

Ok, this looks good to me now. And it works too. Just one question:

Great!

Quoted 17 lines
Quoted 17 lines
drivers/rtc/mc13783-rtc.c +4 -2
 	do {
 		reg = 0x2c000000;
-		err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day1);
+		err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day1,
+				SPI_XFER_BEGIN | SPI_XFER_END);
 
 		if (err)
 			return err;
 
 		reg = 0x28000000;
-		err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&time);
+		err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&time,
+				SPI_XFER_BEGIN | SPI_XFER_END);
 
 		if (err)
 			return err;
Quoted 8 lines

drivers/rtc/mc13783-rtc.c line 63

Quoted 4 lines
drivers/rtc/mc13783-rtc.c +2 -1
 		reg = 0x2c000000;
-		err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day2);
+		err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day2,
+				SPI_XFER_BEGIN | SPI_XFER_END);

Here... We perform 3 transfers on SPI one after another, and every time we do "SPI_XFER_BEGIN | SPI_XFER_EN"... Doesn't this defeat the whole purpose of these flags? Would it be bad, if we did

Well, no, I wouldn't say it defeats the purpose of these flags...

Quoted 20 lines
Quoted 20 lines
(quoted diff) +5 -9
 		reg = 0x2c000000;
-		err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day1);
+		err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day1,
+				SPI_XFER_BEGIN);
- 
- 		if (err)
- 			return err;
 
 		reg = 0x28000000;
-		err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&time);
+		err |= spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&time, 0);
- 
- 		if (err)
- 			return err;
 
 		reg = 0x2c000000;
-		err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day2);
+		err |= spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day2,
+				SPI_XFER_END);
Quoted 6 lines

Review

Quoted 2 lines
(quoted diff) +0 -0
 		if (err)
 			return err;

? The worst that can happen with this, is that the first or the second transfer return an error, and we go on with one or two more transfers instead of aborting immediately. Can this have any negative effects?

While I don't know the RTC in question well enough to say for sure, there's a very real possibility that your suggestion simply won't work.

The purpose of the spi_xfer flags parameter isn't to gang together multiple transfers -- it's to allow more precise chip select control so that you can split a transfer into multiple spi_xfer() calls. This is useful for devices where you typically start with a command, possibly with a few bytes of parameters, then transfer data without releasing the chip select in between.

The SPI flash driver posted later in this thread does this -- it first sends a command along with any address bytes, and then starts the actual data transfer with the buffer provided by the caller. The chip select must stay active during the whole sequence, so without this tweak, it would have to copy everything into a temporary buffer first.

If you try to combine multiple transfers into one like you did above, the chip select will stay active all the time. And many devices expect the chip select to go inactive after each command, and may simply ignore all but the first or last if it stays active.

It could be that your solution works, but I wanted to mimic the existing behaviour as closely as possible. And I definitely don't want to "optimize" chip select control without knowing the device in question very well.

Quoted 13 lines
Quoted 13 lines
drivers/rtc/mc13783-rtc.c +6 -2
 	reg = 0x2c000000 | day | 0x80000000;
-	spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day);
+	spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day,
+			SPI_XFER_BEGIN | SPI_XFER_END);
 
 	reg = 0x28000000 | time | 0x80000000;
-	spi_xfer(0, 32, (uchar *)&reg, (uchar *)&time);
+	spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&time,
+			SPI_XFER_BEGIN | SPI_XFER_END);
+
+	spi_release_bus(slave);
 }
Quoted 4 lines
Quoted 1 line

void rtc_reset(void)

Here error is not checked at all... So, it should be no problem doing only SPI_XFER_BEGIN in the first xfer and only SPI_XFER_END in the second one.

No, I don't think that will work, for the reasons mentioned above. There's no error checking because the existing code doesn't check for errors...and there's no way to return an error status from the function anyway.

Btw, there are a few spi_xfer() semantics that I want to be a bit more clearly defined, but I forgot to document it before sending the patch. These are:
* If spi_xfer() fails, it automatically terminates the transfer as if the SPI_XFER_END flag was set.
* If bitlen == 0, spi_xfer() must deactivate CS if the SPI_XFER_END flag is set.
* If dout == NULL, spi_xfer() will transmit unspecified data. Alternatively, we could specify that it must send zeroes.
* If din == NULL, spi_xfer() will ignore any received data.

If people agree that these semantics make sense, we should probably go through the drivers and make sure it's handled appropriately.

Oh, and I want to do something about the "bitlen" parameter, but I don't wanna open that particular can of worms in this patchset :-)

Haavard

#13 lore raw

PATCH 2/6 SPI API improvements

Quoted 6 lines · Haavard Skinnemoen

The purpose of the spi_xfer flags parameter isn't to gang together multiple transfers -- it's to allow more precise chip select control so that you can split a transfer into multiple spi_xfer() calls. This is useful for devices where you typically start with a command, possibly with a few bytes of parameters, then transfer data without releasing the chip select in between.

Ok, understand now. Thanks for the explanation!

(if you want, you can add this to [1/6] too).

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de

#15 lore raw

PATCH 2/6 SPI API improvements

Quoted 1 line · On Sat, 17 May 2008 12:56:00 +0200 Jean-Christophe PLAGNIOL-VILLARD…

You've forget ds1722 and AMD Elan cpu which use SPI too

I don't think so. ds1722 uses some sort of home-grown API which I don't want anything to do with.

Elan seems to be using a different API too...

hskinnemoen at siona:~/work/u-boot/spi$ git grep spi_xfer cpu/i386/ include/asm-i386/ board/sc* hskinnemoen at siona:~/work/u-boot/spi$ git grep -i elan drivers/spi/

Or am I missing something?

Haavard

#16 lore raw

PATCH 2/6 SPI API improvements

In reply to Haavard Skinnemoen

Hi Haavard,

Quoted 66 lines · Haavard Skinnemoen

From: Haavard Skinnemoen <[email protected]>

This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible.

Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks:
* spi_cs_activate(): Activates the chipselect for a given slave
* spi_cs_deactivate(): Deactivates the chipselect for a given slave
* spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated.

Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.)

To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this.

Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware.

spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future.

This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection.

I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API.

But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why?

Changed in v4:
- Build fixes for various boards, drivers and commands
- Provide common struct spi_slave definition that can be extended by drivers
- Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
- Make default bus and mode build-time configurable
- Override default SPI bus ID and mode on mx32ads and imx31_litekit.

Changed in v3:
- Add opaque struct spi_slave for controller-specific data associated with a slave.
- Add spi_claim_bus() and spi_release_bus()
- Add spi_free_slave()
- spi_setup() is now called spi_setup_slave() and returns a struct spi_slave
- soft_spi now supports four SPI modes (CPOL|CPHA)
- Add bus parameter to spi_setup_slave()
- Convert the new i.MX32 SPI driver
- Convert the new MC13783 RTC driver

Quoted 6 lines

Changed in v2:
- Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API.

---

Tested on MPC8349EMDS, works great! Nice work. Sorry for taking so long. I finally have my gear all set up again.

regards,
Ben

#17 lore raw

PATCH 2/6 SPI API improvements

In reply to Haavard Skinnemoen
Quoted 4 lines · In message <[email protected]> you…

From: Haavard Skinnemoen <[email protected]>

This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible.

...

Quoted 11 lines
---
 board/amcc/taihu/taihu.c                  |   16 ++-
 board/freescale/mpc8349emds/mpc8349emds.c |   25 +++---
 board/sacsng/sacsng.c                     |   35 +++----
 board/ssv/adnpesc1/adnpesc1.c             |   27 +++---
 common/cmd_df.c                           |   37 +++++++
 common/cmd_spi.c                          |   42 +++++----
 common/soft_spi.c                         |  124 ++++++++++++++++++------
 cpu/nios/spi.c                            |   79 +++++++++++----
 drivers/rtc/ds1306.c                      |   67 ++++++++++----
Quoted 8 lines
 drivers/rtc/mc13783-rtc.c                 |   43 +++++++-
 drivers/spi/mpc8xxx_spi.c                 |   54 +++++++++--
 drivers/spi/mxc_spi.c                     |   88 +++++++++++------
 include/configs/imx31_litekit.h           |    3 +-
 include/configs/mx31ads.h                 |    3 +-
 include/spi.h                             |  150 ++++++++++++++++++++++++-----
 15 files changed, 584 insertions(+), 209 deletions(-)
 create mode 100644 common/cmd_df.c

Applied, thanks.

Best regards,

Wolfgang Denk

Signature · 5 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"We don't have to protect the environment -- the Second Coming is  at
hand."                                                   - James Watt
#18 lore raw

PATCH 1/6 Move definition of container_of() to common.h

In reply to Haavard Skinnemoen
Quoted 8 lines · Haavard Skinnemoen

AVR32 and AT91SAM9 both have their own identical definitions of container_of() taken from the Linux kernel. Move it to common.h so that all architectures can use it.

container_of() is already used by some drivers, and will be used extensively by the new and improved SPI API.

#19 lore raw

PATCH 1/6 Move definition of container_of() to common.h

In reply to Haavard Skinnemoen
Quoted 7 lines · In message <[email protected]> you…

AVR32 and AT91SAM9 both have their own identical definitions of container_of() taken from the Linux kernel. Move it to common.h so that all architectures can use it.

container_of() is already used by some drivers, and will be used extensively by the new and improved SPI API.

Quoted 6 lines
---
 include/asm-arm/arch-at91sam9/hardware.h |   11 -----------
 include/asm-avr32/u-boot.h               |   11 -----------
 include/common.h                         |   11 +++++++++++
 3 files changed, 11 insertions(+), 22 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

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