make section names compatible with -ffunction-sections -fdata-sections: frv

PATCH In review Denys Vlasenko 1 participant 1 message Jul 1, 2008 Generic include/asm header files

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Denys Vlasenko

author

2008-07-01 22:35 UTC #0 lore raw

PATCH 7/23 make section names compatible with -ffunction-sections -fdata-sections: frv

The purpose of this patch is to make kernel buildable with "gcc -ffunction-sections -fdata-sections". This patch fixes frv architecture.

Signed-off-by Denys Vlasenko <[email protected]>

--
vda

arch/frv/kernel/break.S +2 -2

@@ -21,7 +21,7 @@
 #
 # the break handler has its own stack
 #
-	.section	.bss.stack
+	.section	.bss.k.stack
 	.globl		__break_user_context
 	.balign		THREAD_SIZE
 __break_stack:

@@ -63,7 +63,7 @@
 # entry point for Break Exceptions/Interrupts
 #
 ###############################################################################
-	.section	.text.break
+	.section	.break.text
 	.balign		4
 	.globl		__entry_break
 __entry_break:

arch/frv/kernel/entry.S +1 -1

@@ -38,7 +38,7 @@
 
 #define nr_syscalls ((syscall_table_size)/4)
 
-	.section	.text.entry
+	.section	.entry.text
 	.balign		4
 
 .macro LEDS val

arch/frv/kernel/head-mmu-fr451.S +1 -1

@@ -31,7 +31,7 @@
 #define __400_LCR	0xfe000100
 #define __400_LSBR	0xfe000c00
 
-	.section	.text.init,"ax"
+	.section	.init.text,"ax"
 	.balign		4
 
 ###############################################################################

arch/frv/kernel/head-uc-fr401.S +1 -1

@@ -30,7 +30,7 @@
 #define __400_LCR	0xfe000100
 #define __400_LSBR	0xfe000c00
 
-	.section	.text.init,"ax"
+	.section	.init.text,"ax"
 	.balign		4
 
 ###############################################################################

arch/frv/kernel/head-uc-fr451.S +1 -1

@@ -30,7 +30,7 @@
 #define __400_LCR	0xfe000100
 #define __400_LSBR	0xfe000c00
 
-	.section	.text.init,"ax"
+	.section	.init.text,"ax"
 	.balign		4
 
 ###############################################################################

arch/frv/kernel/head-uc-fr555.S +1 -1

@@ -29,7 +29,7 @@
 #define __551_LCR	0xfeff1100
 #define __551_LSBR	0xfeff1c00
 
-	.section	.text.init,"ax"
+	.section	.init.text,"ax"
 	.balign		4
 
 ###############################################################################

arch/frv/kernel/head.S +2 -2

@@ -27,7 +27,7 @@
 #   command line string
 #
 ###############################################################################
-	.section	.text.head,"ax"
+	.section	.head.text,"ax"
 	.balign		4
 
 	.globl		_boot, __head_reference

@@ -541,7 +541,7 @@
 	.size		_boot, .-_boot
 
 	# provide a point for GDB to place a break
-	.section	.text.start,"ax"
+	.section	.start.text,"ax"
 	.globl		_start
 	.balign		4
 _start:

arch/frv/kernel/init_task.c +1 -1

@@ -25,7 +25,7 @@
  * "init_task" linker map entry..
  */
 union thread_union init_thread_union
-	__attribute__((__section__(".data.init_task"))) =
+	__attribute__((__section__(".init_task.data"))) =
 		{ INIT_THREAD_INFO(init_task) };
 
 /*

arch/frv/kernel/vmlinux.lds.S +9 -9

@@ -26,7 +26,7 @@
 
   _sinittext = .;
   .init.text : {
-	*(.text.head)
+	*(.head.text)
 #ifndef CONFIG_DEBUG_INFO
 	INIT_TEXT
 	EXIT_TEXT

@@ -71,13 +71,13 @@
 
   /* put sections together that have massive alignment issues */
   . = ALIGN(THREAD_SIZE);
-  .data.init_task : {
+  .init_task.data : {
 	  /* init task record & stack */
-	  *(.data.init_task)
+	  *(.init_task.data)
   }
 
   . = ALIGN(L1_CACHE_BYTES);
-  .data.cacheline_aligned : { *(.data.cacheline_aligned) }
+  .cacheline_aligned.data : { *(.cacheline_aligned.data) }
 
   .trap : {
 	/* trap table management - read entry-table.S before modifying */

@@ -94,10 +94,10 @@
   _text = .;
   _stext = .;
   .text : {
-	*(.text.start)
-	*(.text.entry)
-	*(.text.break)
-	*(.text.tlbmiss)
+	*(.start.text)
+	*(.entry.text)
+	*(.break.text)
+	*(.tlbmiss.text)
 	TEXT_TEXT
 	SCHED_TEXT
 	LOCK_TEXT

@@ -152,7 +152,7 @@
 
   .sbss		: { *(.sbss .sbss.*) }
   .bss		: { *(.bss .bss.*) }
-  .bss.stack	: { *(.bss) }
+  .bss.k.stack	: { *(.bss) }
 
   __bss_stop = .;
   _end = . ;

arch/frv/mm/tlb-miss.S +1 -1

@@ -16,7 +16,7 @@
 #include <asm/highmem.h>
 #include <asm/spr-regs.h>
 
-	.section	.text.tlbmiss
+	.section	.tlbmiss.text
 	.balign		4
 
 	.globl		__entry_insn_mmu_miss