Add initial PPC460SX reference board (redwood) config file and defines.
PATCH 2/3 Add initial PPC460SX reference board (redwood) config file and defines.
From: Feng Kan <[email protected]>
Add config file for AMCC redwood reference board for PPC460SX. Also include defines for PPC460SX processor.
--- include/asm-ppc/ppc4xx-sdram.h | 3 +- include/asm-ppc/processor.h | 4 + include/configs/redwood.h | 211 ++++++++++++++++++++++++++++++++++++++++ include/ppc440.h | 20 +++-- include/ppc4xx.h | 3 +- 5 files changed, 232 insertions(+), 9 deletions(-) create mode 100644 include/configs/redwood.h
include/asm-ppc/ppc4xx-sdram.h +2 -1
@@ -282,7 +282,8 @@* Memory Bank 0-7 configuration */ #if defined(CONFIG_440SPE ) || \ - defined(CONFIG_460EX ) || defined(CONFIG_460GT ) + defined(CONFIG_460EX ) || defined(CONFIG_460GT ) || \ + defined(CONFIG_460SX )#define SDRAM_RXBAS_SDBA_MASK 0xFFE00000/* Base address */ #define SDRAM_RXBAS_SDBA_ENCODE (n) ((((u32)(n))&0xFFE00000)>>2)#define SDRAM_RXBAS_SDBA_DECODE (n) ((((u32)(n))&0xFFE00000)<<2)
include/asm-ppc/processor.h +4 -0
@@ -810,6 +810,10 @@#define PVR_460EX_RA 0x130218A3/* 460EX rev A without Security Engine */ #define PVR_460GT_SE_RA 0x130218A0/* 460GT rev A with Security Engine */ #define PVR_460GT_RA 0x130218A1/* 460GT rev A without Security Engine */ +#define PVR_460SX_RA 0x13541800/* 460SX rev A */ +#define PVR_460SX_RA_V1 0x13541801/* 460SX rev A Variant 1 Security disabled */ +#define PVR_460GX_RA 0x13541802/* 460GX rev A */ +#define PVR_460GX_RA_V1 0x13541803/* 460GX rev A Variant 1 Security disabled */ #define PVR_601 0x00010000#define PVR_602 0x00050000#define PVR_603 0x00030000
include/configs/redwood.h new file +211 -0
211 lines not on this page · raw message
include/ppc440.h +13 -7
@@ -749,7 +749,8 @@+----------------------------------------------------------------------------*/ #if defined (CONFIG_440GX ) || \ defined(CONFIG_440SP ) || defined(CONFIG_440SPE ) || \ - defined(CONFIG_460EX ) || defined(CONFIG_460GT ) + defined(CONFIG_460EX ) || defined(CONFIG_460GT ) || \ + defined(CONFIG_460SX )#define L2_CACHE_BASE 0x030#define l2_cache_cfg (L2_CACHE_BASE+0x00)/* L2 Cache Config */ #define l2_cache_cmd (L2_CACHE_BASE+0x01)/* L2 Cache Command */
@@ -837,7 +838,8 @@/*----------------------------------------------------------------------------- | Clocking, Power Management and Chip Control +----------------------------------------------------------------------------*/ -#if defined(CONFIG_460EX ) || defined(CONFIG_460GT ) +#if defined(CONFIG_460EX ) || defined(CONFIG_460GT ) || \ + defined(CONFIG_460SX )#define CNTRL_DCR_BASE 0x160#else #define CNTRL_DCR_BASE 0x0b0
@@ -896,7 +898,8 @@#if defined(CONFIG_440SPE ) || \ defined(CONFIG_440EPX ) || defined(CONFIG_440GRX ) || \ - defined(CONFIG_460EX ) || defined(CONFIG_460GT ) + defined(CONFIG_460EX ) || defined(CONFIG_460GT ) || \ + defined(CONFIG_460SX )#define UIC2_DCR_BASE 0xe0#define uic2sr (UIC2_DCR_BASE+0x0)/* UIC2 status-Read Clear */ #define uic2srs (UIC2_DCR_BASE+0x1)/* UIC2 status-Read Set */
@@ -1608,7 +1611,8 @@#define UICB0_ALL (UICB0_UIC0CI | UICB0_UIC0NCI | UICB0_UIC1CI | \ UICB0_UIC1NCI | UICB0_UIC2CI | UICB0_UIC2NCI) -#elif defined(CONFIG_460EX ) || defined(CONFIG_460GT ) +#elif defined(CONFIG_460EX ) || defined(CONFIG_460GT ) || \ + defined(CONFIG_460SX )#define UICB0_UIC1NCI 0x00000002/* UIC1 Noncritical Interrupt */ #define UICB0_UIC1CI 0x00000001/* UIC1 Critical Interrupt */
@@ -1855,7 +1859,7 @@#define SDR0_DDR0_TUNE_DECODE (n) ((((unsigned long)(n))>>0)&0x2FF)#endif -#if defined(CONFIG_440SPE ) +#if defined(CONFIG_440SPE ) || defined(CONFIG_460SX )#define SDR0_CP440 0x0180#define SDR0_CP440_ERPN_MASK 0x30000000#define SDR0_CP440_ERPN_MASK_HI 0x3000
@@ -2793,7 +2797,8 @@/*-----------------------------------------------------------------------------+ | Clocking +-----------------------------------------------------------------------------*/ -#if defined(CONFIG_460EX ) || defined(CONFIG_460GT ) +#if defined(CONFIG_460EX ) || defined(CONFIG_460GT ) || \ + defined(CONFIG_460SX )#define PLLSYS0_FWD_DIV_A_MASK 0x000000f0/* Fwd Div A */ #define PLLSYS0_FWD_DIV_B_MASK 0x0000000f/* Fwd Div B */ #define PLLSYS0_FB_DIV_MASK 0x0000ff00/* Feedback divisor */
@@ -3145,7 +3150,8 @@* GPIO macro register defines ******************************************************************************/ #if defined(CONFIG_440GP ) || defined(CONFIG_440GX ) || \ - defined(CONFIG_440SP ) || defined(CONFIG_440SPE ) + defined(CONFIG_440SP ) || defined(CONFIG_440SPE ) || \ + defined(CONFIG_460SX )#define GPIO0_BASE (CFG_PERIPHERAL_BASE+0x00000700)#define GPIO0_OR (GPIO0_BASE+0x0)
include/ppc4xx.h +2 -1
@@ -41,7 +41,8 @@#if defined(CONFIG_405EX ) || \ defined(CONFIG_440SP ) || defined(CONFIG_440SPE ) || \ - defined(CONFIG_460EX ) || defined(CONFIG_460GT ) + defined(CONFIG_460EX ) || defined(CONFIG_460GT ) || \ + defined(CONFIG_460SX )#define CONFIG_SDRAM_PPC4xx_IBM_DDR2/* IBM DDR(2) controller */ #endif
Signature · 1 line
1.5.6.1
PATCH 2/3 Add initial PPC460SX reference board (redwood) config file and defines.
Quoted 4 lines · fkan at amcc.com
From: Feng Kan <[email protected]>
Add config file for AMCC redwood reference board for PPC460SX. Also include defines for PPC460SX processor.
Thanks. Please find some review comments below.
Quoted 159 lines
Signed-off-by Feng Kan <[email protected]>--- include/asm-ppc/ppc4xx-sdram.h | 3 +- include/asm-ppc/processor.h | 4 + include/configs/redwood.h | 211 ++++++++++++++++++++++++++++++++++++++++ include/ppc440.h | 20 +++-- include/ppc4xx.h | 3 +- 5 files changed, 232 insertions(+), 9 deletions(-) create mode 100644 include/configs/redwood.h(quoted diff) +0
-0
b/include/asm-ppc/ppc4xx-sdram.hindex 83931f1..6eb8209 100644include/asm-ppc/ppc4xx-sdram.h +2
-1@@ -282,7 +282,8 @@* Memory Bank 0-7 configuration */ #if defined(CONFIG_440SPE ) || \ - defined(CONFIG_460EX ) || defined(CONFIG_460GT ) + defined(CONFIG_460EX ) || defined(CONFIG_460GT ) || \ + defined(CONFIG_460SX )#define SDRAM_RXBAS_SDBA_MASK 0xFFE00000/* Base address */ #define SDRAM_RXBAS_SDBA_ENCODE (n) ((((u32)(n))&0xFFE00000)>>2)#define SDRAM_RXBAS_SDBA_DECODE (n) ((((u32)(n))&0xFFE00000)<<2)include/asm-ppc/processor.h +1
-0@@ -810,6 +810,10 @@#define PVR_460EX_RA 0x130218A3/* 460EX rev A without Security Engine */ #define PVR_460GT_SE_RA 0x130218A0/* 460GT rev A with Security Engine */ #define PVR_460GT_RA 0x130218A1 /* 460GT rev A without Security Engine */ +#define PVR_460SX_RA 0x13541800 /* 460SX rev A */ +#define PVR_460SX_RA_V1 0x13541801/* 460SX rev A Variant 1 Security disabled */ +#define
PVR_460GX_RA0x13541802/* 460GX rev A*/ +#define PVR_460GX_RA_V1 0x13541803 /* 460GX rev A Variant 1Security disabled */ #define
PVR_6010x00010000
#definePVR_6020x00050000
#definePVR_6030x00030000include/configs/redwood.h new file +103
-0@@ -0,0 +1,211 @@ +/* +* Configuration for AMCC 460SX Ref (redwood) +* +* (C) Copyright 2008 +* Feng Kan, Applied Micro Circuits Corp., fkan at amcc.com +* +* See file CREDITS for list of people who contributed to this +* project. +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License as +* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, +* MA 02111-1307 USA +*/ +#ifndef __CONFIG_H +#define __CONFIG_H + +/*----------------------------------------------------------------------- +* High Level Configuration Options +*----------------------------------------------------------------------*/ +#define CONFIG_4xx 1/* ... PPC4xx family */ +#define CONFIG_440 1/* ... PPC460 family */ +#define CONFIG_460SX 1/* ... PPC460 family */ +#define CONFIG_BOARD_EARLY_INIT_F 1/* Call board_pre_init */ + +/*----------------------------------------------------------------------- +* Include common defines/options for all AMCC boards +*----------------------------------------------------------------------*/ +#define CONFIG_HOSTNAME redwood + +#include "amcc-common.h" + +#define CONFIG_SYS_CLK_FREQ 33333333/* external freq to pll */ + +/*----------------------------------------------------------------------- +* Base addresses -- Note these are effective addresses where the +* actual resources get mapped (not physical addresses) +*----------------------------------------------------------------------*/ +#define CFG_FLASH_BASE 0xfff00000/* start of FLASH */ +#define CFG_PERIPHERAL_BASE 0xa0000000/* internal peripherals */ +#define CFG_ISRAM_BASE 0x90000000/* internal SRAM */ + +#define CFG_PCI_BASE 0xd0000000/* internal PCI regs */ + +#define CFG_PCIE_MEMBASE 0x90000000/* mapped PCIe memory */ +#define CFG_PCIE0_MEMBASE 0x90000000/* mapped PCIe memory */ +#define CFG_PCIE1_MEMBASE 0xa0000000/* mapped PCIe memory */ +#define CFG_PCIE_MEMSIZE 0x01000000 + +#define CFG_PCIE0_XCFGBASE 0xb0000000 +#define CFG_PCIE1_XCFGBASE 0xb2000000 +#define CFG_PCIE2_XCFGBASE 0xb4000000 +#define CFG_PCIE0_CFGBASE 0xb6000000 +#define CFG_PCIE1_CFGBASE 0xb8000000 +#define CFG_PCIE2_CFGBASE 0xba000000 + +/* PCIe mapped UTL registers */ +#define CFG_PCIE0_REGBASE 0xd0000000 +#define CFG_PCIE1_REGBASE 0xd0010000 +#define CFG_PCIE2_REGBASE 0xd0020000 + +/* System RAM mapped to PCI space */ +#define CONFIG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE +#define CONFIG_PCI_SYS_MEM_PHYS CFG_SDRAM_BASE +#define CONFIG_PCI_SYS_MEM_SIZE (1024 * 1024 * 1024) + +#define CFG_FPGA_BASE 0xe2000000/* epld */ +#define CFG_OPER_FLASH 0xe7000000/* SRAM - OPER Flash */ + +/*----------------------------------------------------------------------- +* Initial RAM & stack pointer (placed in internal SRAM) +*----------------------------------------------------------------------*/ +#define CFG_TEMP_STACK_OCM 1 +#define CFG_OCM_DATA_ADDR CFG_ISRAM_BASE +#define CFG_INIT_RAM_ADDR CFG_ISRAM_BASE/* Initial RAM address */ +#define CFG_INIT_RAM_END 0x2000/* End of used area in RAM */ +#define CFG_GBL_DATA_SIZE 128/* num bytes initial data */ + +#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) +#define CFG_POST_WORD_ADDR (CFG_GBL_DATA_OFFSET - 0x4) +#define CFG_INIT_SP_OFFSET CFG_POST_WORD_ADDR + +/*----------------------------------------------------------------------- +* DDR SDRAM +*----------------------------------------------------------------------*/ +#define CONFIG_SPD_EEPROM 1/* Use SPD EEPROM for setup */ +#define CONFIG_DDR_ECC 1/* with ECC support */ + +#define CFG_SPD_MAX_DIMMS 2 + +/* SPD i2c spd addresses */ +#if CFG_SPD_MAX_DIMMS ==4 +#define SPD_EEPROM_ADDRESS {IIC0_DIMM0_ADDR, IIC0_DIMM1_ADDR,
IIC0_DIMM2_ADDR,IIC0_DIMM3_ADDR} +#defineIIC0_DIMM0_ADDR0x53include/configs/redwood.h new file +6
-0+#define IIC0_DIMM1_ADDR 0x52 +#define IIC0_DIMM2_ADDR 0x51 +#define IIC0_DIMM3_ADDR 0x50 + +#elif CFG_SPD_MAX_DIMMS ==3 +#define SPD_EEPROM_ADDRESS {IIC0_DIMM0_ADDR, IIC0_DIMM1_ADDR,
IIC0_DIMM2_ADDR} +#defineIIC0_DIMM0_ADDR0x53include/configs/redwood.h new file +2
-0+#define IIC0_DIMM1_ADDR 0x52 +#define IIC0_DIMM2_ADDR 0x51
include/configs/redwood.h line 123
Quoted 10 lines
include/configs/redwood.h new file +10
-0+ +#elif CFG_SPD_MAX_DIMMS ==2 +#define SPD_EEPROM_ADDRESS {IIC0_DIMM0_ADDR, IIC0_DIMM1_ADDR} +#define IIC0_DIMM0_ADDR 0x53 +#define IIC0_DIMM1_ADDR 0x52 + +#elif CFG_SPD_MAX_DIMMS ==1 +#define SPD_EEPROM_ADDRESS {IIC0_DIMM0_ADDR} +#define IIC0_DIMM0_ADDR 0x53 +#endif
Why do you need these multiple CFG_SPD_MAX_DIMMS sections? I assume that Redwood has a fixed number of DIMM slots, correct? Please remove all unneeded defines.
Quoted 47 lines
include/configs/redwood.h new file +45
-2+/*----------------------------------------------------------------------- +* I2C +*----------------------------------------------------------------------*/ +#define CFG_I2C_SPEED 400000/* I2C speed */ + +#define IIC0_BOOTPROM_ADDR 0x50 +#define IIC0_ALT_BOOTPROM_ADDR 0x54 + +/* Don't probe these addrs */ +#define CFG_I2C_NOPROBES {0x50, 0x52, 0x53, 0x54} + +#define CFG_I2C_EEPROM_ADDR_LEN 2/* Bytes of address */ + +/*----------------------------------------------------------------------- +* Environment +*----------------------------------------------------------------------*/ +#undef CFG_ENV_IS_IN_NVRAM/* ... not in NVRAM */ +#define CFG_ENV_IS_IN_FLASH 1/* Environment uses flash */ +#undef CFG_ENV_IS_IN_EEPROM/* ... not in EEPROM */ + +#define CONFIG_PREBOOT "echo;" \ + "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ + "echo" + +#undef CONFIG_BOOTARGS + +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_AMCC_DEF_ENV \ + CONFIG_AMCC_DEF_ENV_POWERPC \ + CONFIG_AMCC_DEF_ENV_NOR_UPD \ + CONFIG_AMCC_DEF_ENV_NAND_UPD \ + "kernel_addr=fc000000\0" \ + "fdt_addr=fc1e0000\0" \ + "ramdisk_addr=fc200000\0" \ + "" + +/*------------------------------------------------------------------------ ----+ +| Commands in addition to amcc-common.h ++------------------------------------------------------------------------- ---*/ +#define CONFIG_CMD_SDRAM + +#define CONFIG_BOOTCOMMAND "run flash_self" + +#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ + +#define CONFIG_IBM_EMAC4_V4 1 +#define CONFIG_PHY_RESET 1/* reset phy upon startup */
include/configs/redwood.h line 181
Quoted 10 lines
include/configs/redwood.h new file +10
-0+#define CONFIG_PHY_RESET_DELAY 1000 +#define CONFIG_M88E1141_PHY 1/* Enable phy */ +#define CONFIG_PHY_GIGE 1/* Include GbE speed/duplex detection */ + +#define CONFIG_HAS_ETH0 +#define CONFIG_HAS_ETH1 +#define CONFIG_PHY_ADDR 0/* PHY address, See schematics */ +#define CONFIG_PHY1_ADDR 1/* PHY address, See schematics */ +#define CONFIG_PHY2_ADDR 2/* PHY address, See schematics */ +#define CONFIG_PHY3_ADDR 3/* PHY address, See schematics */
You define 2 EMAC devices but 4 PHY addresses. This doesn't make sense to me. Either define 4 EMAC devices too or remove 2 PHY addresses.
Quoted 9 lines
include/configs/redwood.h new file +9
-0+#undef CONFIG_WATCHDOG/* watchdog disabled */ + +/*----------------------------------------------------------------------- +* FLASH related +*----------------------------------------------------------------------*/ +#define CFG_FLASH_CFI /* The flash is CFI compatible */ +#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */ +#define CFG_FLASH_CFI_AMD_RESET 1/* Use AMD (Spansion) reset cmd */ +
include/configs/redwood.h line 201
Quoted 10 lines
include/configs/redwood.h new file +10
-0+#define CFG_MAX_FLASH_BANKS 3/* number of banks */ +#define CFG_MAX_FLASH_SECT 256/* sectors per device */ + +#undef CFG_FLASH_CHECKSUM +#define CFG_FLASH_ERASE_TOUT 120000/* Timeout for Flash Erase (in ms) */ +#define CFG_FLASH_WRITE_TOUT 500/* Timeout for Flash Write (in ms) */ + +#define CFG_FLASH_ADDR0 0x5555 +#define CFG_FLASH_ADDR1 0x2aaa +#define CFG_FLASH_WORD_SIZE unsigned char
These 3 defines above are most likely not used at all. Please check and remove if possible.
Best regards,
Stefan
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