sh: update sh7343 code
PATCH 1/2 sh: update sh7343 code
updated the following codes for SH7343:
- add register_intc_controller()
- add EARLY_SCIF_CONSOLE_PORT
- add define of CPG register
Signed-off-by Yoshihiro Shimoda <[email protected]>
--- arch/sh/Kconfig.debug | 3 +- arch/sh/kernel/cpu/sh4a/setup-sh7343.c | 135 ++++++++++++++++++++++++++++++++ include/asm-sh/cpu-sh4/freq.h | 1 + 3 files changed, 138 insertions(+), 1 deletions(-)
arch/sh/Kconfig.debug +2 -1
@@ -36,7 +36,8 @@ config EARLY_SCIF_CONSOLE_PORT default "0xff804000" if CPU_SUBTYPE_MXG default "0xffc30000" if CPU_SUBTYPE_SHX3 default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763 || \ - CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366 + CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366 || \ + CPU_SUBTYPE_SH7343 default "0xffe80000" if CPU_SH4 default "0xffea0000" if CPU_SUBTYPE_SH7785 default "0xfffe8000" if CPU_SUBTYPE_SH7203
arch/sh/kernel/cpu/sh4a/setup-sh7343.c +135 -0
141 lines not on this page · raw message
include/asm-sh/cpu-sh4/freq.h +1 -0
@@ -12,6 +12,7 @@#if defined(CONFIG_CPU_SUBTYPE_SH7722 ) || \ defined(CONFIG_CPU_SUBTYPE_SH7723 ) || \ + defined(CONFIG_CPU_SUBTYPE_SH7343 ) || \ defined(CONFIG_CPU_SUBTYPE_SH7366 )#define FRQCR 0xa4150000#define VCLKCR 0xa4150004
Quoted 6 lines · Yoshihiro Shimoda
updated the following codes for SH7343:
- addregister_intc_controller()
- addEARLY_SCIF_CONSOLE_PORT
- add define of CPG registerSigned-off-by Yoshihiro Shimoda <[email protected]>
Quoted 6 lines · Yoshihiro Shimoda
updated the following codes for Solution Endine 7343:
- fix compile error inarch/sh/boards/se/7343/irq.c
- add nor flash physmaps
- update defconfigSigned-off-by Yoshihiro Shimoda <[email protected]>
Quoted 4 lines · Yoshihiro Shimoda
This adds initial support for the Renesas R0P7785LC0011RL board. This patch supports 29bit address mode only.
Signed-off-by Yoshihiro Shimoda <[email protected]>
These are all applied, thanks.