ppc4xx: ML507: U-Boot in flash and System ACE
Subsystems (2)
PATCH 1/1 ppc4xx: ML507: U-Boot in flash and System ACE
This patch allows booting from FLASH the ML507 board
by Xilinx.
Previously, u-boot needed to be loaded from JTAG or a Sytem ACE
CF
Signed-off-by Ricardo Ribalda Delgado <[email protected]>
--- MAKEALL | 1 + Makefile | 8 ++ board/xilinx/ml507/config.mk | 3 + board/xilinx/ml507/init.S | 8 ++- board/xilinx/ml507/u-boot-ram.lds | 134 ++++++++++++++++++++++++++++++++++ board/xilinx/ml507/u-boot-rom.lds | 144 +++++++++++++++++++++++++++++++++++++ board/xilinx/ml507/u-boot.lds | 130 --------------------------------- board/xilinx/ml507/xparameters.h | 7 +- include/configs/ml507.h | 17 ++--- 9 files changed, 309 insertions(+), 143 deletions(-) create mode 100644 board/xilinx/ml507/u-boot-ram.lds create mode 100644 board/xilinx/ml507/u-boot-rom.lds delete mode 100644 board/xilinx/ml507/u-boot.lds
MAKEALL +1 -0
@@ -210,6 +210,7 @@ LIST_4xx=" \ ML2 \ ml300 \ ml507 \ + ml507_flash \ ocotea \ OCRTC \ ORSG \
Makefile +8 -0
@@ -1349,7 +1349,15 @@ ML2_config: unconfig ml300_config: unconfig @$(MKCONFIG) $(@:_config=) ppc ppc4xx ml300 xilinx +ml507_flash_config: unconfig + @mkdir -p $(obj)include $(obj)board/xilinx/ml507 + @cp $(obj)board/xilinx/ml507/u-boot-rom.lds $(obj)board/xilinx/ml507/u-boot.lds + @echo "TEXT_BASE = 0xFE3E0000" > $(obj)board/xilinx/ml507/config.tmp + @$(MKCONFIG) $(@:_flash_config=) ppc ppc4xx ml507 xilinx + ml507_config: unconfig + @mkdir -p $(obj)include $(obj)board/xilinx/ml507 + @cp $(obj)board/xilinx/ml507/u-boot-ram.lds $(obj)board/xilinx/ml507/u-boot.lds @$(MKCONFIG) $(@:_config=) ppc ppc4xx ml507 xilinx ocotea_config: unconfig
board/xilinx/ml507/config.mk +3 -0
@@ -20,5 +20,8 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA # +sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp +ifndef TEXT_BASE TEXT_BASE = 0x04000000 +endif
board/xilinx/ml507/init.S +7 -1
@@ -35,13 +35,19 @@ tlbentry(XPAR_UARTLITE_0_BASEADDR, SZ_64K, XPAR_UARTLITE_0_BASEADDR, 0, /* PIC */ tlbentry(XPAR_INTC_0_BASEADDR, SZ_64K, XPAR_INTC_0_BASEADDR, 0, AC_R | AC_W | SA_G | SA_I) +#ifdef XPAR_IIC_EEPROM_BASEADDR /* I2C */ tlbentry(XPAR_IIC_EEPROM_BASEADDR, SZ_64K, XPAR_IIC_EEPROM_BASEADDR, 0, AC_R | AC_W | SA_G | SA_I) +#endif +#ifdef XPAR_LLTEMAC_0_BASEADDR /* Net */ tlbentry(XPAR_LLTEMAC_0_BASEADDR, SZ_64K, XPAR_LLTEMAC_0_BASEADDR, 0, AC_R | AC_W | SA_G | SA_I) +#endif +#ifdef XPAR_FLASH_MEM0_BASEADDR /*Flash*/ tlbentry(XPAR_FLASH_MEM0_BASEADDR, SZ_256M, XPAR_FLASH_MEM0_BASEADDR, 0, - AC_R | AC_W | SA_G | SA_I) + AC_R | AC_W | AC_X | SA_G | SA_I) +#endif tlbtab_end
board/xilinx/ml507/u-boot-ram.lds new file +134 -0
134 lines not on this page · raw message
board/xilinx/ml507/u-boot-rom.lds new file +144 -0
144 lines not on this page · raw message
board/xilinx/ml507/u-boot.lds deleted +0 -130
130 lines not on this page · raw message
board/xilinx/ml507/xparameters.h +4 -3
@@ -22,13 +22,14 @@#define XPARAMETER_H #define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000 -#define XPAR_INTC_0_BASEADDR 0x81800000 -#define XPAR_UARTLITE_0_BASEADDR 0x84000000#define XPAR_IIC_EEPROM_BASEADDR 0x81600000 +#define XPAR_INTC_0_BASEADDR 0x81800000#define XPAR_LLTEMAC_0_BASEADDR 0x81c00000 -#define XPAR_FLASH_MEM0_BASEADDR 0xFC000000 +#define XPAR_UARTLITE_0_BASEADDR 0x84000000 +#define XPAR_FLASH_MEM0_BASEADDR 0xFE000000#define XPAR_PLB_CLOCK_FREQ_HZ 100000000#define XPAR_CORE_CLOCK_FREQ_HZ 400000000#define XPAR_INTC_MAX_NUM_INTR_INPUTS 13 +#define XPAR_UARTLITE_0_BAUDRATE 9600#endif
include/configs/ml507.h +8 -9
@@ -31,15 +31,14 @@/*Mem Map*/ #define CFG_SDRAM_BASE 0x0#define CFG_SDRAM_SIZE_MB 256 -#define CFG_MONITOR_BASE 0x04000000 +#define CFG_MONITOR_BASE TEXT_BASE#define CFG_MONITOR_LEN ( 192 * 1024 )#define CFG_MALLOC_LEN ( 128 * 1024 ) -#define CFG_ISRAM_BASE XPAR_XPS_BRAM_IF_CNTLR_1_BASEADDR/*Uart*/ #define CONFIG_XILINX_UARTLITE -#define CONFIG_BAUDRATE 9600 -#define CFG_BAUDRATE_TABLE {9600} +#define CONFIG_BAUDRATE XPAR_UARTLITE_0_BAUDRATE +#define CFG_BAUDRATE_TABLE { XPAR_UARTLITE_0_BAUDRATE }#define CONFIG_SERIAL_BASE XPAR_UARTLITE_0_BASEADDR/*Cmd*/
@@ -75,9 +74,9 @@#define CFG_PBSIZE ( CFG_CBSIZE + sizeof( CFG_PROMPT ) + 16 )#define CFG_MAXARGS 16/* max number of command args */ #define CFG_BARGSIZE CFG_CBSIZE/* Boot Argument Buffer Size */ -#define CFG_MEMTEST_START 0x0400000/* memtest works on */ -#define CFG_MEMTEST_END 0x0C00000/* 4 ... 12 MB in DRAM */ -#define CFG_LOAD_ADDR 0x400000/* default load address */ +#define CFG_MEMTEST_START 0x00400000/* memtest works on */ +#define CFG_MEMTEST_END 0x00C00000/* 4 ... 12 MB in DRAM */ +#define CFG_LOAD_ADDR 0x00400000/* default load address */ #define CFG_EXTBDINFO 1/* Extended board_into (bd_t) */ #define CFG_HZ 1000/* decrementer freq: 1 ms ticks */ #define CONFIG_CMDLINE_EDITING /* add command line history */
@@ -101,7 +100,7 @@#define CFG_GBL_DATA_OFFSET ( CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE )#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET/*Speed*/ -#define CONFIG_SYS_CLK_FREQ 400000000 +#define CONFIG_SYS_CLK_FREQ XPAR_CORE_CLOCK_FREQ_HZ/*Flash*/ #define CFG_FLASH_BASE XPAR_FLASH_MEM0_BASEADDR
@@ -110,7 +109,7 @@#define CFG_FLASH_CFI_DRIVER 1#define CFG_FLASH_EMPTY_INFO 1#define CFG_MAX_FLASH_BANKS 1 -#define CFG_MAX_FLASH_SECT ( CFG_FLASH_SIZE / ( 64 * 1024 ) ) +#define CFG_MAX_FLASH_SECT 259#define CFG_FLASH_PROTECTION #endif /* __CONFIG_H */
Signature · 1 line
1.5.6.3
PATCH 1/1 ppc4xx: ML507: U-Boot in flash and System ACE
Quoted 7 lines · Ricardo Ribalda Delgado
This patch allows booting from FLASH the ML507 board
by Xilinx.Previously, u-boot needed to be loaded from JTAG or a Sytem ACE
CFSigned-off-by Ricardo Ribalda Delgado <[email protected]>
Applied to next branch of u-boot-ppc4xx repository.
Thanks.
Best regards,
Stefan
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