[U-Boot] [PATCH 1/4] ppc4xx: Update DU440 config

matthias.fuchs at esd-electronics.com

author

2008-10-07 11:13 UTC #0 lore raw

PATCH 1/4 ppc4xx: Update DU440 config

From: Matthias Fuchs <[email protected]>

Signed-off-by Matthias Fuchs <[email protected]>

---
 include/configs/DU440.h |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)

include/configs/DU440.h +4 -2

index 9f8c423..fd0c046 100644
@@ -85,8 +85,7 @@
 /*
  * Serial Port
  */
-/* TODO: external clock oscillator will be removed */
-#define CFG_EXT_SERIAL_CLOCK	11059200	/* ext. 11.059MHz clk	*/
+#undef CFG_EXT_SERIAL_CLOCK
 #define CONFIG_BAUDRATE		115200
 #define CONFIG_SERIAL_MULTI     1
 #undef CONFIG_UART1_CONSOLE

@@ -432,4 +431,7 @@ int du440_phy_addr(int devnum);
 
 #define CONFIG_AUTOSCRIPT	1
 
+#define CONFIG_OF_LIBFDT
+#define CONFIG_OF_BOARD_SETUP
+
 #endif	/* __CONFIG_H */

Signature · 1 line

1.5.3

matthias.fuchs at esd-electronics.com

author

2008-10-07 11:13 UTC #1 lore raw

PATCH 2/4 ppc4xx: Fix DU440 GPIO configuration

From: Matthias Fuchs <[email protected]>

Signed-off-by Matthias Fuchs <[email protected]>

---
 board/esd/du440/du440.c |   10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)

board/esd/du440/du440.c +5 -5

index 8765cc1..5cff9f5 100644
@@ -52,15 +52,15 @@ int board_early_init_f(void)
 	 * Setup the GPIO pins
 	 */
 	out_be32((void*)GPIO0_OR, 0x00000000 | CFG_GPIO0_EP_EEP);
-	out_be32((void*)GPIO0_TCR, 0x0000000f | CFG_GPIO0_EP_EEP);
+	out_be32((void*)GPIO0_TCR, 0x0000001f | CFG_GPIO0_EP_EEP);
 	out_be32((void*)GPIO0_OSRL, 0x50055400);
-	out_be32((void*)GPIO0_OSRH, 0x550050aa);
+	out_be32((void*)GPIO0_OSRH, 0x55005000);
 	out_be32((void*)GPIO0_TSRL, 0x50055400);
 	out_be32((void*)GPIO0_TSRH, 0x55005000);
 	out_be32((void*)GPIO0_ISR1L, 0x50000000);
 	out_be32((void*)GPIO0_ISR1H, 0x00000000);
 	out_be32((void*)GPIO0_ISR2L, 0x00000000);
-	out_be32((void*)GPIO0_ISR2H, 0x00000100);
+	out_be32((void*)GPIO0_ISR2H, 0x00000000);
 	out_be32((void*)GPIO0_ISR3L, 0x00000000);
 	out_be32((void*)GPIO0_ISR3H, 0x00000000);

@@ -73,9 +73,9 @@ int board_early_init_f(void)
 		 CFG_GPIO1_LEDPOST |
 		 CFG_GPIO1_LEDDU);
 	out_be32((void*)GPIO1_ODR, CFG_GPIO1_LEDDU);
-	out_be32((void*)GPIO1_OSRL, 0x5c280000);
+	out_be32((void*)GPIO1_OSRL, 0x0c280000);
 	out_be32((void*)GPIO1_OSRH, 0x00000000);
-	out_be32((void*)GPIO1_TSRL, 0x0c000000);
+	out_be32((void*)GPIO1_TSRL, 0xcc000000);
 	out_be32((void*)GPIO1_TSRH, 0x00000000);
 	out_be32((void*)GPIO1_ISR1L, 0x00005550);
 	out_be32((void*)GPIO1_ISR1H, 0x00000000);

Signature · 1 line

1.5.3

matthias.fuchs at esd-electronics.com

author

2008-10-07 11:13 UTC #2 lore raw

PATCH 3/4 ppc4xx: Add strapping mode for 667MHz CPU frequency on DU440 board

From: Matthias Fuchs <[email protected]>

Signed-off-by Matthias Fuchs <[email protected]>

---
 board/esd/du440/du440.c |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)

board/esd/du440/du440.c +6 -0

index 5cff9f5..7df2adb 100644
@@ -733,6 +733,12 @@ int do_setup_boot_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 			/* sdsdp[1]=0x095fa030; */
 			sdsdp[2] = 0x40082350;
 			sdsdp[3] = 0x0d050000;
+		} else if (!strcmp(argv[1], "667-166")) {
+			printf("Bootstrapping for 667-166MHz\n");
+			sdsdp[0] = 0x8778a252;
+			sdsdp[1] = 0x09d7a030;
+			sdsdp[2] = 0x40082350;
+			sdsdp[3] = 0x0d050000;
 		}
 	} else {
 		printf("Bootstrapping for 533MHz (default)\n");

Signature · 1 line

1.5.3

matthias.fuchs at esd-electronics.com

author

2008-10-07 11:13 UTC #3 lore raw

PATCH 4/4 ppc4xx: Fix USB 2.0 phy reset sequence

From: Matthias Fuchs <[email protected]>

This patch fixes USB 2.0 communication issues on some DU440 boards.

Signed-off-by Matthias Fuchs <[email protected]>

---
 board/esd/du440/du440.c |   35 ++++++++++++++++++++++++++++++++---
 1 files changed, 32 insertions(+), 3 deletions(-)

board/esd/du440/du440.c +32 -3

index 7df2adb..6dca35d 100644
@@ -169,6 +169,7 @@ int misc_init_r(void)
 	unsigned long usb2d0cr = 0;
 	unsigned long usb2phy0cr, usb2h0cr = 0;
 	unsigned long sdr0_pfc1;
+	unsigned long sdr0_srst0, sdr0_srst1;
 	int i, j;
 
 	/* adjust flash start and offset */

@@ -223,10 +224,38 @@ int misc_init_r(void)
 	mtsdr(SDR0_USB2PHY0CR, usb2phy0cr);
 	mtsdr(SDR0_USB2H0CR, usb2h0cr);
 
-	/* clear resets */
-	udelay (1000);
+	/*
+	 * Take USB out of reset:
+	 * -Initial status = all cores are in reset
+	 * -deassert reset to OPB1, P4OPB0, OPB2, PLB42OPB1 OPB2PLB40 cores
+	 * -wait 1 ms
+	 * -deassert reset to PHY
+	 * -wait 1 ms
+	 * -deassert  reset to HOST
+	 * -wait 4 ms
+	 * -deassert all other resets
+	 */
+	mfsdr(SDR0_SRST1, sdr0_srst1);
+	sdr0_srst1 &= ~(SDR0_SRST1_OPBA1 |		\
+			SDR0_SRST1_P4OPB0 |		\
+			SDR0_SRST1_OPBA2 |		\
+			SDR0_SRST1_PLB42OPB1 |		\
+			SDR0_SRST1_OPB2PLB40);
+	mtsdr(SDR0_SRST1, sdr0_srst1);
+	udelay(1000);
+
+	mfsdr(SDR0_SRST1, sdr0_srst1);
+	sdr0_srst1 &= ~SDR0_SRST1_USB20PHY;
+	mtsdr(SDR0_SRST1, sdr0_srst1);
+	udelay(1000);
+
+	mfsdr(SDR0_SRST0, sdr0_srst0);
+	sdr0_srst0 &= ~SDR0_SRST0_USB2H;
+	mtsdr(SDR0_SRST0, sdr0_srst0);
+	udelay(4000);
+
+	/* finally all the other resets */
 	mtsdr(SDR0_SRST1, 0x00000000);
-	udelay (1000);
 	mtsdr(SDR0_SRST0, 0x00000000);
 
 	printf("USB:   Host(int phy)\n");

Signature · 1 line

1.5.3

Stefan Roese

2008-10-08 09:51 UTC #4 lore raw

PATCH 4/4 ppc4xx: Fix USB 2.0 phy reset sequence

Hi Matthias,

Quoted 3 lines · matthias.fuchs at esd-electronics.com

From: Matthias Fuchs <[email protected]>
This patch fixes USB 2.0 communication issues on some DU440 boards.

Is this a potential problem for other 440EPx boards as well? Or is it really only DU440 specific?

Best regards,
Stefan

=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================

Matthias Fuchs

author

2008-10-08 10:34 UTC #5 lore raw

PATCH 4/4 ppc4xx: Fix USB 2.0 phy reset sequence

Hi Stefan,

this might touch other boards as well. A patch for our PMC440 will come up later today.

I have a support case with AMCC about this and ask them If I shall provide a patch for sequoia as well. I expect that someone will contact you about this issue.

Matthias

Quoted 20 lines · Stefan Roese

Hi Matthias,
Quoted 3 lines · matthias.fuchs at esd-electronics.com
From: Matthias Fuchs <[email protected]>
This patch fixes USB 2.0 communication issues on some DU440 boards.
Is this a potential problem for other 440EPx boards as well? Or is it really only DU440 specific?
Best regards,
Stefan
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================

Stefan Roese

2008-10-08 11:14 UTC #6 lore raw

PATCH 4/4 ppc4xx: Fix USB 2.0 phy reset sequence

Quoted 6 lines · Matthias Fuchs

this might touch other boards as well. A patch for our PMC440 will come up later today.
I have a support case with AMCC about this and ask them If I shall provide a patch for sequoia as well. I expect that someone will contact you about this issue.

OK, thanks for clarifying.

Best regards,
Stefan

=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================

Stefan Roese

Applied

2008-10-10 07:44 UTC #7 lore raw

PATCH 4/4 ppc4xx: Fix USB 2.0 phy reset sequence

In reply to matthias.fuchs at esd-electronics.com

Quoted 3 lines · matthias.fuchs at esd-electronics.com

From: Matthias Fuchs <[email protected]>
This patch fixes USB 2.0 communication issues on some DU440 boards.

Applied to ppc4xx/master. Thanks.

Best regards,
Stefan

=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================

Stefan Roese

Applied

2008-10-10 07:44 UTC #8 lore raw

PATCH 3/4 ppc4xx: Add strapping mode for 667MHz CPU frequency on DU440 board

In reply to matthias.fuchs at esd-electronics.com

Quoted 1 line · matthias.fuchs at esd-electronics.com

From: Matthias Fuchs <[email protected]>

Applied to ppc4xx/master. Thanks.

Best regards,
Stefan

=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================

Stefan Roese

2008-10-08 09:50 UTC #9 lore raw

PATCH 2/4 ppc4xx: Fix DU440 GPIO configuration

In reply to matthias.fuchs at esd-electronics.com

Hi Matthias,

Quoted 12 lines · matthias.fuchs at esd-electronics.com

From: Matthias Fuchs <[email protected]>
Signed-off-by Matthias Fuchs <[email protected]>
---
 board/esd/du440/du440.c |   10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)
board/esd/du440/du440.c +0 -0
index 8765cc1..5cff9f5 100644

board/esd/du440/du440.c int board_early_init_f(void) · line 55

Quoted 5 lines

board/esd/du440/du440.c +1 -1

@@ -52,15 +52,15 @@ int board_early_init_f(void)
 	 * Setup the GPIO pins
 	 */
 	out_be32((void*)GPIO0_OR, 0x00000000 | CFG_GPIO0_EP_EEP);
-	out_be32((void*)GPIO0_TCR, 0x0000000f | CFG_GPIO0_EP_EEP);
+	out_be32((void*)GPIO0_TCR, 0x0000001f | CFG_GPIO0_EP_EEP);

You might want to switch to the 4xx-GPIO initialization via the CFG_4xx_GPIO_TABLE define at some time. This makes it much easier to configure the GPIO's correctly.

But if you don't want to do this right now, I can apply this current patch for now as a bug fix.

Best regards,
Stefan

=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================

Matthias Fuchs

author

2008-10-08 10:31 UTC #10 lore raw

PATCH 2/4 ppc4xx: Fix DU440 GPIO configuration

Hi Stefan,

I am aware of the CFG_4xx_GPIO_TABLE feature. I think there is also a TODO comment for this in my code. But right now I want to keep it as it is because of a lack of time.

Matthias

Quoted 38 lines · Stefan Roese

Hi Matthias,
Quoted 12 lines · matthias.fuchs at esd-electronics.com
From: Matthias Fuchs <[email protected]>
Signed-off-by Matthias Fuchs <[email protected]>
---
 board/esd/du440/du440.c |   10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)
board/esd/du440/du440.c +0 -0
index 8765cc1..5cff9f5 100644
board/esd/du440/du440.c int board_early_init_f(void) · line 55
Quoted 5 lines
board/esd/du440/du440.c +1 -1
@@ -52,15 +52,15 @@ int board_early_init_f(void)
 	 * Setup the GPIO pins
 	 */
 	out_be32((void*)GPIO0_OR, 0x00000000 | CFG_GPIO0_EP_EEP);
-	out_be32((void*)GPIO0_TCR, 0x0000000f | CFG_GPIO0_EP_EEP);
+	out_be32((void*)GPIO0_TCR, 0x0000001f | CFG_GPIO0_EP_EEP);
You might want to switch to the 4xx-GPIO initialization via the CFG_4xx_GPIO_TABLE define at some time. This makes it much easier to configure the GPIO's correctly.
But if you don't want to do this right now, I can apply this current patch for now as a bug fix.
Best regards,
Stefan
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================

Signature · 13 lines

-------------------------------------------------------------------------
Dipl.-Ing. Matthias Fuchs
Head of System Design

esd electronic system design gmbh
Vahrenwalder Str. 207 - 30165 Hannover - GERMANY
Phone: +49-511-37298-0 - Fax: +49-511-37298-68
Please visit our homepage http://www.esd.eu
Quality Products - Made in Germany
-------------------------------------------------------------------------
Gesch?ftsf?hrer: Klaus Detering, Dr. Werner Schulze
Amtsgericht Hannover HRB 51373 - VAT-ID DE 115672832
-------------------------------------------------------------------------

Stefan Roese

2008-10-08 11:14 UTC #11 lore raw

PATCH 2/4 ppc4xx: Fix DU440 GPIO configuration

Quoted 3 lines · Matthias Fuchs

I am aware of the CFG_4xx_GPIO_TABLE feature. I think there is also a TODO comment for this in my code. But right now I want to keep it as it is because of a lack of time.

OK, makes sense to me. I'll push your patches to the master branch for upstream merge later.

Best regards,
Stefan

=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================

Stefan Roese

Applied

2008-10-10 07:44 UTC #12 lore raw

PATCH 2/4 ppc4xx: Fix DU440 GPIO configuration

In reply to matthias.fuchs at esd-electronics.com

Quoted 1 line · matthias.fuchs at esd-electronics.com

From: Matthias Fuchs <[email protected]>

Applied to ppc4xx/master. Thanks.

Best regards,
Stefan

=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================

Stefan Roese

Applied

2008-10-10 07:44 UTC #13 lore raw

PATCH 1/4 ppc4xx: Update DU440 config

In reply to matthias.fuchs at esd-electronics.com

Quoted 1 line · matthias.fuchs at esd-electronics.com

From: Matthias Fuchs <[email protected]>

Applied to ppc4xx/master. Thanks.

Best regards,
Stefan

=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================