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rb532: gpio register offsets are relatives to GPIOBASE

PATCH New Florian Fainelli 3 participants 3 messages Oct 26, 2008 – Nov 1, 2008 MIPS

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Florian Fainelli

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#0 lore raw

PATCH 1/1 rb532: gpio register offsets are relatives to GPIOBASE

This patch fixes the wrong use of GPIO register offsets in devices.c. To avoid further problems, use gpio_get_value to return the NAND status instead of our own expanded code.

Signef-off-by Phil Sutter <[email protected]>
Signed-off-by Florian Fainelli <[email protected]>

---

arch/mips/include/asm/mach-rc32434/rb.h +7 -6
index 79e8ef6..0cb9466 100644
@@ -40,12 +40,13 @@
 #define BTCS		0x010040
 #define BTCOMPARE	0x010044
 #define GPIOBASE	0x050000
-#define GPIOCFG		0x050004
-#define GPIOD		0x050008
-#define GPIOILEVEL	0x05000C
-#define GPIOISTAT	0x050010
-#define GPIONMIEN	0x050014
-#define IMASK6		0x038038
+/* Offsets relative to GPIOBASE */
+#define GPIOCFG		0x04
+#define GPIOD		0x08
+#define GPIOILEVEL	0x0C
+#define GPIOISTAT	0x10
+#define GPIONMIEN	0x14
+#define IMASK6		0x38
 #define LO_WPX		(1 << 0)
 #define LO_ALE		(1 << 1)
 #define LO_CLE		(1 << 2)
arch/mips/rb532/devices.c +1 -1
index 31619c6..c40be04 100644
@@ -118,7 +118,7 @@ static struct platform_device cf_slot0 = {
 /* Resources and device for NAND */
 static int rb532_dev_ready(struct mtd_info *mtd)
 {
-	return readl(IDT434_REG_BASE + GPIOD) & GPIO_RDY;
+	return gpio_get_value(GPIO_RDY);
 }
 
 static void rb532_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
#1 lore raw

PATCH 1/1 rb532: gpio register offsets are relatives to GPIOBASE

From: Florian Fainelli <[email protected]>

This patch fixes the wrong use of GPIO register offsets in devices.c. To avoid further problems, use gpio_get_value to return the NAND status instead of our own expanded code.

Also define the zero offset of the alternate function register to allow consistent access.

Signef-off-by Phil Sutter <[email protected]>
Signed-off-by Florian Fainelli <[email protected]>
---
 arch/mips/include/asm/mach-rc32434/rb.h |   14 ++++++++------
 arch/mips/rb532/devices.c               |    2 +-
 2 files changed, 9 insertions(+), 7 deletions(-)
arch/mips/include/asm/mach-rc32434/rb.h +8 -6
index 79e8ef6..f25a849 100644
@@ -40,12 +40,14 @@
 #define BTCS		0x010040
 #define BTCOMPARE	0x010044
 #define GPIOBASE	0x050000
-#define GPIOCFG		0x050004
-#define GPIOD		0x050008
-#define GPIOILEVEL	0x05000C
-#define GPIOISTAT	0x050010
-#define GPIONMIEN	0x050014
-#define IMASK6		0x038038
+/* Offsets relative to GPIOBASE */
+#define GPIOFUNC	0x00
+#define GPIOCFG		0x04
+#define GPIOD		0x08
+#define GPIOILEVEL	0x0C
+#define GPIOISTAT	0x10
+#define GPIONMIEN	0x14
+#define IMASK6		0x38
 #define LO_WPX		(1 << 0)
 #define LO_ALE		(1 << 1)
 #define LO_CLE		(1 << 2)
arch/mips/rb532/devices.c +1 -1
index 31619c6..c40be04 100644
@@ -118,7 +118,7 @@ static struct platform_device cf_slot0 = {
 /* Resources and device for NAND */
 static int rb532_dev_ready(struct mtd_info *mtd)
 {
-	return readl(IDT434_REG_BASE + GPIOD) & GPIO_RDY;
+	return gpio_get_value(GPIO_RDY);
 }
 
 static void rb532_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
Signature · 1 line
1.5.6.4
Applied
#2 lore raw
Quoted 11 lines · Phil Sutter

From: Florian Fainelli <[email protected]>

This patch fixes the wrong use of GPIO register offsets in devices.c. To avoid further problems, use gpio_get_value to return the NAND status instead of our own expanded code.

Also define the zero offset of the alternate function register to allow consistent access.

Signef-off-by Phil Sutter <[email protected]>
Signed-off-by Florian Fainelli <[email protected]>

Thanks, applied - with the SOBs fixed up.

Ralf