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AT91CAP9/AT91SAM9 bugfixes for 2008.12

PATCH New Stelian Pop 3 participants 15 messages Oct 21, 2008 – Nov 6, 2008 Arm/Microchip (AT91) SoC support

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Stelian Pop

author
#0 lore raw

cover AT91CAP9/AT91SAM9 bugfixes for 2008.12

Hi,

The following patches correct a few issues mainly related to USB and serial initializations in the various AT91CAP9 / AT91SAM9 boards.

Please merge.

Thanks,

Stelian.

author
#1 lore raw

PATCH 1/1 AT91: Use AT91_CPU_CLOCK in displays

Introduce AT91_CPU_CLOCK and use it for displaying the CPU speed in the LCD driver.

Also make AT91_MAIN_CLOCK and AT91_MASTER_CLOCK reflect the corresponding board clocks.

Signed-off-by Stelian Pop <[email protected]>
---
 common/lcd.c                    |    2 +-
 include/configs/at91cap9adk.h   |    5 +++--
 include/configs/at91sam9260ek.h |    6 ++++--
 include/configs/at91sam9261ek.h |    5 +++--
 include/configs/at91sam9263ek.h |    5 +++--
 include/configs/at91sam9rlek.h  |    5 +++--
 6 files changed, 17 insertions(+), 11 deletions(-)
common/lcd.c +1 -1
index 25f8664..c6ced91 100644
@@ -837,7 +837,7 @@ static void *lcd_logo (void)
 
 	sprintf (info, "%s CPU at %s MHz",
 		AT91_CPU_NAME,
-		strmhz(temp, AT91_MAIN_CLOCK));
+		strmhz(temp, AT91_CPU_CLOCK));
 	lcd_drawchars (LCD_INFO_X, LCD_INFO_Y + VIDEO_FONT_HEIGHT * 3,
 					(uchar *)info, strlen(info));
include/configs/at91cap9adk.h +3 -2
index fd06245..1dbd3a4 100644
@@ -29,8 +29,9 @@
 
 /* ARM asynchronous clock */
 #define AT91_CPU_NAME		"AT91CAP9"
-#define AT91_MAIN_CLOCK		200000000	/* from 12 MHz crystal */
-#define AT91_MASTER_CLOCK	100000000	/* peripheral = main / 2 */
+#define AT91_MAIN_CLOCK		12000000	/* 12 MHz crystal */
+#define AT91_MASTER_CLOCK	100000000	/* peripheral */
+#define AT91_CPU_CLOCK		200000000	/* cpu */
 #define CFG_HZ			1000000		/* 1us resolution */
 
 #define AT91_SLOW_CLOCK		32768	/* slow clock */
include/configs/at91sam9260ek.h +4 -2
index 41d1da3..cb8857a 100644
@@ -28,8 +28,10 @@
 #define __CONFIG_H
 
 /* ARM asynchronous clock */
-#define AT91_MAIN_CLOCK		198656000	/* from 18.432 MHz crystal */
-#define AT91_MASTER_CLOCK	99328000	/* peripheral = main / 2 */
+#define AT91_CPU_NAME		"AT91SAM9260"
+#define AT91_MAIN_CLOCK		18432000	/* 18.432 MHz crystal */
+#define AT91_MASTER_CLOCK	100000000	/* peripheral */
+#define AT91_CPU_CLOCK		200000000	/* cpu */
 #define CFG_HZ			1000000		/* 1us resolution */
 
 #define AT91_SLOW_CLOCK		32768	/* slow clock */
include/configs/at91sam9261ek.h +3 -2
index 80c3b03..92e134d 100644
@@ -29,8 +29,9 @@
 
 /* ARM asynchronous clock */
 #define AT91_CPU_NAME		"AT91SAM9261"
-#define AT91_MAIN_CLOCK		198656000	/* from 18.432 MHz crystal */
-#define AT91_MASTER_CLOCK	99328000	/* peripheral = main / 2 */
+#define AT91_MAIN_CLOCK		18432000	/* 18.432 MHz crystal */
+#define AT91_MASTER_CLOCK	100000000	/* peripheral */
+#define AT91_CPU_CLOCK		200000000	/* cpu */
 #define CFG_HZ			1000000		/* 1us resolution */
 
 #define AT91_SLOW_CLOCK		32768	/* slow clock */
include/configs/at91sam9263ek.h +3 -2
index b4368ef..c914571 100644
@@ -29,8 +29,9 @@
 
 /* ARM asynchronous clock */
 #define AT91_CPU_NAME		"AT91SAM9263"
-#define AT91_MAIN_CLOCK		199919000	/* from 16.367 MHz crystal */
-#define AT91_MASTER_CLOCK	99959500	/* peripheral = main / 2 */
+#define AT91_MAIN_CLOCK		16367660	/* 16.367 MHz crystal */
+#define AT91_MASTER_CLOCK	100000000	/* peripheral */
+#define AT91_CPU_CLOCK		200000000	/* cpu */
 #define CFG_HZ			1000000		/* 1us resolution */
 
 #define AT91_SLOW_CLOCK		32768	/* slow clock */
include/configs/at91sam9rlek.h +3 -2
index 32168dc..9bcd2db 100644
@@ -29,8 +29,9 @@
 
 /* ARM asynchronous clock */
 #define AT91_CPU_NAME		"AT91SAM9RL"
-#define AT91_MAIN_CLOCK		200000000	/* from 12.000 MHz crystal */
-#define AT91_MASTER_CLOCK	100000000	/* peripheral = main / 2 */
+#define AT91_MAIN_CLOCK		12000000	/* 12 MHz crystal */
+#define AT91_MASTER_CLOCK	100000000	/* peripheral */
+#define AT91_CPU_CLOCK		200000000	/* cpu */
 #define CFG_HZ			1000000		/* 1us resolution */
 
 #define AT91_SLOW_CLOCK		32768	/* slow clock */
Signature · 1 line
1.5.4.3
#2 lore raw

PATCH 1/1 AT91: Use AT91_CPU_CLOCK in displays

Quoted 7 lines · Stelian Pop

Introduce AT91_CPU_CLOCK and use it for displaying the CPU speed in the LCD driver.

Also make AT91_MAIN_CLOCK and AT91_MASTER_CLOCK reflect the corresponding board clocks.

Signed-off-by Stelian Pop <[email protected]>
Quoted 8 lines
---
 common/lcd.c                    |    2 +-
 include/configs/at91cap9adk.h   |    5 +++--
 include/configs/at91sam9260ek.h |    6 ++++--
 include/configs/at91sam9261ek.h |    5 +++--
 include/configs/at91sam9263ek.h |    5 +++--
 include/configs/at91sam9rlek.h  |    5 +++--
 6 files changed, 17 insertions(+), 11 deletions(-)

failed to apply

could you rebase it against u-boot-at91?

Best Regards,
J.

author
#3 lore raw

PATCH 1/1 AT91: Use AT91_CPU_CLOCK in displays

Le jeudi 06 novembre 2008 ? 20:29 +0100, Jean-Christophe PLAGNIOL-VILLARD a ?crit :

Quoted 16 lines · Stelian Pop
Quoted 7 lines

Introduce AT91_CPU_CLOCK and use it for displaying the CPU speed in the LCD driver.

Also make AT91_MAIN_CLOCK and AT91_MASTER_CLOCK reflect the corresponding board clocks.

Signed-off-by Stelian Pop <[email protected]>
Quoted 8 lines
---
 common/lcd.c                    |    2 +-
 include/configs/at91cap9adk.h   |    5 +++--
 include/configs/at91sam9260ek.h |    6 ++++--
 include/configs/at91sam9261ek.h |    5 +++--
 include/configs/at91sam9263ek.h |    5 +++--
 include/configs/at91sam9rlek.h  |    5 +++--
 6 files changed, 17 insertions(+), 11 deletions(-)
Quoted 3 lines

failed to apply

could you rebase it against u-boot-at91

Here it is.

Thanks,

Stelian.

-----------------------------

#4 lore raw

PATCH 1/1 AT91: Use AT91_CPU_CLOCK in displays

Quoted 20 lines · Stelian Pop

Le jeudi 06 novembre 2008 ? 20:29 +0100, Jean-Christophe PLAGNIOL-VILLARD a ?crit :

Quoted 18 lines · Stelian Pop
Quoted 7 lines

Introduce AT91_CPU_CLOCK and use it for displaying the CPU speed in the LCD driver.

Also make AT91_MAIN_CLOCK and AT91_MASTER_CLOCK reflect the corresponding board clocks.

Signed-off-by Stelian Pop <[email protected]>
Quoted 8 lines
---
 common/lcd.c                    |    2 +-
 include/configs/at91cap9adk.h   |    5 +++--
 include/configs/at91sam9260ek.h |    6 ++++--
 include/configs/at91sam9261ek.h |    5 +++--
 include/configs/at91sam9263ek.h |    5 +++--
 include/configs/at91sam9rlek.h  |    5 +++--
 6 files changed, 17 insertions(+), 11 deletions(-)

failed to apply

Quoted 8 lines
Quoted 1 line

could you rebase it against u-boot-at91

Here it is.

Thanks,

Stelian.

Applied to u-boot-at91

Best Regards,
J.

author
#5 lore raw

PATCH 1/1 AT91: Enable PLLB for USB

At least some (old ?) versions of the AT91Bootstrap do not set up the PLLB correctly to 48 MHz in order to make USB host function correctly.

This patch sets up the PLLB to the same values Linux uses, and makes USB work ok on the following CPUs:
- AT91CAP9
- AT91SAM9260
- AT91SAM9263

This patch also defines CONFIG_USB_STORAGE and CONFIG_CMD_FAT for all the relevant AT91CAP9/AT91SAM9 boards.

Signed-off-by Stelian Pop <[email protected]>
---
 cpu/arm926ejs/at91/usb.c        |   18 ++++++++++++++++++
 include/configs/at91cap9adk.h   |    3 +++
 include/configs/at91sam9260ek.h |    2 ++
 include/configs/at91sam9261ek.h |    1 +
 include/configs/at91sam9263ek.h |    2 ++
 5 files changed, 26 insertions(+), 0 deletions(-)
cpu/arm926ejs/at91/usb.c +18 -0
index 2a92f73..c02334f 100644
@@ -31,6 +31,15 @@
 
 int usb_cpu_init(void)
 {
+
+#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
+    defined(CONFIG_AT91SAM9263)
+	/* Enable PLLB */
+	at91_sys_write(AT91_CKGR_PLLBR, CFG_AT91_PLLB);
+	while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
+		;
+#endif
+
 	/* Enable USB host clock. */
 	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_UHP);
 #ifdef CONFIG_AT91SAM9261

@@ -51,6 +60,15 @@ int usb_cpu_stop(void)
 #else
 	at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP);
 #endif
+
+#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
+    defined(CONFIG_AT91SAM9263)
+	/* Disable PLLB */
+	at91_sys_write(AT91_CKGR_PLLBR, 0);
+	while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != 0)
+		;
+#endif
+
 	return 0;
 }
include/configs/at91cap9adk.h +3 -0
index 1dbd3a4..47145d8 100644
@@ -32,6 +32,7 @@
 #define AT91_MAIN_CLOCK		12000000	/* 12 MHz crystal */
 #define AT91_MASTER_CLOCK	100000000	/* peripheral */
 #define AT91_CPU_CLOCK		200000000	/* cpu */
+#define CFG_AT91_PLLB		0x10073e01	/* PLLB settings for USB */
 #define CFG_HZ			1000000		/* 1us resolution */
 
 #define AT91_SLOW_CLOCK		32768	/* slow clock */

@@ -137,6 +138,8 @@
 #define CFG_USB_OHCI_REGS_BASE		0x00700000	/* AT91_BASE_UHP */
 #define CFG_USB_OHCI_SLOT_NAME		"at91cap9"
 #define CFG_USB_OHCI_MAX_ROOT_PORTS	2
+#define CONFIG_USB_STORAGE		1
+#define CONFIG_CMD_FAT			1
 
 #define CFG_LOAD_ADDR			0x72000000	/* load address */
include/configs/at91sam9260ek.h +2 -0
index cb8857a..cd09288 100644
@@ -32,6 +32,7 @@
 #define AT91_MAIN_CLOCK		18432000	/* 18.432 MHz crystal */
 #define AT91_MASTER_CLOCK	100000000	/* peripheral */
 #define AT91_CPU_CLOCK		200000000	/* cpu */
+#define CFG_AT91_PLLB		0x107c3e18	/* PLLB settings for USB */
 #define CFG_HZ			1000000		/* 1us resolution */
 
 #define AT91_SLOW_CLOCK		32768	/* slow clock */

@@ -123,6 +124,7 @@
 #define CFG_USB_OHCI_SLOT_NAME		"at91sam9260"
 #define CFG_USB_OHCI_MAX_ROOT_PORTS	2
 #define CONFIG_USB_STORAGE		1
+#define CONFIG_CMD_FAT			1
 
 #define CFG_LOAD_ADDR			0x22000000	/* load address */
include/configs/at91sam9261ek.h +1 -0
index 92e134d..aa6c6ab 100644
@@ -137,6 +137,7 @@
 #define CFG_USB_OHCI_SLOT_NAME		"at91sam9261"
 #define CFG_USB_OHCI_MAX_ROOT_PORTS	2
 #define CONFIG_USB_STORAGE		1
+#define CONFIG_CMD_FAT			1
 
 #define CFG_LOAD_ADDR			0x22000000	/* load address */
include/configs/at91sam9263ek.h +2 -0
index c914571..1e9c5c5 100644
@@ -32,6 +32,7 @@
 #define AT91_MAIN_CLOCK		16367660	/* 16.367 MHz crystal */
 #define AT91_MASTER_CLOCK	100000000	/* peripheral */
 #define AT91_CPU_CLOCK		200000000	/* cpu */
+#define CFG_AT91_PLLB		0x133a3e8d	/* PLLB settings for USB */
 #define CFG_HZ			1000000		/* 1us resolution */
 
 #define AT91_SLOW_CLOCK		32768	/* slow clock */

@@ -143,6 +144,7 @@
 #define CFG_USB_OHCI_SLOT_NAME		"at91sam9263"
 #define CFG_USB_OHCI_MAX_ROOT_PORTS	2
 #define CONFIG_USB_STORAGE		1
+#define CONFIG_CMD_FAT			1
 
 #define CFG_LOAD_ADDR			0x22000000	/* load address */
Signature · 1 line
1.5.4.3
#6 lore raw

PATCH 1/1 AT91: Enable PLLB for USB

Hello Stelian,

2008/10/21 Stelian Pop <[email protected]>:

Quoted 8 lines

At least some (old ?) versions of the AT91Bootstrap do not set up the PLLB correctly to 48 MHz in order to make USB host function correctly.

This patch sets up the PLLB to the same values Linux uses, and makes USB work ok on the following CPUs:
- AT91CAP9
- AT91SAM9260
- AT91SAM9263

Are all your USB stick problems solved by now? Including that stick that did not work?

I noticed that (with my latest patchset) sometimes a cold boot result in a non-working USB stick on my boards, but a hard reset always worked...

I will try your patches tomorrow, but I have one question:

Quoted 3 lines

#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */

 #define AT91_MASTER_CLOCK      100000000       /* peripheral */
 #define AT91_CPU_CLOCK         200000000       /* cpu */

Are such nice rounded values possible with that unrounded crystal?

Looking at sam9261 I see:

#define AT91_MAIN_CLOCK         198656000       /* from 18.432 MHz crystal */
#define AT91_MASTER_CLOCK       99328000        /* peripheral = main / 2

This seems more logical to me, but I may be wrong...

Kind Regards,

Remy

Quoted 126 lines

This patch also defines CONFIG_USB_STORAGE and CONFIG_CMD_FAT for all the relevant AT91CAP9/AT91SAM9 boards.

Signed-off-by Stelian Pop <[email protected]>
---
 cpu/arm926ejs/at91/usb.c        |   18 ++++++++++++++++++
 include/configs/at91cap9adk.h   |    3 +++
 include/configs/at91sam9260ek.h |    2 ++
 include/configs/at91sam9261ek.h |    1 +
 include/configs/at91sam9263ek.h |    2 ++
 5 files changed, 26 insertions(+), 0 deletions(-)
cpu/arm926ejs/at91/usb.c +18 -0
index 2a92f73..c02334f 100644
@@ -31,6 +31,15 @@
 
 int usb_cpu_init(void)
 {
+
+#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
+    defined(CONFIG_AT91SAM9263)
+       /* Enable PLLB */
+       at91_sys_write(AT91_CKGR_PLLBR, CFG_AT91_PLLB);
+       while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
+               ;
+#endif
+
       /* Enable USB host clock. */
       at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_UHP);
 #ifdef CONFIG_AT91SAM9261

@@ -51,6 +60,15 @@ int usb_cpu_stop(void)
 #else
       at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP);
 #endif
+
+#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
+    defined(CONFIG_AT91SAM9263)
+       /* Disable PLLB */
+       at91_sys_write(AT91_CKGR_PLLBR, 0);
+       while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != 0)
+               ;
+#endif
+
       return 0;
 }
include/configs/at91cap9adk.h +3 -0
index 1dbd3a4..47145d8 100644
@@ -32,6 +32,7 @@
 #define AT91_MAIN_CLOCK                12000000        /* 12 MHz crystal */
 #define AT91_MASTER_CLOCK      100000000       /* peripheral */
 #define AT91_CPU_CLOCK         200000000       /* cpu */
+#define CFG_AT91_PLLB          0x10073e01      /* PLLB settings for USB */
 #define CFG_HZ                 1000000         /* 1us resolution */
 
 #define AT91_SLOW_CLOCK                32768   /* slow clock */

@@ -137,6 +138,8 @@
 #define CFG_USB_OHCI_REGS_BASE         0x00700000      /* AT91_BASE_UHP */
 #define CFG_USB_OHCI_SLOT_NAME         "at91cap9"
 #define CFG_USB_OHCI_MAX_ROOT_PORTS    2
+#define CONFIG_USB_STORAGE             1
+#define CONFIG_CMD_FAT                 1
 
 #define CFG_LOAD_ADDR                  0x72000000      /* load address */
include/configs/at91sam9260ek.h +2 -0
index cb8857a..cd09288 100644
@@ -32,6 +32,7 @@
 #define AT91_MAIN_CLOCK                18432000        /* 18.432 MHz crystal */
 #define AT91_MASTER_CLOCK      100000000       /* peripheral */
 #define AT91_CPU_CLOCK         200000000       /* cpu */
+#define CFG_AT91_PLLB          0x107c3e18      /* PLLB settings for USB */
 #define CFG_HZ                 1000000         /* 1us resolution */
 
 #define AT91_SLOW_CLOCK                32768   /* slow clock */

@@ -123,6 +124,7 @@
 #define CFG_USB_OHCI_SLOT_NAME         "at91sam9260"
 #define CFG_USB_OHCI_MAX_ROOT_PORTS    2
 #define CONFIG_USB_STORAGE             1
+#define CONFIG_CMD_FAT                 1
 
 #define CFG_LOAD_ADDR                  0x22000000      /* load address */
include/configs/at91sam9261ek.h +1 -0
index 92e134d..aa6c6ab 100644
@@ -137,6 +137,7 @@
 #define CFG_USB_OHCI_SLOT_NAME         "at91sam9261"
 #define CFG_USB_OHCI_MAX_ROOT_PORTS    2
 #define CONFIG_USB_STORAGE             1
+#define CONFIG_CMD_FAT                 1
 
 #define CFG_LOAD_ADDR                  0x22000000      /* load address */
include/configs/at91sam9263ek.h +2 -1
index c914571..1e9c5c5 100644
@@ -32,6 +32,7 @@
 #define AT91_MAIN_CLOCK                16367660        /* 16.367 MHz crystal */
 #define AT91_MASTER_CLOCK      100000000       /* peripheral */
 #define AT91_CPU_CLOCK         200000000       /* cpu */
+#define CFG_AT91_PLLB          0x133a3e8d      /* PLLB settings for USB */
 #define CFG_HZ                 1000000         /* 1us resolution */
 
 #define AT91_SLOW_CLOCK                32768   /* slow clock */

@@ -143,6 +144,7 @@
 #define CFG_USB_OHCI_SLOT_NAME         "at91sam9263"
 #define CFG_USB_OHCI_MAX_ROOT_PORTS    2
 #define CONFIG_USB_STORAGE             1
+#define CONFIG_CMD_FAT                 1
 
 #define CFG_LOAD_ADDR                  0x22000000      /* load address */
 
--

1.5.4.3

author
#7 lore raw

PATCH 1/1 AT91: Enable PLLB for USB

Le mardi 21 octobre 2008 ? 19:54 +0200, Remy Bohmer a ?crit :

Quoted 1 line

Hello Stelian,

Hi Remy,

Quoted 2 lines

Are all your USB stick problems solved by now? Including that stick that did not work?

Nope. I still have one (kinda old) stick which does not work, on any AT91 board. But I suspect the issues are no longer in the board/cpu code, but in the core USB layer.

Quoted 9 lines

I will try your patches tomorrow, but I have one question:

Quoted 3 lines

#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */

 #define AT91_MASTER_CLOCK      100000000       /* peripheral */
 #define AT91_CPU_CLOCK         200000000       /* cpu */

Are such nice rounded values possible with that unrounded crystal?

Looking at sam9261 I see:
#define AT91_MAIN_CLOCK 198656000 /* from 18.432 MHz crystal */

This one is clearly wrong. 18.432 MHz is 18432000 Hz.

Quoted 1 line

#define AT91_MASTER_CLOCK 99328000 /* peripheral = main / 2

And the master clock is not main / 2, but PLLA / 2, where PLLA is initialized by the bootstrap to (main * 0x60) / 9.

This gives:

	PLLA = 18432000 * 0x60 / 9 = 196608000 Hz
	MASTER = 196608000 / 2 = 98304000 Hz.

The defines in the header files contain rounded values, I don't think it's too important to be precise here.

Stelian.

Signature · 1 line
Stelian Pop <[email protected]>
#8 lore raw

PATCH 1/1 AT91: Enable PLLB for USB

In reply to Stelian Pop
Quoted 12 lines · Stelian Pop

At least some (old ?) versions of the AT91Bootstrap do not set up the PLLB correctly to 48 MHz in order to make USB host function correctly.

This patch sets up the PLLB to the same values Linux uses, and makes USB work ok on the following CPUs:
- AT91CAP9
- AT91SAM9260
- AT91SAM9263

This patch also defines CONFIG_USB_STORAGE and CONFIG_CMD_FAT for all the relevant AT91CAP9/AT91SAM9 boards.

Quoted 8 lines
Signed-off-by Stelian Pop <[email protected]>
---
 cpu/arm926ejs/at91/usb.c        |   18 ++++++++++++++++++
 include/configs/at91cap9adk.h   |    3 +++
 include/configs/at91sam9260ek.h |    2 ++
 include/configs/at91sam9261ek.h |    1 +
 include/configs/at91sam9263ek.h |    2 ++
 5 files changed, 26 insertions(+), 0 deletions(-)

failed to apply

could you rebase it against u-boot-at91?

Best Regards,
J.

author
#9 lore raw

PATCH 1/1 AT91: Enable PLLB for USB

Le jeudi 06 novembre 2008 ? 20:27 +0100, Jean-Christophe PLAGNIOL-VILLARD a ?crit :

Quoted 22 lines · Stelian Pop
Quoted 12 lines

At least some (old ?) versions of the AT91Bootstrap do not set up the PLLB correctly to 48 MHz in order to make USB host function correctly.

This patch sets up the PLLB to the same values Linux uses, and makes USB work ok on the following CPUs:
- AT91CAP9
- AT91SAM9260
- AT91SAM9263

This patch also defines CONFIG_USB_STORAGE and CONFIG_CMD_FAT for all the relevant AT91CAP9/AT91SAM9 boards.

Quoted 8 lines
Signed-off-by Stelian Pop <[email protected]>
---
 cpu/arm926ejs/at91/usb.c        |   18 ++++++++++++++++++
 include/configs/at91cap9adk.h   |    3 +++
 include/configs/at91sam9260ek.h |    2 ++
 include/configs/at91sam9261ek.h |    1 +
 include/configs/at91sam9263ek.h |    2 ++
 5 files changed, 26 insertions(+), 0 deletions(-)
Quoted 3 lines

failed to apply

could you rebase it against u-boot-at91?

Here it is.

Thanks,

Stelian.

--------------------------------

#10 lore raw

PATCH 1/1 AT91: Enable PLLB for USB

Quoted 26 lines · Stelian Pop

Le jeudi 06 novembre 2008 ? 20:27 +0100, Jean-Christophe PLAGNIOL-VILLARD a ?crit :

Quoted 24 lines · Stelian Pop
Quoted 12 lines

At least some (old ?) versions of the AT91Bootstrap do not set up the PLLB correctly to 48 MHz in order to make USB host function correctly.

This patch sets up the PLLB to the same values Linux uses, and makes USB work ok on the following CPUs:
- AT91CAP9
- AT91SAM9260
- AT91SAM9263

This patch also defines CONFIG_USB_STORAGE and CONFIG_CMD_FAT for all the relevant AT91CAP9/AT91SAM9 boards.

Quoted 8 lines
Signed-off-by Stelian Pop <[email protected]>
---
 cpu/arm926ejs/at91/usb.c        |   18 ++++++++++++++++++
 include/configs/at91cap9adk.h   |    3 +++
 include/configs/at91sam9260ek.h |    2 ++
 include/configs/at91sam9261ek.h |    1 +
 include/configs/at91sam9263ek.h |    2 ++
 5 files changed, 26 insertions(+), 0 deletions(-)

failed to apply

Quoted 7 lines
Quoted 1 line

could you rebase it against u-boot-at91?

Here it is.

Thanks,

Stelian.

Applied to u-boot-at91

Best Regards,
J.

author
#11 lore raw

PATCH 1/1 AT91: Replace AT91_BASE_EMAC by the board specific values.

AT91_BASE_EMAC is never used outside the board specific files, so replace its usage by the board specific AT91xxx_BASE_EMAC.

Signed-off-by Stelian Pop <[email protected]>
---
 board/atmel/at91cap9adk/at91cap9adk.c     |    2 +-
 board/atmel/at91sam9260ek/at91sam9260ek.c |    2 +-
 board/atmel/at91sam9263ek/at91sam9263ek.c |    2 +-
 include/asm-arm/arch-at91/hardware.h      |    3 ---
 4 files changed, 3 insertions(+), 6 deletions(-)
board/atmel/at91cap9adk/at91cap9adk.c +1 -1
index 787d64d..0f39de6 100644
@@ -383,7 +383,7 @@ int board_eth_init(bd_t *bis)
 {
 	int rc = 0;
 #ifdef CONFIG_MACB
-	rc = macb_eth_initialize(0, (void *)AT91_BASE_EMAC, 0x00);
+	rc = macb_eth_initialize(0, (void *)AT91CAP9_BASE_EMAC, 0x00);
 #endif
 	return rc;
 }
board/atmel/at91sam9260ek/at91sam9260ek.c +1 -1
index 913e3fb..25a33b2 100644
@@ -255,7 +255,7 @@ int board_eth_init(bd_t *bis)
 {
 	int rc = 0;
 #ifdef CONFIG_MACB
-	rc = macb_eth_initialize(0, (void *)AT91_BASE_EMAC, 0x00);
+	rc = macb_eth_initialize(0, (void *)AT91SAM9260_BASE_EMAC, 0x00);
 #endif
 	return rc;
 }
board/atmel/at91sam9263ek/at91sam9263ek.c +1 -1
index c705074..f5718df 100644
@@ -315,7 +315,7 @@ int board_eth_init(bd_t *bis)
 {
 	int rc = 0;
 #ifdef CONFIG_MACB
-	rc = macb_eth_initialize(0, (void *)AT91_BASE_EMAC, 0x00);
+	rc = macb_eth_initialize(0, (void *)AT91SAM9263_BASE_EMAC, 0x00);
 #endif
 	return rc;
 }
include/asm-arm/arch-at91/hardware.h +0 -3
index f312419..b881e4e 100644
@@ -20,7 +20,6 @@
 #include <asm/arch/at91rm9200.h>
 #elif defined(CONFIG_AT91SAM9260)
 #include <asm/arch/at91sam9260.h>
-#define AT91_BASE_EMAC	AT91SAM9260_BASE_EMAC
 #define AT91_BASE_SPI	AT91SAM9260_BASE_SPI0
 #define AT91_ID_UHP	AT91SAM9260_ID_UHP
 #define AT91_PMC_UHP	AT91SAM926x_PMC_UHP

@@ -31,7 +30,6 @@
 #define AT91_PMC_UHP	AT91SAM926x_PMC_UHP
 #elif defined(CONFIG_AT91SAM9263)
 #include <asm/arch/at91sam9263.h>
-#define AT91_BASE_EMAC	AT91SAM9263_BASE_EMAC
 #define AT91_BASE_SPI	AT91SAM9263_BASE_SPI0
 #define AT91_ID_UHP	AT91SAM9263_ID_UHP
 #define AT91_PMC_UHP	AT91SAM926x_PMC_UHP

@@ -41,7 +39,6 @@
 #define AT91_ID_UHP	AT91SAM9RL_ID_UHP
 #elif defined(CONFIG_AT91CAP9)
 #include <asm/arch/at91cap9.h>
-#define AT91_BASE_EMAC	AT91CAP9_BASE_EMAC
 #define AT91_BASE_SPI	AT91CAP9_BASE_SPI0
 #define AT91_ID_UHP	AT91CAP9_ID_UHP
 #define AT91_PMC_UHP	AT91CAP9_PMC_UHP
Signature · 1 line
1.5.4.3
#12 lore raw

PATCH 1/1 AT91: Replace AT91_BASE_EMAC by the board specific values.

Quoted 10 lines · Stelian Pop

AT91_BASE_EMAC is never used outside the board specific files, so replace its usage by the board specific AT91xxx_BASE_EMAC.

Signed-off-by Stelian Pop <[email protected]>
---
 board/atmel/at91cap9adk/at91cap9adk.c     |    2 +-
 board/atmel/at91sam9260ek/at91sam9260ek.c |    2 +-
 board/atmel/at91sam9263ek/at91sam9263ek.c |    2 +-
 include/asm-arm/arch-at91/hardware.h      |    3 ---
 4 files changed, 3 insertions(+), 6 deletions(-)

applied to u-boot-at91

Best Regards,
J.

author
#13 lore raw

PATCH 1/1 AT91: Replace (undefined) AT91_ID_US* by the board specific values.

AT91_ID_US0 / AT91_ID_US1 / AT91_ID_US2 were used but never defined. Since they are never used outside the board specific files, they can be replaced by the board specific AT91xxx_ID_US0 / AT91xxx_ID_US1 / AT91xxx_ID_US2.

Bug spotted by Jesus Alvarez <[email protected]>.

Signed-off-by Stelian Pop <[email protected]>
---
 board/atmel/at91cap9adk/at91cap9adk.c     |    6 +++---
 board/atmel/at91sam9260ek/at91sam9260ek.c |    6 +++---
 board/atmel/at91sam9261ek/at91sam9261ek.c |    6 +++---
 board/atmel/at91sam9263ek/at91sam9263ek.c |    6 +++---
 board/atmel/at91sam9rlek/at91sam9rlek.c   |    6 +++---
 5 files changed, 15 insertions(+), 15 deletions(-)
board/atmel/at91cap9adk/at91cap9adk.c +3 -3
index 0f39de6..57fe617 100644
@@ -52,19 +52,19 @@ static void at91cap9_serial_hw_init(void)
 #ifdef CONFIG_USART0
 	at91_set_A_periph(AT91_PIN_PA22, 1);		/* TXD0 */
 	at91_set_A_periph(AT91_PIN_PA23, 0);		/* RXD0 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0);
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US0);
 #endif
 
 #ifdef CONFIG_USART1
 	at91_set_A_periph(AT91_PIN_PD0, 1);		/* TXD1 */
 	at91_set_A_periph(AT91_PIN_PD1, 0);		/* RXD1 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1);
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US1);
 #endif
 
 #ifdef CONFIG_USART2
 	at91_set_A_periph(AT91_PIN_PD2, 1);		/* TXD2 */
 	at91_set_A_periph(AT91_PIN_PD3, 0);		/* RXD2 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2);
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US2);
 #endif
 
 #ifdef CONFIG_USART3	/* DBGU */
board/atmel/at91sam9260ek/at91sam9260ek.c +3 -3
index 25a33b2..ca1f11a 100644
@@ -48,19 +48,19 @@ static void at91sam9260ek_serial_hw_init(void)
 #ifdef CONFIG_USART0
 	at91_set_A_periph(AT91_PIN_PB4, 1);		/* TXD0 */
 	at91_set_A_periph(AT91_PIN_PB5, 0);		/* RXD0 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0);
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US0);
 #endif
 
 #ifdef CONFIG_USART1
 	at91_set_A_periph(AT91_PIN_PB6, 1);		/* TXD1 */
 	at91_set_A_periph(AT91_PIN_PB7, 0);		/* RXD1 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1);
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US1);
 #endif
 
 #ifdef CONFIG_USART2
 	at91_set_A_periph(AT91_PIN_PB8, 1);		/* TXD2 */
 	at91_set_A_periph(AT91_PIN_PB9, 0);		/* RXD2 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2);
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US2);
 #endif
 
 #ifdef CONFIG_USART3	/* DBGU */
board/atmel/at91sam9261ek/at91sam9261ek.c +3 -3
index 647aab5..436f041 100644
@@ -48,19 +48,19 @@ static void at91sam9261ek_serial_hw_init(void)
 #ifdef CONFIG_USART0
 	at91_set_A_periph(AT91_PIN_PC8, 1);		/* TXD0 */
 	at91_set_A_periph(AT91_PIN_PC9, 0);		/* RXD0 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0);
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US0);
 #endif
 
 #ifdef CONFIG_USART1
 	at91_set_A_periph(AT91_PIN_PC12, 1);		/* TXD1 */
 	at91_set_A_periph(AT91_PIN_PC13, 0);		/* RXD1 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1);
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US1);
 #endif
 
 #ifdef CONFIG_USART2
 	at91_set_A_periph(AT91_PIN_PC14, 1);		/* TXD2 */
 	at91_set_A_periph(AT91_PIN_PC15, 0);		/* RXD2 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2);
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US2);
 #endif
 
 #ifdef CONFIG_USART3	/* DBGU */
board/atmel/at91sam9263ek/at91sam9263ek.c +3 -3
index f5718df..3de6b81 100644
@@ -51,19 +51,19 @@ static void at91sam9263ek_serial_hw_init(void)
 #ifdef CONFIG_USART0
 	at91_set_A_periph(AT91_PIN_PA26, 1);		/* TXD0 */
 	at91_set_A_periph(AT91_PIN_PA27, 0);		/* RXD0 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0);
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US0);
 #endif
 
 #ifdef CONFIG_USART1
 	at91_set_A_periph(AT91_PIN_PD0, 1);		/* TXD1 */
 	at91_set_A_periph(AT91_PIN_PD1, 0);		/* RXD1 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1);
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US1);
 #endif
 
 #ifdef CONFIG_USART2
 	at91_set_A_periph(AT91_PIN_PD2, 1);		/* TXD2 */
 	at91_set_A_periph(AT91_PIN_PD3, 0);		/* RXD2 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2);
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US2);
 #endif
 
 #ifdef CONFIG_USART3	/* DBGU */
board/atmel/at91sam9rlek/at91sam9rlek.c +3 -3
index 509e7c3..5869ae2 100644
@@ -48,19 +48,19 @@ static void at91sam9rlek_serial_hw_init(void)
 #ifdef CONFIG_USART0
 	at91_set_A_periph(AT91_PIN_PA6, 1);		/* TXD0 */
 	at91_set_A_periph(AT91_PIN_PA7, 0);		/* RXD0 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0);
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US0);
 #endif
 
 #ifdef CONFIG_USART1
 	at91_set_A_periph(AT91_PIN_PA11, 1);		/* TXD1 */
 	at91_set_A_periph(AT91_PIN_PA12, 0);		/* RXD1 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1);
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US1);
 #endif
 
 #ifdef CONFIG_USART2
 	at91_set_A_periph(AT91_PIN_PA13, 1);		/* TXD2 */
 	at91_set_A_periph(AT91_PIN_PA14, 0);		/* RXD2 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2);
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US2);
 #endif
 
 #ifdef CONFIG_USART3	/* DBGU */
Signature · 1 line
1.5.4.3
#14 lore raw

PATCH 1/1 AT91: Replace (undefined) AT91_ID_US* by the board specific values.

Quoted 7 lines · Stelian Pop

AT91_ID_US0 / AT91_ID_US1 / AT91_ID_US2 were used but never defined. Since they are never used outside the board specific files, they can be replaced by the board specific AT91xxx_ID_US0 / AT91xxx_ID_US1 / AT91xxx_ID_US2.

Bug spotted by Jesus Alvarez <[email protected]>.

Quoted 8 lines
Signed-off-by Stelian Pop <[email protected]>
---
 board/atmel/at91cap9adk/at91cap9adk.c     |    6 +++---
 board/atmel/at91sam9260ek/at91sam9260ek.c |    6 +++---
 board/atmel/at91sam9261ek/at91sam9261ek.c |    6 +++---
 board/atmel/at91sam9263ek/at91sam9263ek.c |    6 +++---
 board/atmel/at91sam9rlek/at91sam9rlek.c   |    6 +++---
 5 files changed, 15 insertions(+), 15 deletions(-)

applied to u-boot-at91

Best Regards,
J.