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x86, bts: DS and BTS initialization

PATCH In review Markus Metzger 2 participants 2 messages Nov 9, 2008 – Nov 10, 2008

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x86 ptrace support
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Markus Metzger

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#0 lore raw

PATCH 1/1 x86, bts: DS and BTS initialization

Move BTS initialisation out of an #ifdef CONFIG_X86_64 guard.

Assume core2 BTS and DS layout for future models of family 6 processors.

Signed-off-by Markus Metzger <[email protected]>

---

arch/x86/kernel/ds.c +4 -5
Index: gits/arch/x86/kernel/ds.c
===================================================================
@@ -821,17 +821,16 @@
 	switch (c->x86) {
 	case 0x6:
 		switch (c->x86_model) {
+		case 0 ... 0xC:
+			/* sorry, don't know about them */
+			break;
 		case 0xD:
 		case 0xE: /* Pentium M */
 			ds_configure(&ds_cfg_var);
 			break;
-		case 0xF: /* Core2 */
-		case 0x1C: /* Atom */
+		default: /* Core2, Atom, ... */
 			ds_configure(&ds_cfg_64);
 			break;
-		default:
-			/* sorry, don't know about them */
-			break;
 		}
 		break;
 	case 0xF:

Index: gits/arch/x86/kernel/ptrace.c
===================================================================
--- gits.orig/arch/x86/kernel/ptrace.c 2008-11-09 10:55:15.000000000
-0100
+++ gits/arch/x86/kernel/ptrace.c 2008-11-09 12:40:57.000000000 -0100
@@ -929,17 +929,16 @@
switch (c->x86) {
case 0x6:
switch (c->x86_model) {
+ case 0 ... 0xC:
+ /* sorry, don't know about them */
+ break;
case 0xD:
case 0xE: /* Pentium M */
bts_configure(&bts_cfg_pentium_m); break;
- case 0xF: /* Core2 */
- case 0x1C: /* Atom */
+ default: /* Core2, Atom, ... */
bts_configure(&bts_cfg_core2); break;
- default:
- /* sorry, don't know about them */
- break;
}
break;
case 0xF:
Index: gits/arch/x86/kernel/cpu/intel.c
===================================================================
--- gits.orig/arch/x86/kernel/cpu/intel.c 2008-11-09 10:54:04.000000000
-0100
+++ gits/arch/x86/kernel/cpu/intel.c 2008-11-09 12:41:59.000000000 -0100
@@ -307,12 +307,11 @@
set_cpu_cap(c, X86_FEATURE_P4);
if (c->x86 == 6)
set_cpu_cap(c, X86_FEATURE_P3);
+#endif

if (cpu_has_bts)
ptrace_bts_init_intel(c);

-#endif
-
detect_extended_topology(c);
if (!cpu_has(c, X86_FEATURE_XTOPOLOGY)) {
/*

#1 lore raw
Quoted 8 lines · Markus Metzger

Move BTS initialisation out of an #ifdef CONFIG_X86_64 guard.

Assume core2 BTS and DS layout for future models of family 6 processors.

Signed-off-by Markus Metzger <[email protected]>

---

Index: gits/arch/x86/kernel/ds.c

applied the commit below to tip/x86/ptrace, thanks Markus!

Ingo

--------------->

Quoted 1 line

From f4166c54bfe04f64603974058e44fbd7cfef0ccc Mon Sep 17 00:00:00 2001

From: Markus Metzger <[email protected]>
Date: Sun, 9 Nov 2008 14:29:21 +0100
Subject: [PATCH] x86, bts: DS and BTS initialization

Impact: widen BTS/PEBS ptrace enablement to more CPU models

Move BTS initialisation out of an #ifdef CONFIG_X86_64 guard.

Assume core2 BTS and DS layout for future models of family 6 processors.

Signed-off-by Markus Metzger <[email protected]>
Signed-off-by Ingo Molnar <[email protected]>
---
 arch/x86/kernel/cpu/intel.c |    3 +--
 arch/x86/kernel/ds.c        |    9 ++++-----
 arch/x86/kernel/ptrace.c    |    9 ++++-----
 3 files changed, 9 insertions(+), 12 deletions(-)
arch/x86/kernel/cpu/intel.c +1 -2
index cce0b61..816f27f 100644
@@ -307,12 +307,11 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
 		set_cpu_cap(c, X86_FEATURE_P4);
 	if (c->x86 == 6)
 		set_cpu_cap(c, X86_FEATURE_P3);
+#endif
 
 	if (cpu_has_bts)
 		ptrace_bts_init_intel(c);
 
-#endif
-
 	detect_extended_topology(c);
 	if (!cpu_has(c, X86_FEATURE_XTOPOLOGY)) {
 		/*
arch/x86/kernel/ds.c +4 -5
index 2b69994..c570252 100644
@@ -821,17 +821,16 @@ void __cpuinit ds_init_intel(struct cpuinfo_x86 *c)
 	switch (c->x86) {
 	case 0x6:
 		switch (c->x86_model) {
+		case 0 ... 0xC:
+			/* sorry, don't know about them */
+			break;
 		case 0xD:
 		case 0xE: /* Pentium M */
 			ds_configure(&ds_cfg_var);
 			break;
-		case 0xF: /* Core2 */
-		case 0x1C: /* Atom */
+		default: /* Core2, Atom, ... */
 			ds_configure(&ds_cfg_64);
 			break;
-		default:
-			/* sorry, don't know about them */
-			break;
 		}
 		break;
 	case 0xF:
arch/x86/kernel/ptrace.c +4 -5
index 0a6d8c1..06180df 100644
@@ -929,17 +929,16 @@ void __cpuinit ptrace_bts_init_intel(struct cpuinfo_x86 *c)
 	switch (c->x86) {
 	case 0x6:
 		switch (c->x86_model) {
+		case 0 ... 0xC:
+			/* sorry, don't know about them */
+			break;
 		case 0xD:
 		case 0xE: /* Pentium M */
 			bts_configure(&bts_cfg_pentium_m);
 			break;
-		case 0xF: /* Core2 */
-        case 0x1C: /* Atom */
+		default: /* Core2, Atom, ... */
 			bts_configure(&bts_cfg_core2);
 			break;
-		default:
-			/* sorry, don't know about them */
-			break;
 		}
 		break;
 	case 0xF: