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omap gpio: minor bugfixes

PATCH In review David Brownell 2 participants 2 messages Nov 7, 2008 – Nov 13, 2008

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#0 lore raw

PATCH 1/1 omap gpio: minor bugfixes

From: David Brownell <[email protected]>

Minor GPIO fixes:

- If get_gpio_bank() fails, then BUG() out.

- In omap_set_gpio_debounce():
* protect the read/modify/write with the relevant spinlock
* make the omap3 clock ops pass "sparse" checking

Except for the spinlock problem, these were reported through "make".

---
 arch/arm/plat-omap/gpio.c |   20 +++++++++++++++-----
 1 file changed, 15 insertions(+), 5 deletions(-)
arch/arm/plat-omap/gpio.c +15 -5
@@ -244,6 +244,8 @@ static inline struct gpio_bank *get_gpio
 		return &gpio_bank[gpio >> 5];
 	if (cpu_is_omap34xx())
 		return &gpio_bank[gpio >> 5];
+	BUG();
+	return NULL;
 }
 
 static inline int get_gpio_index(int gpio)
@@ -447,6 +449,7 @@ void omap_set_gpio_debounce(int gpio, in
 {
 	struct gpio_bank *bank;
 	void __iomem *reg;
+	unsigned long flags;
 	u32 val, l = 1 << get_gpio_index(gpio);
 
 	if (cpu_class_is_omap1())
@@ -454,21 +457,28 @@ void omap_set_gpio_debounce(int gpio, in
 
 	bank = get_gpio_bank(gpio);
 	reg = bank->base;
-
 	reg += OMAP24XX_GPIO_DEBOUNCE_EN;
+
+	spin_lock_irqsave(&bank->lock, flags);
 	val = __raw_readl(reg);
 
 	if (enable && !(val & l))
 		val |= l;
-	else if (!enable && val & l)
+	else if (!enable && (val & l))
 		val &= ~l;
 	else
-		return;
+		goto done;
 
-	if (cpu_is_omap34xx())
-		enable ? clk_enable(bank->dbck) : clk_disable(bank->dbck);
+	if (cpu_is_omap34xx()) {
+		if (enable)
+			clk_enable(bank->dbck);
+		else
+			clk_disable(bank->dbck);
+	}
 
 	__raw_writel(val, reg);
+done:
+	spin_unlock_irqrestore(&bank->lock, flags);
 }
 EXPORT_SYMBOL(omap_set_gpio_debounce);
 
#1 lore raw
Quoted 11 lines · David Brownell

From: David Brownell <[email protected]>

Minor GPIO fixes:

- If get_gpio_bank() fails, then BUG() out.

- In omap_set_gpio_debounce():
* protect the read/modify/write with the relevant spinlock
* make the omap3 clock ops pass "sparse" checking

Except for the spinlock problem, these were reported through "make".

Pushing today and adding to omap-upstream queue.

Tony

Quoted 62 lines
---
 arch/arm/plat-omap/gpio.c |   20 +++++++++++++++-----
 1 file changed, 15 insertions(+), 5 deletions(-)
arch/arm/plat-omap/gpio.c +15 -6
@@ -244,6 +244,8 @@ static inline struct gpio_bank *get_gpio
 		return &gpio_bank[gpio >> 5];
 	if (cpu_is_omap34xx())
 		return &gpio_bank[gpio >> 5];
+	BUG();
+	return NULL;
 }
 
 static inline int get_gpio_index(int gpio)
@@ -447,6 +449,7 @@ void omap_set_gpio_debounce(int gpio, in
 {
 	struct gpio_bank *bank;
 	void __iomem *reg;
+	unsigned long flags;
 	u32 val, l = 1 << get_gpio_index(gpio);
 
 	if (cpu_class_is_omap1())
@@ -454,21 +457,28 @@ void omap_set_gpio_debounce(int gpio, in
 
 	bank = get_gpio_bank(gpio);
 	reg = bank->base;
-
 	reg += OMAP24XX_GPIO_DEBOUNCE_EN;
+
+	spin_lock_irqsave(&bank->lock, flags);
 	val = __raw_readl(reg);
 
 	if (enable && !(val & l))
 		val |= l;
-	else if (!enable && val & l)
+	else if (!enable && (val & l))
 		val &= ~l;
 	else
-		return;
+		goto done;
 
-	if (cpu_is_omap34xx())
-		enable ? clk_enable(bank->dbck) : clk_disable(bank->dbck);
+	if (cpu_is_omap34xx()) {
+		if (enable)
+			clk_enable(bank->dbck);
+		else
+			clk_disable(bank->dbck);
+	}
 
 	__raw_writel(val, reg);
+done:
+	spin_unlock_irqrestore(&bank->lock, flags);
 }
 EXPORT_SYMBOL(omap_set_gpio_debounce);
 
--

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