sh: pci-sh7780: fix pci memory address mask
PATCH 1/1 sh: pci-sh7780: fix pci memory address mask
Fix the problem that cannot work a PCI device when system memory size is 256Mbyte in 29bit address mode.
Signed-off-by Yoshihiro Shimoda <[email protected]>
--- arch/sh/drivers/pci/pci-sh7780.c | 12 +++++------- 1 files changed, 5 insertions(+), 7 deletions(-)
arch/sh/drivers/pci/pci-sh7780.c +5 -7
@@ -123,16 +123,14 @@ int __init sh7780_pcic_init(struct sh4_pci_address_map *map)* Window0 = map->window0.size @ non-cached area base = SDRAM * Window1 = map->window1.size @ cached area base = SDRAM */ - word = ((map->window0.size -1 ) &0x1ff00001 ) |0x01 ; -pci_write_reg (0x07f00001 ,SH4_PCILSR0 ); - word = ((map->window1.size -1 ) &0x1ff00001 ) |0x01 ; + word = (CONFIG_MEMORY_SIZE -0x00100000 ) |0x00000001 ; +pci_write_reg (word,SH4_PCILSR0 );pci_write_reg (0x00000001 ,SH4_PCILSR1 );/* Set the values on window 0 PCI config registers */ - word =P2SEGADDR (map->window0.base); -pci_write_reg (0xa8000000 ,SH4_PCILAR0 ); -pci_write_reg (0x08000000 ,SH7780_PCIMBAR0 ); + word = (CONFIG_MEMORY_SIZE >0x08000000 ) ?0x10000000 :0x08000000 ; +pci_write_reg (word |0xa0000000 ,SH4_PCILAR0 ); +pci_write_reg (word,SH7780_PCIMBAR0 );/* Set the values on window 1 PCI config registers */ - word =P2SEGADDR (map->window1.base);pci_write_reg (0x00000000 ,SH4_PCILAR1 );pci_write_reg (0x00000000 ,SH7780_PCIMBAR1 );
Signature · 1 line
1.5.5
Quoted 4 lines · Yoshihiro Shimoda
Fix the problem that cannot work a PCI device when system memory size is 256Mbyte in 29bit address mode.
Signed-off-by Yoshihiro Shimoda <[email protected]>
I have applied this for now, but this really should be reflected in the pci address map instead of being hardcoded to the memory size. If the board gets the address map wrong, it is not the fault of the SH7780 PCIC management code. That said, there are some bugfixes in here, so I have applied it.