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target-ppc: initialize MSR appropriately in user-mode

PATCH In review Nathan Froyd 2 participants 2 messages Dec 8, 2008 – Dec 10, 2008

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Nathan Froyd

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#0 lore raw

PATCH 1/1 target-ppc: initialize MSR appropriately in user-mode

We shouldn't blindly initialize the floating-point bit in MSR; we should only do so if the processor we're targetting supports floating-point. We should also do the same thing with the Altivec and e500 bits.

Signed-off-by Nathan Froyd <[email protected]>
target-ppc/helper.c +7 -1
index 6bffa06..1a4d69e 100644
@@ -2905,7 +2905,13 @@ void cpu_ppc_reset (void *opaque)
     msr |= (target_ulong)1 << MSR_BE;
 #endif
 #if defined(CONFIG_USER_ONLY)
-    msr |= (target_ulong)1 << MSR_FP; /* Allow floating point usage */
+    /* Initialize MSR with appropriate instruction capabilities.  */
+    if (env->msr_mask & ((target_ulong)1 << MSR_FP))
+      msr |= (target_ulong)1 << MSR_FP;
+    if (env->msr_mask & ((target_ulong)1 << MSR_VR))
+      msr |= (target_ulong)1 << MSR_VR;
+    if (env->msr_mask & ((target_ulong)1 << MSR_SPE))
+      msr |= (target_ulong)1 << MSR_SPE;
     msr |= (target_ulong)1 << MSR_PR;
 #else
     env->nip = env->hreset_vector | env->excp_prefix;
#1 lore raw
Quoted 5 lines · Nathan Froyd

We shouldn't blindly initialize the floating-point bit in MSR; we should only do so if the processor we're targetting supports floating-point. We should also do the same thing with the Altivec and e500 bits.

Signed-off-by Nathan Froyd <[email protected]>

I have fixed the problem by applying two different patches, one to mask the computed MSR with the MSR mask, and one to active Altivec and SPE.

Thanks for you work.

Quoted 23 lines
target-ppc/helper.c +7 -1
index 6bffa06..1a4d69e 100644
@@ -2905,7 +2905,13 @@ void cpu_ppc_reset (void *opaque)
     msr |= (target_ulong)1 << MSR_BE;
 #endif
 #if defined(CONFIG_USER_ONLY)
-    msr |= (target_ulong)1 << MSR_FP; /* Allow floating point usage */
+    /* Initialize MSR with appropriate instruction capabilities.  */
+    if (env->msr_mask & ((target_ulong)1 << MSR_FP))
+      msr |= (target_ulong)1 << MSR_FP;
+    if (env->msr_mask & ((target_ulong)1 << MSR_VR))
+      msr |= (target_ulong)1 << MSR_VR;
+    if (env->msr_mask & ((target_ulong)1 << MSR_SPE))
+      msr |= (target_ulong)1 << MSR_SPE;
     msr |= (target_ulong)1 << MSR_PR;
 #else
     env->nip = env->hreset_vector | env->excp_prefix;
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  .''`.  Aurelien Jarno	            | GPG: 1024D/F1BCDB73
 : :' :  Debian developer           | Electrical Engineer
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