sh: gpio update

sh: gpio update

[PATCH 01/04] sh: make gpio_get/set_value() O(1)
[PATCH 02/04] sh: lockless gpio_get_value()
[PATCH 03/04] sh: lockless gpio_set_value()
[PATCH 04/04] sh: use gpiolib

This patchset improves the performance of the SuperH gpio implementation and converts it to make use of gpiolib.

The patches have been tested on Migo-R with the spi_gpio driver together with mmc_spi. Bitbanging mmc performance is improved from about 11 KBytes/s to 40 KBytes/s.

---

 arch/sh/Kconfig            |    7 
 arch/sh/boards/Kconfig     |    4 
 arch/sh/include/asm/gpio.h |   70 ++++---
 arch/sh/kernel/Makefile_32 |    2 
 arch/sh/kernel/Makefile_64 |    2 
 arch/sh/kernel/gpio.c      |  386 ++++++++++++++++++++++++++------------------
 drivers/serial/sh-sci.h    |    2 
 7 files changed, 288 insertions(+), 185 deletions(-)

More than doubling the speed. Good.

Lockless register reads ... generally safe. :) I'll trust you refactored this right.

I'm not clear how "lockless" here could be safe though; these all use software for register read/modify/write, which means an IRQ could arrive in the middle and, by reentering that code, invalidate what's being written.

Sounds good. The mmc_spi code won't be what I'd call fast, especially when bitbanging, so every little bit helps.

If those ganged GPIO calls ever happen, MMC would seem to be a decent candidate to use them: get a 4x improvement in raw data rate by implementing the native protocol not the SPI version.

- Dave