MIPS: DMA support for RC4030 chipset [v4]
PATCH 1/1 MIPS: DMA support for RC4030 chipset [v4]
Hi,
Attached patch implements DMA support to RC4030 chipset and simplifies jazz IO part (at 0xf0000000), where registers contain 16 bit values. The patch also wires DMA transfers for the SCSI adapter in the Jazz emulation (Mips Magnum 4000 and Acer Pica 61).
Changes since v1:
- Support reuse of esp callback functions up to DMA engine
- Don't keep in memory the DMA table, but read it when needed
Changes since v2:
- Don't use cpu_single_env in the DMA transfer function, as it is NULL in the aio path
- Multiple improvements to the DMA transfer function: report errors to the caller, support for non contiguous physical pages...
Changes since v3:
- Mask out higher bits of DMA translation table address
Hervé
mips.h +5 -1
@@ -27,6 +27,10 @@extern void cpu_mips_clock_init (CPUState *);/* rc4030.c */ -qemu_irq *rc4030_init (qemu_irq timer,qemu_irq jazz_bus); +typedef struct rc4030DMAState *rc4030_dma ; +typedef void (*rc4030_dma_function )(void *dma,uint8_t *buf,int len); +qemu_irq *rc4030_init (qemu_irq timer,qemu_irq jazz_bus, +rc4030_dma **dmas, +rc4030_dma_function *dma_read,rc4030_dma_function *dma_write);#endif
mips_jazz.c +32 -14
97 lines not on this page · raw message
rc4030.c +209 -77
469 lines not on this page · raw message
Quoted 13 lines · Hervé Poussineau
Hi,
Attached patch implements DMA support to RC4030 chipset and simplifies jazz IO part (at
0xf0000000), where registers contain 16 bit values. The patch also wires DMA transfers for the SCSI adapter in the Jazz emulation (Mips Magnum 4000 and Acer Pica 61).Signed-off-by Hervé Poussineau <[email protected]>Changes since v1:
- Support reuse of esp callback functions up to DMA engine
- Don't keep in memory the DMA table, but read it when needed
Quoted 9 lines
Changes since v2:
- Don't usecpu_single_envin the DMA transfer function, as it is NULL in the aio path
- Multiple improvements to the DMA transfer function: report errors to the caller, support for non contiguous physical pages...Changes since v3:
- Mask out higher bits of DMA translation table address
This patches introduces some new warnings:/home/aurel32/git/qemu/hw/rc4030.c: In function ‘rc4030_readl’:/home/aurel32/git/qemu/hw/rc4030.c:227: warning: format ‘%08x’ expects type ‘unsigned int’, but argument 4 has type ‘target_phys_addr_t’ /home/aurel32/git/qemu/hw/rc4030.c: In function ‘rc4030_writel’:/home/aurel32/git/qemu/hw/rc4030.c:374: warning: format ‘%08x’ expects type ‘unsigned int’, but argument 5 has type ‘target_phys_addr_t’ /home/aurel32/git/qemu/hw/rc4030.c: In function ‘jazzio_readw’:/home/aurel32/git/qemu/hw/rc4030.c:501: warning: format ‘%08x’ expects type ‘unsigned int’, but argument 4 has type ‘target_phys_addr_t’ /home/aurel32/git/qemu/hw/rc4030.c: In function ‘jazzio_writew’:/home/aurel32/git/qemu/hw/rc4030.c:539: warning: format ‘%08x’ expects type ‘unsigned int’, but argument 5 has type ‘target_phys_addr_t’
Also, please include a Signed-off.
[snip]
Quoted 7 lines
rc4030.c +3
-2+ jazzio_writeb, + jazzio_writew, + jazzio_writel, }; -#define G364_512KB_RAM (0x0) -#define G364_2MB_RAM (0x1)
rc4030.c line 582
Quoted 10 lines
rc4030.c +1
-4-#define G364_8MB_RAM (0x2) -#define G364_32MB_RAM (0x3) -static void rc4030_reset (void *opaque) {rc4030State *s = opaque;int i; - s->config = (G364_2MB_RAM <<8 ) |0x04 ; + s->config =0x410 ;
Why this change? This make the resulting code less readable.
Quoted 7 lines
s->invalid_address_register = 0; memset(s->dma_regs, 0, sizeof(s->dma_regs));rc4030.c +0
-0@@ -569,7 +589,6 @@ s->cache_ptag = s->cache_ltag =0 ; s->cache_bmask = s->cache_bwin =0 ;
Signature · 4 lines
.''`. Aurelien Jarno | GPG: 1024D/F1BCDB73 : :' : Debian developer | Electrical Engineer `. `' [email protected] | [email protected] `- people.debian.org/~aurel32 | www.aurel32.net