sh: pass through ioremap() for non-mmu processors
PATCH 1/1 sh: pass through ioremap() for non-mmu processors
From: Magnus Damm <[email protected]>
This patch modifies the ioremap() handling for CONFIG_MMU=n.
All 32-bit SuperH processors currently go through __ioremap_mode() and check for IO_TRAPPED and directly mapped segments. With this patch we simplify the MMU less case with a pass through version of
__ioremap_mode() which just returns the physical address.
The effects of this is change are:
- fix non-MMU ioremap() of high address hardware blocks (sh7203 CMT)
- IO_TRAPPED is never checked for
---
arch/sh/Kconfig | 1 + arch/sh/include/asm/io.h | 13 +++++++------ 2 files changed, 8 insertions(+), 6 deletions(-)
arch/sh/Kconfig +1 -0
@@ -136,6 +136,7 @@ config ARCH_HAS_DEFAULT_IDLE config IO_TRAPPED bool + depends on MMU source "init/Kconfig"
arch/sh/include/asm/io.h +7 -6
@@ -228,12 +228,6 @@ void __iounmap(void __iomem *addr);unsigned long onchip_remap (unsigned long addr,unsigned long size,const char *name);extern void onchip_unmap (unsigned long vaddr); -#else -#define __ioremap (offset, size, flags) ((void __iomem *)(offset)) -#define __iounmap (addr) do { } while (0) -#define onchip_remap (addr, size, name) (addr) -#define onchip_unmap (addr) do { } while (0) -#endif /* CONFIG_MMU */ static inline void __iomem *__ioremap_mode (unsigned long offset,unsigned long size,unsigned long flags)
@@ -269,6 +263,13 @@ __ioremap_mode(unsigned long offset, uns return __ioremap(offset, size, flags); } +#else +#define onchip_remap (addr, size, name) (addr) +#define onchip_unmap (addr) do { } while (0) +#define __ioremap_mode (offset, size, flags) (void __iomem *)(offset) +#define __iounmap (addr) do { } while (0) +#endif /* CONFIG_MMU */ +#define ioremap (offset, size) \ __ioremap_mode((offset), (size), 0)#define ioremap_nocache (offset, size) \
Quoted 23 lines · Magnus Damm
From: Magnus Damm <[email protected]>
This patch modifies the
ioremap()handling forCONFIG_MMU=n.All 32-bit SuperH processors currently go through
__ioremap_mode()and check forIO_TRAPPEDand directly mapped segments. With this patch we simplify the MMU less case with a pass through version of
__ioremap_mode()which just returns the physical address.The effects of this is change are:
- fix non-MMUioremap()of high address hardware blocks (sh7203 CMT)
-IO_TRAPPEDis never checked forSigned-off-by Magnus Damm <[email protected]>---
arch/sh/Kconfig | 1 + arch/sh/include/asm/io.h | 13 +++++++------ 2 files changed, 8 insertions(+), 6 deletions(-)
arch/sh/Kconfig config ARCH_HAS_DEFAULT_IDLE · line 140
Quoted 5 lines
arch/sh/Kconfig +1
-0@@ -136,6 +136,7 @@ config ARCH_HAS_DEFAULT_IDLE config IO_TRAPPED bool + depends on MMU
You have failed at Kconfig. select trumps depends, so this has no impact for platforms that select IO_TRAPPED. You will have to switch the platforms that select this over to handling the dependency properly on their own.
PATCH 1/1 sh: pass through ioremap() for non-mmu processors V2
In reply to Magnus DammFrom: Magnus Damm <[email protected]>
This is V2 of the CONFIG_MMU=n pass through ioremap() patch.
All 32-bit SuperH processors currently go through __ioremap_mode() and check for IO_TRAPPED and directly mapped segments. With this patch we simplify the MMU less case with a pass through version of
__ioremap_mode() which just returns the physical address.
The effects of this is change are:
- fix non-MMU ioremap() of high address hardware blocks (sh7203 CMT)
- make sure IO_TRAPPED is not selected
---
Changes since V1:
- rework Kconfig bits
arch/sh/boards/Kconfig | 6 +++--- arch/sh/include/asm/io.h | 13 +++++++------ 2 files changed, 10 insertions(+), 9 deletions(-)
arch/sh/boards/Kconfig +3 -3
@@ -121,7 +121,7 @@ config SH_RTS7751R2D bool "RTS7751R2D" depends on CPU_SUBTYPE_SH7751R select SYS_SUPPORTS_PCI - select IO_TRAPPED + select IO_TRAPPED if MMU help Select RTS7751R2D if configuring for a Renesas Technology Sales SH-Graphics board.
@@ -145,13 +145,13 @@ config SH_HIGHLANDER bool "Highlander" depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 select SYS_SUPPORTS_PCI - select IO_TRAPPED + select IO_TRAPPED if MMU config SH_SH7785LCR bool "SH7785LCR" depends on CPU_SUBTYPE_SH7785 select SYS_SUPPORTS_PCI - select IO_TRAPPED + select IO_TRAPPED if MMU config SH_SH7785LCR_29BIT_PHYSMAPS bool "SH7785LCR 29bit physmaps"
arch/sh/include/asm/io.h +7 -6
@@ -228,12 +228,6 @@ void __iounmap(void __iomem *addr);unsigned long onchip_remap (unsigned long addr,unsigned long size,const char *name);extern void onchip_unmap (unsigned long vaddr); -#else -#define __ioremap (offset, size, flags) ((void __iomem *)(offset)) -#define __iounmap (addr) do { } while (0) -#define onchip_remap (addr, size, name) (addr) -#define onchip_unmap (addr) do { } while (0) -#endif /* CONFIG_MMU */ static inline void __iomem *__ioremap_mode (unsigned long offset,unsigned long size,unsigned long flags)
@@ -269,6 +263,13 @@ __ioremap_mode(unsigned long offset, uns return __ioremap(offset, size, flags); } +#else +#define onchip_remap (addr, size, name) (addr) +#define onchip_unmap (addr) do { } while (0) +#define __ioremap_mode (offset, size, flags) (void __iomem *)(offset) +#define __iounmap (addr) do { } while (0) +#endif /* CONFIG_MMU */ +#define ioremap (offset, size) \ __ioremap_mode((offset), (size), 0)#define ioremap_nocache (offset, size) \
Re: [PATCH] sh: pass through ioremap() for non-mmu processors V2
In reply to Magnus DammQuoted 10 lines · Magnus Damm
This is V2 of the
CONFIG_MMU=npass throughioremap()patch.All 32-bit SuperH processors currently go through
__ioremap_mode()and check forIO_TRAPPEDand directly mapped segments. With this patch we simplify the MMU less case with a pass through version of
__ioremap_mode()which just returns the physical address.The effects of this is change are:
- fix non-MMUioremap()of high address hardware blocks (sh7203 CMT)
- make sureIO_TRAPPEDis not selected
Quoted 2 lines · Magnus Damm
This patch contains various fixes for 16-bit cmt hardware. With this applied periodic clockevents work fine on sh7203.
Both applied, thanks.