sh: multiple vectors per irq - sh7763

PATCH Applied Nobuhiro Iwamatsu 4 participants 13 messages Mar 6, 2009 – May 11, 2009 SuperH

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Nobuhiro Iwamatsu

author

2009-03-06 05:06 UTC #0 lore raw

PATCH 1/1 sh: multiple vectors per irq - sh7763

Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs.

This fixes potential irq masking issues for sh7763 hardware blocks such as RTC/SCIF/DMAC/GETHER/PCIC5/MMCIF/SIM/GPIO/USBF.

Signed-off-by Nobuhiro Iwamatsu <[email protected]>

---
 arch/sh/kernel/cpu/sh4a/setup-sh7763.c |  113 ++++++++++---------------------
 1 files changed, 37 insertions(+), 76 deletions(-)

arch/sh/kernel/cpu/sh4a/setup-sh7763.c +37 ~~-76~~

index 3c5b629..db85e34 100644
@@ -3,7 +3,7 @@
  *
  *  Copyright (C) 2006  Paul Mundt
  *  Copyright (C) 2007  Yoshihiro Shimoda
- *  Copyright (C) 2008  Nobuhiro Iwamatsu
+ *  Copyright (C) 2008,2009  Nobuhiro Iwamatsu
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive

@@ -22,18 +22,7 @@ static struct resource rtc_resources[] = {
 		.flags	= IORESOURCE_IO,
 	},
 	[1] = {
-		/* Period IRQ */
-		.start	= 21,
-		.flags	= IORESOURCE_IRQ,
-	},
-	[2] = {
-		/* Carry IRQ */
-		.start	= 22,
-		.flags	= IORESOURCE_IRQ,
-	},
-	[3] = {
-		/* Alarm IRQ */
-		.start	= 20,
+		/* Shared Period/Carry/Alarm IRQ */
 		.flags	= IORESOURCE_IRQ,
 	},
 };

@@ -50,17 +39,17 @@ static struct plat_sci_port sci_platform_data[] = {
 		.mapbase	= 0xffe00000,
 		.flags		= UPF_BOOT_AUTOCONF,
 		.type		= PORT_SCIF,
-		.irqs		= { 40, 41, 43, 42 },
+		.irqs		= { 40, 40, 40, 40 },
 	}, {
 		.mapbase	= 0xffe08000,
 		.flags		= UPF_BOOT_AUTOCONF,
 		.type		= PORT_SCIF,
-		.irqs		= { 76, 77, 79, 78 },
+		.irqs		= { 76, 76, 76, 76 },
 	}, {
 		.mapbase	= 0xffe10000,
 		.flags		= UPF_BOOT_AUTOCONF,
 		.type		= PORT_SCIF,
-		.irqs		= { 104, 105, 107, 106 },
+		.irqs		= { 104, 104, 104, 104 },
 	}, {
 		.flags = 0,
 	}

@@ -148,93 +137,65 @@ enum {
 	IRL_HHLL, IRL_HHLH, IRL_HHHL,
 
 	IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
-	RTC_ATI, RTC_PRI, RTC_CUI,
-	WDT, TMU0, TMU1, TMU2, TMU2_TICPI,
-	HUDI, LCDC,
-	DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2, DMAC0_DMINT3, DMAC0_DMAE,
-	SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
-	DMAC0_DMINT4, DMAC0_DMINT5,
-	IIC0, IIC1,
-	CMT,
-	GEINT0, GEINT1, GEINT2,
-	HAC,
-	PCISERR, PCIINTA, PCIINTB, PCIINTC, PCIINTD,
-	PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0,
-	STIF0, STIF1,
-	SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
-	SIOF0, SIOF1, SIOF2,
-	USBH, USBFI0, USBFI1,
-	TPU, PCC,
-	MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY,
-	SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND,
+	RTC, WDT, TMU0, TMU1, TMU2, TMU2_TICPI,
+	HUDI, LCDC, DMAC, SCIF0, IIC0, IIC1, CMT, GETHER, HAC,
+	PCISERR, PCIINTA, PCIINTB, PCIINTC, PCIINTD, PCIC5,
+	STIF0, STIF1, SCIF1, SIOF0, SIOF1, SIOF2,
+	USBH, USBF, TPU, PCC, MMCIF, SIM,
 	TMU3, TMU4, TMU5, ADC, SSI0, SSI1, SSI2, SSI3,
-	SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI,
-	GPIO_CH0, GPIO_CH1, GPIO_CH2, GPIO_CH3,
+	SCIF2, GPIO,
 
 	/* interrupt groups */
 
-	TMU012, TMU345, RTC, DMAC, SCIF0, GETHER, PCIC5,
-	SCIF1, USBF, MMCIF, SIM, SCIF2, GPIO,
+	TMU012, TMU345,
 };
 
 static struct intc_vect vectors[] __initdata = {
-	INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
-	INTC_VECT(RTC_CUI, 0x4c0),
+	INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
+	INTC_VECT(RTC, 0x4c0),
 	INTC_VECT(WDT, 0x560), INTC_VECT(TMU0, 0x580),
 	INTC_VECT(TMU1, 0x5a0), INTC_VECT(TMU2, 0x5c0),
 	INTC_VECT(TMU2_TICPI, 0x5e0), INTC_VECT(HUDI, 0x600),
 	INTC_VECT(LCDC, 0x620),
-	INTC_VECT(DMAC0_DMINT0, 0x640), INTC_VECT(DMAC0_DMINT1, 0x660),
-	INTC_VECT(DMAC0_DMINT2, 0x680), INTC_VECT(DMAC0_DMINT3, 0x6a0),
-	INTC_VECT(DMAC0_DMAE, 0x6c0),
-	INTC_VECT(SCIF0_ERI, 0x700), INTC_VECT(SCIF0_RXI, 0x720),
-	INTC_VECT(SCIF0_BRI, 0x740), INTC_VECT(SCIF0_TXI, 0x760),
-	INTC_VECT(DMAC0_DMINT4, 0x780), INTC_VECT(DMAC0_DMINT5, 0x7a0),
+	INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660),
+	INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0),
+	INTC_VECT(DMAC, 0x6c0),
+	INTC_VECT(SCIF0, 0x700), INTC_VECT(SCIF0, 0x720),
+	INTC_VECT(SCIF0, 0x740), INTC_VECT(SCIF0, 0x760),
+	INTC_VECT(DMAC, 0x780), INTC_VECT(DMAC, 0x7a0),
 	INTC_VECT(IIC0, 0x8A0), INTC_VECT(IIC1, 0x8C0),
-	INTC_VECT(CMT, 0x900), INTC_VECT(GEINT0, 0x920),
-	INTC_VECT(GEINT1, 0x940), INTC_VECT(GEINT2, 0x960),
+	INTC_VECT(CMT, 0x900), INTC_VECT(GETHER, 0x920),
+	INTC_VECT(GETHER, 0x940), INTC_VECT(GETHER, 0x960),
 	INTC_VECT(HAC, 0x980),
 	INTC_VECT(PCISERR, 0xa00), INTC_VECT(PCIINTA, 0xa20),
 	INTC_VECT(PCIINTB, 0xa40), INTC_VECT(PCIINTC, 0xa60),
-	INTC_VECT(PCIINTD, 0xa80), INTC_VECT(PCIERR, 0xaa0),
-	INTC_VECT(PCIPWD3, 0xac0), INTC_VECT(PCIPWD2, 0xae0),
-	INTC_VECT(PCIPWD1, 0xb00), INTC_VECT(PCIPWD0, 0xb20),
+	INTC_VECT(PCIINTD, 0xa80), INTC_VECT(PCIC5, 0xaa0),
+	INTC_VECT(PCIC5, 0xac0), INTC_VECT(PCIC5, 0xae0),
+	INTC_VECT(PCIC5, 0xb00), INTC_VECT(PCIC5, 0xb20),
 	INTC_VECT(STIF0, 0xb40), INTC_VECT(STIF1, 0xb60),
-	INTC_VECT(SCIF1_ERI, 0xb80), INTC_VECT(SCIF1_RXI, 0xba0),
-	INTC_VECT(SCIF1_BRI, 0xbc0), INTC_VECT(SCIF1_TXI, 0xbe0),
+	INTC_VECT(SCIF1, 0xb80), INTC_VECT(SCIF1, 0xba0),
+	INTC_VECT(SCIF1, 0xbc0), INTC_VECT(SCIF1, 0xbe0),
 	INTC_VECT(SIOF0, 0xc00), INTC_VECT(SIOF1, 0xc20),
-	INTC_VECT(USBH, 0xc60), INTC_VECT(USBFI0, 0xc80),
-	INTC_VECT(USBFI1, 0xca0),
+	INTC_VECT(USBH, 0xc60), INTC_VECT(USBF, 0xc80),
+	INTC_VECT(USBF, 0xca0),
 	INTC_VECT(TPU, 0xcc0), INTC_VECT(PCC, 0xce0),
-	INTC_VECT(MMCIF_FSTAT, 0xd00), INTC_VECT(MMCIF_TRAN, 0xd20),
-	INTC_VECT(MMCIF_ERR, 0xd40), INTC_VECT(MMCIF_FRDY, 0xd60),
-	INTC_VECT(SIM_ERI, 0xd80), INTC_VECT(SIM_RXI, 0xda0),
-	INTC_VECT(SIM_TXI, 0xdc0), INTC_VECT(SIM_TEND, 0xde0),
+	INTC_VECT(MMCIF, 0xd00), INTC_VECT(MMCIF, 0xd20),
+	INTC_VECT(MMCIF, 0xd40), INTC_VECT(MMCIF, 0xd60),
+	INTC_VECT(SIM, 0xd80), INTC_VECT(SIM, 0xda0),
+	INTC_VECT(SIM, 0xdc0), INTC_VECT(SIM, 0xde0),
 	INTC_VECT(TMU3, 0xe00), INTC_VECT(TMU4, 0xe20),
 	INTC_VECT(TMU5, 0xe40), INTC_VECT(ADC, 0xe60),
 	INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0),
 	INTC_VECT(SSI2, 0xec0), INTC_VECT(SSI3, 0xee0),
-	INTC_VECT(SCIF2_ERI, 0xf00), INTC_VECT(SCIF2_RXI, 0xf20),
-	INTC_VECT(SCIF2_BRI, 0xf40), INTC_VECT(SCIF2_TXI, 0xf60),
-	INTC_VECT(GPIO_CH0, 0xf80), INTC_VECT(GPIO_CH1, 0xfa0),
-	INTC_VECT(GPIO_CH2, 0xfc0), INTC_VECT(GPIO_CH3, 0xfe0),
+	INTC_VECT(SCIF2, 0xf00), INTC_VECT(SCIF2, 0xf20),
+	INTC_VECT(SCIF2, 0xf40), INTC_VECT(SCIF2, 0xf60),
+	INTC_VECT(GPIO, 0xf80), INTC_VECT(GPIO, 0xfa0),
+	INTC_VECT(GPIO, 0xfc0), INTC_VECT(GPIO, 0xfe0),
 };
 
 static struct intc_group groups[] __initdata = {
 	INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI),
 	INTC_GROUP(TMU345, TMU3, TMU4, TMU5),
-	INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
-	INTC_GROUP(DMAC, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2,
-		   DMAC0_DMINT3, DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE),
-	INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
-	INTC_GROUP(GETHER, GEINT0, GEINT1, GEINT2),
-	INTC_GROUP(PCIC5, PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0),
-	INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
-	INTC_GROUP(USBF, USBFI0, USBFI1),
-	INTC_GROUP(MMCIF, MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY),
-	INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND),
-	INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
-	INTC_GROUP(GPIO, GPIO_CH0, GPIO_CH1, GPIO_CH2, GPIO_CH3),
 };
 
 static struct intc_mask_reg mask_registers[] __initdata = {

Signature · 1 line

1.6.1.3

Paul Mundt

Applied

2009-03-06 05:15 UTC #1 lore raw

Quoted 8 lines · Nobuhiro Iwamatsu

Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs.
This fixes potential irq masking issues for sh7763 hardware blocks such as RTC/SCIF/DMAC/GETHER/PCIC5/MMCIF/SIM/GPIO/USBF.
Signed-off-by Nobuhiro Iwamatsu <[email protected]>

Applied, thanks.

Magnus Damm

2009-05-11 09:01 UTC #2 lore raw

PATCH 1/1 sh: multiple vectors per irq - sh7760

In reply to Nobuhiro Iwamatsu

From: Magnus Damm <[email protected]>

Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs.

This fixes potential irq masking issues for sh7760 hardware blocks such as DMAC/TMU2/REF.

Signed-off-by Magnus Damm <[email protected]>

---

 arch/sh/kernel/cpu/sh4/setup-sh7760.c |   31 +++++++++++--------------------
 1 file changed, 11 insertions(+), 20 deletions(-)

arch/sh/kernel/cpu/sh4/setup-sh7760.c +11 ~~-20~~

@@ -18,10 +18,7 @@ enum {
 
 	/* interrupt sources */
 	IRL0, IRL1, IRL2, IRL3,
-	HUDI, GPIOI,
-	DMAC_DMTE0, DMAC_DMTE1, DMAC_DMTE2, DMAC_DMTE3,
-	DMAC_DMTE4, DMAC_DMTE5, DMAC_DMTE6, DMAC_DMTE7,
-	DMAC_DMAE,
+	HUDI, GPIOI, DMAC,
 	IRQ4, IRQ5, IRQ6, IRQ7,
 	HCAN20, HCAN21,
 	SSI0, SSI1,

@@ -36,21 +33,20 @@ enum {
 	HSPI,
 	MMCIF0, MMCIF1, MMCIF2, MMCIF3,
 	MFI, ADC, CMT,
-	TMU0, TMU1, TMU2_TUNI, TMU2_TICPI,
-	WDT,
-	REF_RCMI, REF_ROVI,
+	TMU0, TMU1, TMU2,
+	WDT, REF,
 
 	/* interrupt groups */
-	DMAC, DMABRG, SCIF0, SCIF1, SCIF2, SIM, MMCIF, TMU2, REF,
+	DMABRG, SCIF0, SCIF1, SCIF2, SIM, MMCIF,
 };
 
 static struct intc_vect vectors[] __initdata = {
 	INTC_VECT(HUDI, 0x600), INTC_VECT(GPIOI, 0x620),
-	INTC_VECT(DMAC_DMTE0, 0x640), INTC_VECT(DMAC_DMTE1, 0x660),
-	INTC_VECT(DMAC_DMTE2, 0x680), INTC_VECT(DMAC_DMTE3, 0x6a0),
-	INTC_VECT(DMAC_DMTE4, 0x780), INTC_VECT(DMAC_DMTE5, 0x7a0),
-	INTC_VECT(DMAC_DMTE6, 0x7c0), INTC_VECT(DMAC_DMTE7, 0x7e0),
-	INTC_VECT(DMAC_DMAE, 0x6c0),
+	INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660),
+	INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0),
+	INTC_VECT(DMAC, 0x780), INTC_VECT(DMAC, 0x7a0),
+	INTC_VECT(DMAC, 0x7c0), INTC_VECT(DMAC, 0x7e0),
+	INTC_VECT(DMAC, 0x6c0),
 	INTC_VECT(IRQ4, 0x800), INTC_VECT(IRQ5, 0x820),
 	INTC_VECT(IRQ6, 0x840), INTC_VECT(IRQ6, 0x860),
 	INTC_VECT(HCAN20, 0x900), INTC_VECT(HCAN21, 0x920),

@@ -74,23 +70,18 @@ static struct intc_vect vectors[] __init
 	INTC_VECT(MFI, 0xe80), /* 0xf80 according to data sheet */
 	INTC_VECT(ADC, 0xf80), INTC_VECT(CMT, 0xfa0),
 	INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
-	INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
+	INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
 	INTC_VECT(WDT, 0x560),
-	INTC_VECT(REF_RCMI, 0x580), INTC_VECT(REF_ROVI, 0x5a0),
+	INTC_VECT(REF, 0x580), INTC_VECT(REF, 0x5a0),
 };
 
 static struct intc_group groups[] __initdata = {
-	INTC_GROUP(DMAC, DMAC_DMTE0, DMAC_DMTE1, DMAC_DMTE2,
-		   DMAC_DMTE3, DMAC_DMTE4, DMAC_DMTE5,
-		   DMAC_DMTE6, DMAC_DMTE7, DMAC_DMAE),
 	INTC_GROUP(DMABRG, DMABRG0, DMABRG1, DMABRG2),
 	INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
 	INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
 	INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
 	INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEI),
 	INTC_GROUP(MMCIF, MMCIF0, MMCIF1, MMCIF2, MMCIF3),
-	INTC_GROUP(TMU2, TMU2_TUNI, TMU2_TICPI),
-	INTC_GROUP(REF, REF_RCMI, REF_ROVI),
 };
 
 static struct intc_mask_reg mask_registers[] __initdata = {

Manuel Lauss

2009-05-11 09:44 UTC #3 lore raw

Re: [PATCH] sh: multiple vectors per irq - sh7760

In reply to Nobuhiro Iwamatsu

Quoted 8 lines · Magnus Damm

From: Magnus Damm <[email protected]>
Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs.
This fixes potential irq masking issues for sh7760 hardware blocks such as DMAC/TMU2/REF.

With this patch applied, my 7760 system no longer boots. I'll try to figure out why as soon as I get my JTAG probe back.

Manuel Lauss

Paul Mundt

2009-05-11 09:56 UTC #4 lore raw

Re: [PATCH] sh: multiple vectors per irq - sh7760

In reply to Nobuhiro Iwamatsu

Quoted 15 lines · Magnus Damm

Quoted 7 lines · Manuel Lauss
Quoted 6 lines · Magnus Damm
From: Magnus Damm <[email protected]>
Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs.
Quoted 5 lines
Quoted 2 lines
This fixes potential irq masking issues for sh7760 hardware blocks such as DMAC/TMU2/REF.
With this patch applied, my 7760 system no longer boots. ?I'll try to figure out why as soon as I get my JTAG probe back.

Quoted 7 lines

Oops, that's no good. I'm converting sh7760 to make use of the new timer driver, and while at it I wanted to fix the vectors because they looked like they will generate warnings...
Without this patch, do you see intc warning printouts like "intc:
missing unique irq mask for..."?

Yeah, I noticed these earlier in Manuel's boot log:

intc: missing unique irq mask for irq 34 (vect 0x0640)
intc: missing unique irq mask for irq 35 (vect 0x0660)
intc: missing unique irq mask for irq 36 (vect 0x0680)
intc: missing unique irq mask for irq 37 (vect 0x06a0)
intc: missing unique irq mask for irq 44 (vect 0x0780)
intc: missing unique irq mask for irq 45 (vect 0x07a0)
intc: missing unique irq mask for irq 46 (vect 0x07c0)
intc: missing unique irq mask for irq 47 (vect 0x07e0)
intc: missing unique irq mask for irq 38 (vect 0x06c0)
intc: missing unique irq mask for irq 18 (vect 0x0440)
intc: missing unique irq mask for irq 19 (vect 0x0460)
intc: missing unique irq mask for irq 28 (vect 0x0580)
intc: missing unique irq mask for irq 29 (vect 0x05a0)

http://marc.info/?l=linux-sh&m4144524704881&w=2

Magnus Damm

2009-05-11 09:59 UTC #5 lore raw

Re: [PATCH] sh: multiple vectors per irq - sh7760

In reply to Nobuhiro Iwamatsu

Quoted 7 lines · Manuel Lauss

Quoted 6 lines · Magnus Damm
From: Magnus Damm <[email protected]>
Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs.

Quoted 5 lines

Quoted 2 lines
This fixes potential irq masking issues for sh7760 hardware blocks such as DMAC/TMU2/REF.
With this patch applied, my 7760 system no longer boots. I'll try to figure out why as soon as I get my JTAG probe back.

Oops, that's no good. I'm converting sh7760 to make use of the new timer driver, and while at it I wanted to fix the vectors because they looked like they will generate warnings...

Without this patch, do you see intc warning printouts like "intc:
missing unique irq mask for..."?

Are you using DMAC, TMU2 or REF on your system?

Thanks for your help!

/ magnus

Manuel Lauss

2009-05-11 10:15 UTC #6 lore raw

Re: [PATCH] sh: multiple vectors per irq - sh7760

In reply to Nobuhiro Iwamatsu

Quoted 15 lines · Magnus Damm

Quoted 7 lines · Manuel Lauss
Quoted 6 lines · Magnus Damm
From: Magnus Damm <[email protected]>
Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs.
Quoted 5 lines
Quoted 2 lines
This fixes potential irq masking issues for sh7760 hardware blocks such as DMAC/TMU2/REF.
With this patch applied, my 7760 system no longer boots. ?I'll try to figure out why as soon as I get my JTAG probe back.

Quoted 6 lines

Oops, that's no good. I'm converting sh7760 to make use of the new timer driver, and while at it I wanted to fix the vectors because they looked like they will generate warnings...
Without this patch, do you see intc warning printouts like "intc:
missing unique irq mask for..."?

In this particular instance, I see no outputs at all. There are a few of those strings, but all for devices which I don't use.

Quoted 1 line

Are you using DMAC, TMU2 or REF on your system?

DMAC is built-in, but no users other than DMABRG, which requests DMAC0 on init.

Quoted 1 line

Thanks for your help!

My pleasure!

Manuel Lauss

Magnus Damm

2009-05-11 10:32 UTC #7 lore raw

Re: [PATCH] sh: multiple vectors per irq - sh7760

In reply to Nobuhiro Iwamatsu

Quoted 20 lines · Manuel Lauss

Quoted 19 lines · Magnus Damm
Quoted 7 lines · Manuel Lauss
Quoted 6 lines · Magnus Damm
From: Magnus Damm <[email protected]>
Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs.
Quoted 5 lines
Quoted 2 lines
This fixes potential irq masking issues for sh7760 hardware blocks such as DMAC/TMU2/REF.
With this patch applied, my 7760 system no longer boots. ?I'll try to figure out why as soon as I get my JTAG probe back.
Oops, that's no good. I'm converting sh7760 to make use of the new timer driver, and while at it I wanted to fix the vectors because they looked like they will generate warnings...

Quoted 5 lines

Quoted 2 lines
Without this patch, do you see intc warning printouts like "intc:
missing unique irq mask for..."?
In this particular instance, I see no outputs at all. There are a few of those strings, but all for devices which I don't use.

Hm, that's strange. I guess something is wrong with my tables..

Quoted 4 lines

Quoted 1 line
Are you using DMAC, TMU2 or REF on your system?
DMAC is built-in, but no users other than DMABRG, which requests DMAC0 on init.

So with this patch all DMA channels must use a single linux interrupt. Requesting interrupt 34 should be ok in this case (the first DMAC vector with value 0x640) but all other interrupt sources are disabled. Interrupt 34 becomes a shared interrupt. We did similar changes for a bunch of other processor models earlier this year, but we somehow missed sh7760 then. Or ignored may be a better word, this since there's no sh7760 hardware on my desk. =)

If you have a little time to spend on this, then feel free to test by #ifdefing out various INTC_VECT() to check which vector that makes the boot fail. A good start may be to disable all DMA users and see if that helps.

Cheers,

/ magnus

Magnus Damm

2009-05-11 10:34 UTC #8 lore raw

Re: [PATCH] sh: multiple vectors per irq - sh7760

In reply to Nobuhiro Iwamatsu

Quoted 3 lines · Magnus Damm

So with this patch all DMA channels must use a single linux interrupt. Requesting interrupt 34 should be ok in this case (the first DMAC vector with value 0x640) but all other interrupt sources are disabled.

Err, the other interrupt sources are not disabled. But they are muxed into linux interrupt 34 in this case. So the DMA driver needs to be aware of this and request one interrupt instead of one per channel.

/ magnus

Paul Mundt

2009-05-11 10:49 UTC #9 lore raw

Re: [PATCH] sh: multiple vectors per irq - sh7760

In reply to Nobuhiro Iwamatsu

Quoted 12 lines · Manuel Lauss

Quoted 7 lines · Magnus Damm
So with this patch all DMA channels must use a single linux interrupt. Requesting interrupt 34 should be ok in this case (the first DMAC vector with value 0x640) but all other interrupt sources are disabled. Interrupt 34 becomes a shared interrupt. We did similar changes for a bunch of other processor models earlier this year, but we somehow missed sh7760 then. Or ignored may be a better word, this since there's no sh7760 hardware on my desk. =)
Disabling DMAC solves this. The TMU patch also seems to work fine.

Quoted 7 lines

Quoted 4 lines
If you have a little time to spend on this, then feel free to test by #ifdefing out various INTC_VECT() to check which vector that makes the boot fail. A good start may be to disable all DMA users and see if that helps.
I'll try to figure it out if I can find some more free time.

Try with this:

---

arch/sh/drivers/dma/Kconfig +2 -1

index 666713a..63e9dd3 100644
@@ -16,7 +16,8 @@ config SH_DMA_IRQ_MULTI
 		     CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7750R || \
 		     CPU_SUBTYPE_SH7751R || CPU_SUBTYPE_SH7091  || \
 		     CPU_SUBTYPE_SH7763  || CPU_SUBTYPE_SH7764  || \
-		     CPU_SUBTYPE_SH7780  || CPU_SUBTYPE_SH7785
+		     CPU_SUBTYPE_SH7780  || CPU_SUBTYPE_SH7785  || \
+		     CPU_SUBTYPE_SH7760
 
 config NR_ONCHIP_DMA_CHANNELS
 	int

Manuel Lauss

2009-05-11 10:51 UTC #10 lore raw

Re: [PATCH] sh: multiple vectors per irq - sh7760

In reply to Nobuhiro Iwamatsu

Quoted 35 lines · Magnus Damm

Quoted 20 lines · Manuel Lauss
Quoted 19 lines · Magnus Damm
Quoted 7 lines · Manuel Lauss
Quoted 6 lines · Magnus Damm
From: Magnus Damm <[email protected]>
Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs.
Quoted 5 lines
Quoted 2 lines
This fixes potential irq masking issues for sh7760 hardware blocks such as DMAC/TMU2/REF.
With this patch applied, my 7760 system no longer boots. ?I'll try to figure out why as soon as I get my JTAG probe back.
Oops, that's no good. I'm converting sh7760 to make use of the new timer driver, and while at it I wanted to fix the vectors because they looked like they will generate warnings...
Quoted 5 lines
Quoted 2 lines
Without this patch, do you see intc warning printouts like "intc:
missing unique irq mask for..."?
In this particular instance, I see no outputs at all. ?There are a few of those strings, but all for devices which I don't use.
Hm, that's strange. I guess something is wrong with my tables..
Quoted 4 lines
Quoted 1 line
Are you using DMAC, TMU2 or REF on your system?
DMAC is built-in, but no users other than DMABRG, which requests DMAC0 on init.

Quoted 7 lines

So with this patch all DMA channels must use a single linux interrupt. Requesting interrupt 34 should be ok in this case (the first DMAC vector with value 0x640) but all other interrupt sources are disabled. Interrupt 34 becomes a shared interrupt. We did similar changes for a bunch of other processor models earlier this year, but we somehow missed sh7760 then. Or ignored may be a better word, this since there's no sh7760 hardware on my desk. =)

Disabling DMAC solves this. The TMU patch also seems to work fine.

Quoted 4 lines

If you have a little time to spend on this, then feel free to test by #ifdefing out various INTC_VECT() to check which vector that makes the boot fail. A good start may be to disable all DMA users and see if that helps.

I'll try to figure it out if I can find some more free time.

Thanks!
Manuel Lauss

Magnus Damm

2009-05-11 10:55 UTC #11 lore raw

Re: [PATCH] sh: multiple vectors per irq - sh7760

In reply to Nobuhiro Iwamatsu

Quoted 13 lines · Manuel Lauss

Quoted 12 lines · Magnus Damm
Quoted 10 lines · Manuel Lauss
Quoted 9 lines · Magnus Damm
Quoted 7 lines · Manuel Lauss
Quoted 6 lines · Magnus Damm
From: Magnus Damm <[email protected]>
Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs.

Quoted 7 lines

Quoted 6 lines
Quoted 6 lines
Quoted 6 lines
Quoted 5 lines
Quoted 2 lines
This fixes potential irq masking issues for sh7760 hardware blocks such as DMAC/TMU2/REF.
With this patch applied, my 7760 system no longer boots. ?I'll try to figure out why as soon as I get my JTAG probe back.
Disabling DMAC solves this. The TMU patch also seems to work fine.

Good, thanks for testing!

Quoted 6 lines

Quoted 4 lines
If you have a little time to spend on this, then feel free to test by #ifdefing out various INTC_VECT() to check which vector that makes the boot fail. A good start may be to disable all DMA users and see if that helps.
I'll try to figure it out if I can find some more free time.

I guess this means that the problem lies withing the DMA driver then. =)

Thanks for your help!

/ magnus

Manuel Lauss

2009-05-11 12:26 UTC #12 lore raw

Re: [PATCH] sh: multiple vectors per irq - sh7760

In reply to Nobuhiro Iwamatsu

Quoted 29 lines · Paul Mundt

Quoted 12 lines · Manuel Lauss
Quoted 7 lines · Magnus Damm
So with this patch all DMA channels must use a single linux interrupt. Requesting interrupt 34 should be ok in this case (the first DMAC vector with value 0x640) but all other interrupt sources are disabled. Interrupt 34 becomes a shared interrupt. We did similar changes for a bunch of other processor models earlier this year, but we somehow missed sh7760 then. Or ignored may be a better word, this since there's no sh7760 hardware on my desk. =)
Disabling DMAC solves this. The TMU patch also seems to work fine.
Quoted 7 lines
Quoted 4 lines
If you have a little time to spend on this, then feel free to test by #ifdefing out various INTC_VECT() to check which vector that makes the boot fail. A good start may be to disable all DMA users and see if that helps.
I'll try to figure it out if I can find some more free time.
Try with this:
---
arch/sh/drivers/dma/Kconfig +0 -0
index 666713a..63e9dd3 100644

arch/sh/drivers/dma/Kconfig config SH_DMA_IRQ_MULTI · line 23

Quoted 9 lines

arch/sh/drivers/dma/Kconfig +2 -1

@@ -16,7 +16,8 @@ config SH_DMA_IRQ_MULTI
 		     CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7750R || \
 		     CPU_SUBTYPE_SH7751R || CPU_SUBTYPE_SH7091  || \
 		     CPU_SUBTYPE_SH7763  || CPU_SUBTYPE_SH7764  || \
-		     CPU_SUBTYPE_SH7780  || CPU_SUBTYPE_SH7785
+		     CPU_SUBTYPE_SH7780  || CPU_SUBTYPE_SH7785  || \
+		     CPU_SUBTYPE_SH7760
 
 config NR_ONCHIP_DMA_CHANNELS
 	int

Perfect! All is working now.

Thank you both!
Manuel Lauss