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fdt: Fix fdt_pci_dma_ranges handling of 64-bit ranges

PATCH New Kumar Gala 3 participants 4 messages Aug 5, 2009 – Aug 9, 2009

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Kumar Gala

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#0 lore raw

PATCH 1/1 fdt: Fix fdt_pci_dma_ranges handling of 64-bit ranges

If the size of a region equal to 4G it can't be represnted in a 32-bit BAR so we should have marked that case as MEM64.

Additionally bump the number of inbound windows up to 4 to handle the fact that Freescale PPCs that have an implicit window for CCSRBAR.

---
 common/fdt_support.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
common/fdt_support.c +2 -2
index fc077e8..89164a1 100644
@@ -625,7 +625,7 @@ int fdt_resize(void *blob)
 }
 
 #ifdef CONFIG_PCI
-#define CONFIG_SYS_PCI_NR_INBOUND_WIN 3
+#define CONFIG_SYS_PCI_NR_INBOUND_WIN 4
 
 #define FDT_PCI_PREFETCH	(0x40000000)
 #define FDT_PCI_MEM32		(0x02000000)
@@ -655,7 +655,7 @@ int fdt_pci_dma_ranges(void *blob, int phb_off, struct pci_controller *hose) {
 		size = (u64)hose->regions[r].size;
 
 		dma_range[0] = 0;
-		if (size > 0x100000000ull)
+		if (size >= 0x100000000ull)
 			dma_range[0] |= FDT_PCI_MEM64;
 		else
 			dma_range[0] |= FDT_PCI_MEM32;
Signature · 1 line
1.6.0.6
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#1 lore raw

PATCH 1/1 fdt: Fix fdt_pci_dma_ranges handling of 64-bit ranges

Quoted 10 lines · Kumar Gala

If the size of a region equal to 4G it can't be represnted in a 32-bit BAR so we should have marked that case as MEM64.

Additionally bump the number of inbound windows up to 4 to handle the fact that Freescale PPCs that have an implicit window for CCSRBAR.

---
common/fdt_support.c | 4 ++--

1 files changed, 2 insertions(+), 2 deletions(-)

Can you look at picking this up as a fix for v2009.08. Its a pretty trivial change.

- k

Quoted 31 lines
common/fdt_support.c +2 -2
index fc077e8..89164a1 100644
@@ -625,7 +625,7 @@ int fdt_resize(void *blob)
 }
 
 #ifdef CONFIG_PCI
-#define CONFIG_SYS_PCI_NR_INBOUND_WIN 3
+#define CONFIG_SYS_PCI_NR_INBOUND_WIN 4
 
 #define FDT_PCI_PREFETCH	(0x40000000)
 #define FDT_PCI_MEM32		(0x02000000)
@@ -655,7 +655,7 @@ int fdt_pci_dma_ranges(void *blob, int phb_off,  
 struct pci_controller *hose) {
 		size = (u64)hose->regions[r].size;
 
 		dma_range[0] = 0;
-		if (size > 0x100000000ull)
+		if (size >= 0x100000000ull)
 			dma_range[0] |= FDT_PCI_MEM64;
 		else
			dma_range[0] |= FDT_PCI_MEM32;
Signature · 6 lines
1.6.0.6

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#2 lore raw

PATCH 1/1 fdt: Fix fdt_pci_dma_ranges handling of 64-bit ranges

In reply to Kumar Gala

Dear Kumar Gala,

Quoted 10 lines · In message <[email protected]> you…

If the size of a region equal to 4G it can't be represnted in a 32-bit BAR so we should have marked that case as MEM64.

Additionally bump the number of inbound windows up to 4 to handle the fact that Freescale PPCs that have an implicit window for CCSRBAR.

---
 common/fdt_support.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

Applied, thanks.

Hope this is OK, Jerry.

Best regards,

Wolfgang Denk

Signature · 5 lines
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#3 lore raw

PATCH 1/1 fdt: Fix fdt_pci_dma_ranges handling of 64-bit ranges

Quoted 14 lines · Wolfgang Denk

Dear Kumar Gala,

Quoted 10 lines · In message <[email protected]> you…

If the size of a region equal to 4G it can't be represnted in a 32-bit BAR so we should have marked that case as MEM64.

Additionally bump the number of inbound windows up to 4 to handle the fact that Freescale PPCs that have an implicit window for CCSRBAR.

---
 common/fdt_support.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
Quoted 7 lines

Applied, thanks.

Hope this is OK, Jerry.

Best regards,

Wolfgang Denk

Yes, no problem. It is only peripherally related to fdt (fdt is the mechanism used, the logic is Kumar's bailiwick).

gvb