driver/fsl_pci: Added fsl_pci_init_port function to initialize a single PCIe port.

PATCH New Poonam Aggrwal 3 participants 4 messages Aug 20, 2009 PCI

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Poonam Aggrwal

author

2009-08-20 13:30 UTC #0 lore raw

PATCH 1/1 driver/fsl_pci: Added fsl_pci_init_port function to initialize a single PCIe port.

* Added a generic function fsl_pci_init_port in drivers/pci/fsl_pci.c to initialize a PCIe port.
* fsl_pci_init_port can be called from board specific pcie initialization routine, per-port.
* This will reduce the code redundancy in the most of the Freescale board specific PCIe inits.

Signed-off-by Poonam Aggrwal <[email protected]>

Signed-off-by Kumar Gala <[email protected]>

---
- applies on git.denx.de/u-boot-mpc85xx.git branch->next

 drivers/pci/fsl_pci_init.c |   41 +++++++++++++++++++++++++++++++++++++++++
 include/asm-ppc/fsl_pci.h  |   26 ++++++++++++++++++++++++++
 2 files changed, 67 insertions(+), 0 deletions(-)

drivers/pci/fsl_pci_init.c +41 -0

index ee89aaa..9e9e1b7 100644
@@ -412,6 +412,47 @@ void fsl_pci_init(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data)
 	}
 }
 
+int fsl_pci_init_port(struct fsl_pci_info *pci_info,
+				struct pci_controller *hose, int busno)
+{
+	volatile ccsr_fsl_pci_t *pci;
+	struct pci_region *r;
+
+	pci = (ccsr_fsl_pci_t *) pci_info->regs;
+
+	if (in_be32(&pci->pme_msg_det)) {
+		out_be32(&pci->pme_msg_det, 0xffffffff);
+		debug (" with errors.  Clearing.  Now 0x%08x",
+			pci->pme_msg_det);
+	}
+
+	r = hose->regions + hose->region_count;
+
+	/* outbound memory */
+	pci_set_region(r++,
+			pci_info->mem_bus,
+			pci_info->mem_phys,
+			pci_info->mem_size,
+			PCI_REGION_MEM);
+
+	/* outbound io */
+	pci_set_region(r++,
+			pci_info->io_bus,
+			pci_info->io_phys,
+			pci_info->io_size,
+			PCI_REGION_IO);
+
+	hose->region_count = r - hose->regions;
+	hose->first_busno = busno;
+
+	fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data);
+
+	printf("\n    PCIE%x on bus %02x - %02x\n", pci_info->pci_num,
+			hose->first_busno, hose->last_busno);
+
+	return(hose->last_busno + 1);
+}
+
 /* Enable inbound PCI config cycles for agent/endpoint interface */
 void fsl_pci_config_unlock(struct pci_controller *hose)
 {

include/asm-ppc/fsl_pci.h +26 -0

index b2ff0e9..2b6421a 100644
@@ -154,4 +154,30 @@ typedef struct ccsr_pci {
 	char	res24[252];
 } ccsr_fsl_pci_t;
 
+struct fsl_pci_info {
+	phys_size_t	regs;
+	pci_addr_t	mem_bus;
+	phys_size_t	mem_phys;
+	pci_size_t	mem_size;
+	pci_addr_t	io_bus;
+	phys_size_t	io_phys;
+	pci_size_t	io_size;
+	int		pci_num;
+};
+
+int fsl_pci_init_port(struct fsl_pci_info *pci_info,
+				struct pci_controller *hose, int busno);
+
+#define SET_STD_PCIE_INFO(x, num) \
+{			\
+	x.regs = CONFIG_SYS_PCIE##num##_ADDR;	\
+	x.mem_bus = CONFIG_SYS_PCIE##num##_MEM_BUS; \
+	x.mem_phys = CONFIG_SYS_PCIE##num##_MEM_PHYS; \
+	x.mem_size = CONFIG_SYS_PCIE##num##_MEM_SIZE; \
+	x.io_bus = CONFIG_SYS_PCIE##num##_IO_BUS; \
+	x.io_phys = CONFIG_SYS_PCIE##num##_IO_PHYS; \
+	x.io_size = CONFIG_SYS_PCIE##num##_IO_SIZE; \
+	x.pci_num = num; \
+}
+
 #endif

Signature · 1 line

1.5.6.5

Wolfgang Denk

NAK

2009-08-20 15:12 UTC #1 lore raw

PATCH 1/1 driver/fsl_pci: Added fsl_pci_init_port function to initialize a single PCIe port.

Dear Poonam Aggrwal,

Quoted 10 lines · In message <[email protected]>…

* Added a generic function fsl_pci_init_port in drivers/pci/fsl_pci.c to initialize a PCIe port.
* fsl_pci_init_port can be called from board specific pcie initialization routine, per-port.
* This will reduce the code redundancy in the most of the Freescale board specific PCIe inits.
Signed-off-by Poonam Aggrwal <[email protected]>
Signed-off-by Kumar Gala <[email protected]>
---

NAK.

I see just dead code added, without any users.

If this gets used somewhere, this should be visible in the patch, and lead to code removed somewhere?

Best regards,

Wolfgang Denk

Signature · 4 lines

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
You cannot propel yourself forward by patting yourself on the back.

Kumar Gala

2009-08-20 15:24 UTC #2 lore raw

PATCH 1/1 driver/fsl_pci: Added fsl_pci_init_port function to initialize a single PCIe port.

Quoted 18 lines · Wolfgang Denk

Dear Poonam Aggrwal,
In message <[email protected]
Quoted 11 lines
you wrote:
* Added a generic function fsl_pci_init_port in drivers/pci/ fsl_pci.c
to initialize a PCIe port.
* fsl_pci_init_port can be called from board specific pcie initialization
routine, per-port.
* This will reduce the code redundancy in the most of the Freescale board
specific PCIe inits.
Quoted 3 lines
Signed-off-by Poonam Aggrwal <[email protected]>
Signed-off-by Kumar Gala <[email protected]>
---

Quoted 6 lines

NAK.
I see just dead code added, without any users.
If this gets used somewhere, this should be visible in the patch, and lead to code removed somewhere?

It gets used in the patch 'Added PCIe support for P1 P2 RDB'. I also will look at using it on other boards to remove code.

However I don't think we need one patch that adds the interface and does the board code changes or additions (unless you have to do them to keep compiling sane).

I agree this should have been label'd 1/2 and the 'Added PCIe support for P1/P2 RDB' as 2/2.

- k

Aggrwal Poonam-B10812

author

2009-08-20 15:38 UTC #3 lore raw

PATCH 1/1 driver/fsl_pci: Added fsl_pci_init_port function to initialize a single PCIe port.

Quoted 44 lines

-----Original Message-----
From: Kumar Gala [mailto:galak at kernel.crashing.org]
Sent: Thursday, August 20, 2009 8:54 PM
To: Wolfgang Denk
Cc: Aggrwal Poonam-B10812; u-boot at lists.denx.de
Subject: Re: [U-Boot] [PATCH] driver/fsl_pci: Added fsl_pci_init_port function to initialize a single PCIe port.
Quoted 12 lines · Wolfgang Denk
Dear Poonam Aggrwal,
In message <[email protected]
Quoted 8 lines
you wrote:
* Added a generic function fsl_pci_init_port in drivers/pci/ fsl_pci.c
to initialize a PCIe port.
* fsl_pci_init_port can be called from board specific pcie initialization
routine, per-port.
* This will reduce the code redundancy in the most of the
Freescale
Quoted 7 lines
Quoted 6 lines
board
specific PCIe inits.
Signed-off-by Poonam Aggrwal <[email protected]>
Signed-off-by Kumar Gala <[email protected]>
---
Quoted 5 lines
NAK.
I see just dead code added, without any users.
If this gets used somewhere, this should be visible in the
patch, and
Quoted 1 line
lead to code removed somewhere?
It gets used in the patch 'Added PCIe support for P1 P2 RDB'.
I also will look at using it on other boards to remove code.

Quoted 7 lines

However I don't think we need one patch that adds the interface and does the board code changes or additions (unless you have to do them to keep compiling sane).
I agree this should have been label'd 1/2 and the 'Added PCIe support for P1/P2 RDB' as 2/2.

Yes my mistake here, I should have shown the patch dependancy.

Quoted 3 lines

- k