Skip to contentSkip to conversation

New hardware RNG for Octeon SOCs (v2)

PATCH In review David Daney 3 participants 7 messages Aug 20, 2009 – Aug 27, 2009

Subsystems (2)
lore
Share & tools
lore
#0 lore raw

cover New hardware RNG for Octeon SOCs (v2)

Based on feedback from AKPM, I have a new revision of the Octeon hardware RNG driver.

The changes from v1 are minor, just eliminating some bogus casting by accessing the driver state by embedding struct hwrng in the driver data, which is now accessed with the container_of() trick.

The first patch adds some port definitions and the octeon_rng platform device. The second is the driver.

Since Octeon is a mips port, we might want to merge both patches via Ralf's linux-mips.org tree.

David Daney (2):
MIPS: Octeon: Add hardware RNG platform device.
hw_random: Add hardware RNG for Octeon SOCs.

 arch/mips/cavium-octeon/setup.c              |   43 ++++++++
 arch/mips/include/asm/octeon/cvmx-rnm-defs.h |   88 +++++++++++++++
 drivers/char/hw_random/Kconfig               |   13 +++
 drivers/char/hw_random/Makefile              |    1 +
 drivers/char/hw_random/octeon-rng.c          |  147 
++++++++++++++++++++++++++
 5 files changed, 292 insertions(+), 0 deletions(-)
 create mode 100644 arch/mips/include/asm/octeon/cvmx-rnm-defs.h
 create mode 100644 drivers/char/hw_random/octeon-rng.c
#1 lore raw

PATCH 1/2 MIPS: Octeon: Add hardware RNG platform device.

Add a platform device for the Octeon Random Number Generator (RNG).

---
 arch/mips/cavium-octeon/setup.c              |   43 +++++++++++++
 arch/mips/include/asm/octeon/cvmx-rnm-defs.h |   88 ++++++++++++++++++++++++++
 2 files changed, 131 insertions(+), 0 deletions(-)
 create mode 100644 arch/mips/include/asm/octeon/cvmx-rnm-defs.h
arch/mips/cavium-octeon/setup.c +43 -0
index bc0c869..d8cf674 100644
@@ -33,6 +33,7 @@
 #include <asm/time.h>
 
 #include <asm/octeon/octeon.h>
+#include <asm/octeon/cvmx-rnm-defs.h>
 
 #ifdef CONFIG_CAVIUM_DECODE_RSL
 extern void cvmx_interrupt_rsl_decode(void);
@@ -931,3 +932,45 @@ out:
 	return ret;
 }
 device_initcall(octeon_cf_device_init);
+
+/* Octeon Random Number Generator.  */
+static int __init octeon_rng_device_init(void)
+{
+	struct platform_device *pd;
+	int ret = 0;
+
+	struct resource rng_resources[] = {
+		{
+			.flags	= IORESOURCE_MEM,
+			.start	= XKPHYS_TO_PHYS(CVMX_RNM_CTL_STATUS),
+			.end	= XKPHYS_TO_PHYS(CVMX_RNM_CTL_STATUS) + 0xf
+		}, {
+			.flags	= IORESOURCE_MEM,
+			.start	= cvmx_build_io_address(8, 0),
+			.end	= cvmx_build_io_address(8, 0) + 0x7
+		}
+	};
+
+	pd = platform_device_alloc("octeon_rng", -1);
+	if (!pd) {
+		ret = -ENOMEM;
+		goto out;
+	}
+
+	ret = platform_device_add_resources(pd, rng_resources,
+					    ARRAY_SIZE(rng_resources));
+	if (ret)
+		goto fail;
+
+	ret = platform_device_add(pd);
+	if (ret)
+		goto fail;
+
+	return ret;
+fail:
+	platform_device_put(pd);
+
+out:
+	return ret;
+}
+device_initcall(octeon_rng_device_init);
arch/mips/include/asm/octeon/cvmx-rnm-defs.h new file +88 -0

88 lines not on this page · raw message

Signature · 1 line
1.6.0.6
maintainer Acked-by on v1 1/2
#2 lore raw

Re: [PATCH 1/2] MIPS: Octeon: Add hardware RNG platform device.

Quoted 3 lines · David Daney

Add a platform device for the Octeon Random Number Generator (RNG).

Signature · 4 lines
Visit Openswan at http://www.openswan.org/
Email: Herbert Xu ~{PmV>HI~} <[email protected]>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
#4 lore raw

PATCH 2/2 hw_random: Add hardware RNG for Octeon SOCs.

In reply to David Daney
---
 drivers/char/hw_random/Kconfig      |   13 +++
 drivers/char/hw_random/Makefile     |    1 +
 drivers/char/hw_random/octeon-rng.c |  147 +++++++++++++++++++++++++++++++++++
 3 files changed, 161 insertions(+), 0 deletions(-)
 create mode 100644 drivers/char/hw_random/octeon-rng.c
drivers/char/hw_random/Kconfig +13 -0
index ce66a70..121b782 100644
@@ -126,6 +126,19 @@ config HW_RANDOM_OMAP
 
  	  If unsure, say Y.
 
+config HW_RANDOM_OCTEON
+	tristate "Octeon Random Number Generator support"
+	depends on HW_RANDOM && CPU_CAVIUM_OCTEON
+	default HW_RANDOM
+ 	---help---
+ 	  This driver provides kernel-side support for the Random Number
+	  Generator hardware found on Octeon processors.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called octeon-rng.
+
+ 	  If unsure, say Y.
+
 config HW_RANDOM_PASEMI
 	tristate "PA Semi HW Random Number Generator support"
 	depends on HW_RANDOM && PPC_PASEMI
drivers/char/hw_random/Makefile +1 -0
index 676828b..5eeb130 100644
@@ -17,3 +17,4 @@ obj-$(CONFIG_HW_RANDOM_PASEMI) += pasemi-rng.o
 obj-$(CONFIG_HW_RANDOM_VIRTIO) += virtio-rng.o
 obj-$(CONFIG_HW_RANDOM_TX4939) += tx4939-rng.o
 obj-$(CONFIG_HW_RANDOM_MXC_RNGA) += mxc-rnga.o
+obj-$(CONFIG_HW_RANDOM_OCTEON) += octeon-rng.o
drivers/char/hw_random/octeon-rng.c new file +147 -0

147 lines not on this page · raw message

Signature · 1 line
1.6.0.6