sparc64: switch to MMU global registers in more MMU related traps

PATCH Applied Igor V. Kovalenko 2 participants 2 messages Jan 3, 2010

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Igor V. Kovalenko

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2010-01-03 12:01 UTC #0 lore raw

PATCH 1/1 sparc64: switch to MMU global registers in more MMU related traps

From: Igor V. Kovalenko <[email protected]>

- extended range of MMU related traps which use MMU global registers, as listed in Ultrasparc-IIi document
- no visible changes, since emulation do not cause added traps

Signed-off-by Igor V. Kovalenko <[email protected]>

---
 target-sparc/op_helper.c |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

target-sparc/op_helper.c +3 -3

index c3cc0a4..362a557 100644
@@ -3447,10 +3447,10 @@ void do_interrupt(CPUState *env)
         change_pstate(PS_PEF | PS_PRIV | PS_IG);
         break;
     case TT_TFAULT:
-    case TT_TMISS:
     case TT_DFAULT:
-    case TT_DMISS:
-    case TT_DPROT:
+    case TT_TMISS ... TT_TMISS+3:
+    case TT_DMISS ... TT_DMISS+3:
+    case TT_DPROT ... TT_DPROT+3:
         change_pstate(PS_PEF | PS_PRIV | PS_MG);
         break;
     default:

Blue Swirl

Applied

2010-01-03 12:24 UTC #1 lore raw

Thanks, applied.

Quoted 33 lines · Igor V. Kovalenko

From: Igor V. Kovalenko <[email protected]>
- extended range of MMU related traps which use MMU global registers, as listed in Ultrasparc-IIi document
- no visible changes, since emulation do not cause added traps
Signed-off-by Igor V. Kovalenko <[email protected]>
---
target-sparc/op_helper.c | 6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)
target-sparc/op_helper.c +0 -0
index c3cc0a4..362a557 100644
@@ -3447,10 +3447,10 @@ void do_interrupt(CPUState *env)
         change_pstate(PS_PEF | PS_PRIV | PS_IG);
         break;
case TT_TFAULT:
- case TT_TMISS:
case TT_DFAULT:
- case TT_DMISS:
- case TT_DPROT:
+ case TT_TMISS ... TT_TMISS+3:
+ case TT_DMISS ... TT_DMISS+3:
+ case TT_DPROT ... TT_DPROT+3:
change_pstate(PS_PEF | PS_PRIV | PS_MG);
break;
default: