eukrea_cpuimx27 : update timings

PATCH In review Eric Benard 2 participants 5 messages Jan 15, 2010 – Jan 16, 2010

Subsystems (5)

Arm (32-bit) Arm sub-architectures Arm i.MX and Layerscape Arm/actions semi architecture +1 more subsystems

lore

Share & tools

lore

Eric Benard

author

2010-01-15 10:50 UTC #0 lore raw

PATCH 1/4 eukrea_cpuimx27 : update timings

use optimized DDR, NOR & QuadUART timings

Signed-off-by Eric Benard <[email protected]>

---
 board/eukrea_cpuimx27/eukrea_cpuimx27.c |   12 ++++++------
 board/eukrea_cpuimx27/lowlevel_init.S   |    4 ++--
 2 files changed, 8 insertions(+), 8 deletions(-)

board/eukrea_cpuimx27/eukrea_cpuimx27.c +6 -6

index 6878044..629399f 100644
@@ -198,9 +198,9 @@ static int eukrea_cpuimx27_devices_init(void)
 	eukrea_cpuimx27_mmu_init();
 
 	/* configure 16 bit nor flash on cs0 */
-	CS0U = 0x0000CC03;
-	CS0L = 0xa0330D01;
-	CS0A = 0x00220800;
+	CS0U = 0x00008F03;
+	CS0L = 0xA0330D01;
+	CS0A = 0x002208C0;
 
 	/* initizalize gpios */
 	for (i = 0; i < ARRAY_SIZE(mode); i++)

@@ -244,9 +244,9 @@ static int eukrea_cpuimx27_console_init(void)
 #endif
 	/* configure 8 bit UART on cs3 */
 	FMCR &= ~0x2;
-	CS3U = 0x0000DCF6;
-	CS3L = 0x444A4541;
-	CS3A = 0x44443302;
+	CS3U = 0x0000D603;
+	CS3L = 0x0D1D0D01;
+	CS3A = 0x00D20000;
 #ifdef CONFIG_DRIVER_SERIAL_NS16550
 	register_device(&quad_uart_serial_device);
 #endif

board/eukrea_cpuimx27/lowlevel_init.S +2 -2

index 4622af8..5295a8a 100644
@@ -8,10 +8,10 @@
 
 #if defined CONFIG_EUKREA_CPUIMX27_SDRAM_256MB
 #define ROWS0	ESDCTL_ROW14
-#define CFG0	0x00695729
+#define CFG0	0x0029572D
 #elif defined CONFIG_EUKREA_CPUIMX27_SDRAM_128MB
 #define ROWS0	ESDCTL_ROW13
-#define CFG0	0x00395B28
+#define CFG0	0x00095728
 #endif
 
 #define ESDCTL0_VAL (ESDCTL0_SDE | ROWS0 | ESDCTL0_COL10)

Signature · 7 lines

1.6.3.3


_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Eric Benard

author

2010-01-15 10:50 UTC #1 lore raw

PATCH 2/4 Add necessary clocks & defines to get I2C support for i.MX27

Signed-off-by Eric Benard <[email protected]>

---
 arch/arm/mach-imx/include/mach/imx27-regs.h |    1 +
 arch/arm/mach-imx/speed-imx27.c             |    5 +++++
 2 files changed, 6 insertions(+), 0 deletions(-)

arch/arm/mach-imx/include/mach/imx27-regs.h +1 -0

index 33d67d6..6c31ccd 100644
@@ -16,6 +16,7 @@
 #define IMX_UART2_BASE             (0x0b000 + IMX_IO_BASE)
 #define IMX_UART3_BASE             (0x0c000 + IMX_IO_BASE)
 #define IMX_UART4_BASE             (0x0d000 + IMX_IO_BASE)
+#define IMX_I2C1_BASE              (0x12000 + IMX_IO_BASE)
 #define IMX_GPIO_BASE              (0x15000 + IMX_IO_BASE)
 #define IMX_TIM4_BASE              (0x19000 + IMX_IO_BASE)
 #define IMX_TIM5_BASE              (0x1a000 + IMX_IO_BASE)

arch/arm/mach-imx/speed-imx27.c +5 -0

index deaca1e..cdcd419 100644
@@ -154,6 +154,11 @@ ulong imx_get_lcdclk(void)
 	return imx_get_perclk3();
 }
 
+ulong imx_get_i2cclk(void)
+{
+	return imx_get_ipgclk();
+}
+
 void imx_dump_clocks(void)
 {
 	uint32_t	cid = CID;

Signature · 7 lines

1.6.3.3


_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Eric Benard

author

2010-01-15 10:50 UTC #2 lore raw

PATCH 3/4 I2C : add NS LP3972 PMIC support

Signed-off-by Eric Benard <[email protected]>

---
 drivers/i2c/Kconfig  |    3 +
 drivers/i2c/Makefile |    1 +
 drivers/i2c/lp3972.c |  110 ++++++++++++++++++++++++++++++++++++++++++++++++++
 include/i2c/lp3972.h |    7 +++
 4 files changed, 121 insertions(+), 0 deletions(-)
 create mode 100644 drivers/i2c/lp3972.c
 create mode 100644 include/i2c/lp3972.h

drivers/i2c/Kconfig +3 -0

index 46723ed..f1b2949 100644
@@ -13,4 +13,7 @@ config DRIVER_I2C_MC13892
 config DRIVER_I2C_MC9SDZ60
 	bool "MC9SDZ60 driver"
 
+config DRIVER_I2C_LP3972
+	bool "LP3972 driver"
+
 endif

drivers/i2c/Makefile +1 -0

index 5dd642f..62d030b 100644
@@ -4,3 +4,4 @@ obj-$(CONFIG_DRIVER_I2C_IMX) += i2c-imx.o
 
 obj-$(CONFIG_DRIVER_I2C_MC13892) += mc13892.o
 obj-$(CONFIG_DRIVER_I2C_MC9SDZ60) += mc9sdz60.o
+obj-$(CONFIG_DRIVER_I2C_LP3972) += lp3972.o

drivers/i2c/lp3972.c new file +110 -0

110 lines not on this page · raw message

include/i2c/lp3972.h new file +7 -0

new file mode 100644
index 0000000..edb5801
@@ -0,0 +1,7 @@
+#ifndef __ASM_ARCH_LP3972_H
+#define __ASM_ARCH_LP3972_H
+
+extern struct i2c_client *lp3972_get_client(void);
+
+#endif /* __ASM_ARCH_LP3972_H */
+

Signature · 7 lines

1.6.3.3


_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Eric Benard

author

2010-01-15 10:50 UTC #3 lore raw

PATCH 4/4 Eukrea CPUIMX27 : add I2C and LP3972 support

This allows to properly setup the voltage on LCD pins at boot.

Signed-off-by Eric Benard <[email protected]>

---
 board/eukrea_cpuimx27/eukrea_cpuimx27.c |   29 +++++++++++++++++++++++++++++
 1 files changed, 29 insertions(+), 0 deletions(-)

board/eukrea_cpuimx27/eukrea_cpuimx27.c +29 -0

index 629399f..0908dca 100644
@@ -21,6 +21,7 @@
  */
 
 #include <common.h>
+#include <errno.h>
 #include <net.h>
 #include <cfi_flash.h>
 #include <init.h>

@@ -42,6 +43,8 @@
 #include <mach/imx-pll.h>
 #include <ns16550.h>
 #include <asm/mmu.h>
+#include <i2c/i2c.h>
+#include <i2c/lp3972.h>
 
 static struct device_d cfi_dev = {
 	.name     = "cfi_flash",

@@ -140,6 +143,17 @@ static struct device_d quad_uart_serial_device = {
 };
 #endif
 
+static struct i2c_board_info i2c_devices[] = {
+	{
+		I2C_BOARD_INFO("lp3972", 0x34),
+	},
+};
+
+static struct device_d i2c_dev = {
+	.name		= "i2c-imx",
+	.map_base	= IMX_I2C1_BASE,
+};
+
 #ifdef CONFIG_MMU
 static void eukrea_cpuimx27_mmu_init(void)
 {

@@ -187,6 +201,8 @@ static int eukrea_cpuimx27_devices_init(void)
 		PD15_AOUT_FEC_COL,
 		PD16_AIN_FEC_TX_ER,
 		PF23_AIN_FEC_TX_EN,
+		PD17_PF_I2C_DATA,
+		PD18_PF_I2C_CLK,
 #ifdef CONFIG_DRIVER_SERIAL_IMX
 		PE12_PF_UART1_TXD,
 		PE13_PF_UART1_RXD,

@@ -213,6 +229,10 @@ static int eukrea_cpuimx27_devices_init(void)
 	register_device(&nand_dev);
 	register_device(&sdram_dev);
 
+	PCCR0 |= PCCR0_I2C1_EN;
+	i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
+	register_device(&i2c_dev);
+
 	devfs_add_partition("nor0", 0x00000, 0x40000, PARTITION_FIXED, "self0");
 	devfs_add_partition("nor0", 0x40000, 0x20000, PARTITION_FIXED, "env0");
 	protect_file("/dev/env0", 1);

@@ -257,9 +277,18 @@ console_initcall(eukrea_cpuimx27_console_init);
 
 static int eukrea_cpuimx27_late_init(void)
 {
+	struct i2c_client *client;
+	u8 reg[1];
+
 	console_flush();
 	register_device(&fec_dev);
 
+	client = lp3972_get_client();
+	if (!client)
+		return -ENODEV;
+	reg[0] = 0xa0;
+	i2c_write_reg(client, 0x39, reg, sizeof(reg));
+
 	return 0;
 }

Signature · 7 lines

1.6.3.3


_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox

Sascha Hauer

maintainer

2010-01-16 11:33 UTC #4 lore raw

In reply to Eric Benard

Hi Eric,

Quoted 1 line · Eric Benard

use optimized DDR, NOR & QuadUART timings

Ok, applied for -next.

Sascha

Quoted 58 lines

Signed-off-by Eric Benard <[email protected]>

---
 board/eukrea_cpuimx27/eukrea_cpuimx27.c |   12 ++++++------
 board/eukrea_cpuimx27/lowlevel_init.S   |    4 ++--
 2 files changed, 8 insertions(+), 8 deletions(-)

board/eukrea_cpuimx27/eukrea_cpuimx27.c +6 -6

index 6878044..629399f 100644
@@ -198,9 +198,9 @@ static int eukrea_cpuimx27_devices_init(void)
 	eukrea_cpuimx27_mmu_init();
 
 	/* configure 16 bit nor flash on cs0 */
-	CS0U = 0x0000CC03;
-	CS0L = 0xa0330D01;
-	CS0A = 0x00220800;
+	CS0U = 0x00008F03;
+	CS0L = 0xA0330D01;
+	CS0A = 0x002208C0;
 
 	/* initizalize gpios */
 	for (i = 0; i < ARRAY_SIZE(mode); i++)

@@ -244,9 +244,9 @@ static int eukrea_cpuimx27_console_init(void)
 #endif
 	/* configure 8 bit UART on cs3 */
 	FMCR &= ~0x2;
-	CS3U = 0x0000DCF6;
-	CS3L = 0x444A4541;
-	CS3A = 0x44443302;
+	CS3U = 0x0000D603;
+	CS3L = 0x0D1D0D01;
+	CS3A = 0x00D20000;
 #ifdef CONFIG_DRIVER_SERIAL_NS16550
 	register_device(&quad_uart_serial_device);
 #endif

board/eukrea_cpuimx27/lowlevel_init.S +2 -2

index 4622af8..5295a8a 100644
@@ -8,10 +8,10 @@
 
 #if defined CONFIG_EUKREA_CPUIMX27_SDRAM_256MB
 #define ROWS0	ESDCTL_ROW14
-#define CFG0	0x00695729
+#define CFG0	0x0029572D
 #elif defined CONFIG_EUKREA_CPUIMX27_SDRAM_128MB
 #define ROWS0	ESDCTL_ROW13
-#define CFG0	0x00395B28
+#define CFG0	0x00095728
 #endif
 
 #define ESDCTL0_VAL (ESDCTL0_SDE | ROWS0 | ESDCTL0_COL10)

Signature · 1 line

1.6.3.3

Signature · 9 lines

Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox