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spinlock: don't use deprecated barriers on ARMv7

PATCH New Rabin Vincent 2 participants 4 messages Jan 13, 2010 – Jan 25, 2010

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Arm (32-bit) Locking primitives
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Rabin Vincent

author
#0 lore raw

PATCH 1/1 spinlock: don't use deprecated barriers on ARMv7

On ARMv7, the use of the cp15 operations for barriers is deprecated in favour of the isb, dsb, and dmb instructions. Change the locking functions to use the appropriate type of dsb for the architecture being built for.

Signed-off-by Rabin Vincent <[email protected]>
---
 arch/arm/include/asm/spinlock.h |   20 +++++++-------------
 arch/arm/include/asm/system.h   |    8 ++++++++
 2 files changed, 15 insertions(+), 13 deletions(-)
arch/arm/include/asm/spinlock.h +7 -13
index c91c64c..9ed1064 100644
@@ -69,13 +69,11 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock)
 
 	__asm__ __volatile__(
 "	str	%1, [%0]\n"
-#ifdef CONFIG_CPU_32v6K
-"	mcr	p15, 0, %1, c7, c10, 4\n" /* DSB */
-"	sev"
-#endif
 	:
 	: "r" (&lock->lock), "r" (0)
 	: "cc");
+
+	smp_sev();
 }
 
 /*

@@ -132,13 +130,11 @@ static inline void arch_write_unlock(arch_rwlock_t *rw)
 
 	__asm__ __volatile__(
 	"str	%1, [%0]\n"
-#ifdef CONFIG_CPU_32v6K
-"	mcr	p15, 0, %1, c7, c10, 4\n" /* DSB */
-"	sev\n"
-#endif
 	:
 	: "r" (&rw->lock), "r" (0)
 	: "cc");
+
+	smp_sev();
 }
 
 /* write_can_lock - would write_trylock() succeed? */

@@ -188,14 +184,12 @@ static inline void arch_read_unlock(arch_rwlock_t *rw)
 "	strex	%1, %0, [%2]\n"
 "	teq	%1, #0\n"
 "	bne	1b"
-#ifdef CONFIG_CPU_32v6K
-"\n	cmp	%0, #0\n"
-"	mcreq   p15, 0, %0, c7, c10, 4\n"
-"	seveq"
-#endif
 	: "=&r" (tmp), "=&r" (tmp2)
 	: "r" (&rw->lock)
 	: "cc");
+
+	if (tmp == 0)
+		smp_sev();
 }
 
 static inline int arch_read_trylock(arch_rwlock_t *rw)
arch/arm/include/asm/system.h +8 -0
index 058e7e9..0b371ba 100644
@@ -164,6 +164,14 @@ extern unsigned int user_debug;
 #define set_mb(var, value)	do { var = value; smp_mb(); } while (0)
 #define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
 
+static inline void smp_sev(void)
+{
+#if defined(CONFIG_SMP) && defined(CONFIG_CPU_32v6K)
+	dsb();
+	__asm__ __volatile__ ("sev" : : : "memory");
+#endif
+}
+
 extern unsigned long cr_no_alignment;	/* defined in entry-armv.S */
 extern unsigned long cr_alignment;	/* defined in entry-armv.S */
Signature · 1 line
1.6.5
#1 lore raw

PATCH 1/1 spinlock: don't use deprecated barriers on ARMv7

Quoted 4 lines · Rabin Vincent

On ARMv7, the use of the cp15 operations for barriers is deprecated in favour of the isb, dsb, and dmb instructions. Change the locking functions to use the appropriate type of dsb for the architecture being built for.

Umm...

arch/arm/include/asm/system.h extern unsigned int user_debug; · line 171

Quoted 13 lines
arch/arm/include/asm/system.h +5 -0
index 058e7e9..0b371ba 100644
@@ -164,6 +164,14 @@ extern unsigned int user_debug;
 #define set_mb(var, value)	do { var = value; smp_mb(); } while (0)
 #define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
 
+static inline void smp_sev(void)
+{
+#if defined(CONFIG_SMP) && defined(CONFIG_CPU_32v6K)
+	dsb();
+	__asm__ __volatile__ ("sev" : : : "memory");

Why are you introducing a compiler memory barrier where there was none before?

author
#2 lore raw

PATCH 1/1 spinlock: don't use deprecated barriers on ARMv7

Quoted 8 lines · Russell King - ARM Linux

arch/arm/include/asm/system.h extern unsigned int user_debug; · line 171

Quoted 5 lines
arch/arm/include/asm/system.h +5 -0
+static inline void smp_sev(void)
+{
+#if defined(CONFIG_SMP) && defined(CONFIG_CPU_32v6K)
+	dsb();
+	__asm__ __volatile__ ("sev" : : : "memory");

Why are you introducing a compiler memory barrier where there was none before?

I've removed it (and the additional memory barrier from the dsb() helper) in the updated patch below. I've also moved the helper into spinlock.h itself, to avoid unnecessarily cluttering system.h:

#3 lore raw

PATCH 1/1 spinlock: don't use deprecated barriers on ARMv7

Quoted 15 lines · Rabin Vincent
Quoted 8 lines · Russell King - ARM Linux

arch/arm/include/asm/system.h extern unsigned int user_debug; · line 171

Quoted 5 lines
arch/arm/include/asm/system.h +5 -0
+static inline void smp_sev(void)
+{
+#if defined(CONFIG_SMP) && defined(CONFIG_CPU_32v6K)
+	dsb();
+	__asm__ __volatile__ ("sev" : : : "memory");

Why are you introducing a compiler memory barrier where there was none before?

I've removed it (and the additional memory barrier from the dsb() helper) in the updated patch below. I've also moved the helper into spinlock.h itself, to avoid unnecessarily cluttering system.h:

Quoted 1 line

From a701fe2c665f9d80aa2c96ae6f312a25ee1136a2 Mon Sep 17 00:00:00 2001

Quoted 8 lines

From: Rabin Vincent <[email protected]>
Date: Mon, 11 Jan 2010 20:36:26 +0530
Subject: [PATCH] spinlock: don't use deprecated barriers on ARMv7

On ARMv7, the use of the cp15 operations for barriers is deprecated in favour of the isb, dsb, and dmb instructions. Change the locking functions to use the appropriate type of dsb for the architecture being built for.

This version looks better, thanks. Care to send it to the patch system?