ARM: IMX31: configure pins iomux for SDHC setup on litekit board.
Subsystems (2)
PATCH 1/1 ARM: IMX31: configure pins iomux for SDHC setup on litekit board.
This patch adds SDHC support, and corrects current pins setup.
--- arch/arm/mach-mx3/mx31lite-db.c | 28 ++++++++++++++++++++-------- 1 files changed, 20 insertions(+), 8 deletions(-)
arch/arm/mach-mx3/mx31lite-db.c +20 -8
@@ -67,6 +67,13 @@ static unsigned int litekit_db_board_pins[] __initdata = {MX31_PIN_CSPI1_SS0__SS0 ,MX31_PIN_CSPI1_SS1__SS1 ,MX31_PIN_CSPI1_SS2__SS2 , +/* SDHC1 */ +MX31_PIN_SD1_DATA0__SD1_DATA0 , +MX31_PIN_SD1_DATA1__SD1_DATA1 , +MX31_PIN_SD1_DATA2__SD1_DATA2 , +MX31_PIN_SD1_DATA3__SD1_DATA3 , +MX31_PIN_SD1_CLK__SD1_CLK , + MX31_PIN_SD1_CMD__SD1_CMD, };/* UART */
@@ -79,11 +86,11 @@ static struct imxuart_platform_data uart_pdata __initdata = {static int gpio_det, gpio_wp;#define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ - PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) + PAD_CTL_ODE_CMOS)static int mxc_mmc1_get_ro (struct device *dev) { -return gpio_get_value (IOMUX_TO_GPIO (MX31_PIN_LCS0 )); +return gpio_get_value (IOMUX_TO_GPIO (MX31_PIN_GPIO1_6 )); } static int mxc_mmc1_init(struct device *dev,
@@ -94,12 +101,17 @@ static int mxc_mmc1_init(struct device *dev, gpio_det =IOMUX_TO_GPIO (MX31_PIN_DCD_DCE1 ); gpio_wp =IOMUX_TO_GPIO (MX31_PIN_GPIO1_6 ); -mxc_iomux_set_pad (MX31_PIN_SD1_DATA0 ,MMC_PAD_CFG ); -mxc_iomux_set_pad (MX31_PIN_SD1_DATA1 ,MMC_PAD_CFG ); -mxc_iomux_set_pad (MX31_PIN_SD1_DATA2 ,MMC_PAD_CFG ); -mxc_iomux_set_pad (MX31_PIN_SD1_DATA3 ,MMC_PAD_CFG ); +mxc_iomux_set_pad (MX31_PIN_SD1_DATA0 , +MMC_PAD_CFG |PAD_CTL_PUE_PUD |PAD_CTL_100K_PU ); +mxc_iomux_set_pad (MX31_PIN_SD1_DATA1 , +MMC_PAD_CFG |PAD_CTL_PUE_PUD |PAD_CTL_100K_PU ); +mxc_iomux_set_pad (MX31_PIN_SD1_DATA2 , +MMC_PAD_CFG |PAD_CTL_PUE_PUD |PAD_CTL_100K_PU ); +mxc_iomux_set_pad (MX31_PIN_SD1_DATA3 , +MMC_PAD_CFG |PAD_CTL_PUE_PUD |PAD_CTL_100K_PU ); +mxc_iomux_set_pad (MX31_PIN_SD1_CMD , +MMC_PAD_CFG |PAD_CTL_PUE_PUD |PAD_CTL_100K_PU );mxc_iomux_set_pad (MX31_PIN_SD1_CLK ,MMC_PAD_CFG ); -mxc_iomux_set_pad (MX31_PIN_SD1_CMD ,MMC_PAD_CFG ); ret =gpio_request (gpio_det,"MMC detect" );if (ret)
@@ -133,7 +145,7 @@ static void mxc_mmc1_exit(struct device *dev, void *data) {gpio_free (gpio_det);gpio_free (gpio_wp); -free_irq (IOMUX_TO_IRQ (MX31_PIN_GPIO1_1 ), data); +free_irq (IOMUX_TO_IRQ (MX31_PIN_DCD_DCE1 ), data); }static struct imxmmc_platform_data mmc_pdata = {
Signature · 1 line
1.6.5.4
PATCH 1/1 ARM: IMX31: configure pins iomux for SDHC setup on litekit board.
Quoted 1 line · Vladimir Zapolskiy
This patch adds SDHC support, and corrects current pins setup.
Just double-checked the schematics and it seems I indeed got the read-only pin wrong. And I didn't need the 100K pulls, SDHC/MMC worked fine for me without. But I'm happy to add them, so
Thanks for working on this.
Daniel
Quoted 74 lines
Signed-off-by Vladimir Zapolskiy <[email protected]>Cc Daniel Mack <[email protected]>Cc Sascha Hauer <[email protected]>--- arch/arm/mach-mx3/mx31lite-db.c | 28 ++++++++++++++++++++-------- 1 files changed, 20 insertions(+), 8 deletions(-)arch/arm/mach-mx3/mx31lite-db.c +20
-8@@ -67,6 +67,13 @@ static unsigned int litekit_db_board_pins[] __initdata = {MX31_PIN_CSPI1_SS0__SS0 ,MX31_PIN_CSPI1_SS1__SS1 ,MX31_PIN_CSPI1_SS2__SS2 , +/* SDHC1 */ +MX31_PIN_SD1_DATA0__SD1_DATA0 , +MX31_PIN_SD1_DATA1__SD1_DATA1 , +MX31_PIN_SD1_DATA2__SD1_DATA2 , +MX31_PIN_SD1_DATA3__SD1_DATA3 , +MX31_PIN_SD1_CLK__SD1_CLK , + MX31_PIN_SD1_CMD__SD1_CMD, };/* UART */ @@ -79,11 +86,11 @@ static struct imxuart_platform_data uart_pdata __initdata = {static int gpio_det, gpio_wp;#define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ - PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) + PAD_CTL_ODE_CMOS)static int mxc_mmc1_get_ro (struct device *dev) { -return gpio_get_value (IOMUX_TO_GPIO (MX31_PIN_LCS0 )); +return gpio_get_value (IOMUX_TO_GPIO (MX31_PIN_GPIO1_6 )); } static int mxc_mmc1_init(struct device *dev,@@ -94,12 +101,17 @@ static int mxc_mmc1_init(struct device *dev, gpio_det =IOMUX_TO_GPIO (MX31_PIN_DCD_DCE1 ); gpio_wp =IOMUX_TO_GPIO (MX31_PIN_GPIO1_6 ); -mxc_iomux_set_pad (MX31_PIN_SD1_DATA0 ,MMC_PAD_CFG ); -mxc_iomux_set_pad (MX31_PIN_SD1_DATA1 ,MMC_PAD_CFG ); -mxc_iomux_set_pad (MX31_PIN_SD1_DATA2 ,MMC_PAD_CFG ); -mxc_iomux_set_pad (MX31_PIN_SD1_DATA3 ,MMC_PAD_CFG ); +mxc_iomux_set_pad (MX31_PIN_SD1_DATA0 , +MMC_PAD_CFG |PAD_CTL_PUE_PUD |PAD_CTL_100K_PU ); +mxc_iomux_set_pad (MX31_PIN_SD1_DATA1 , +MMC_PAD_CFG |PAD_CTL_PUE_PUD |PAD_CTL_100K_PU ); +mxc_iomux_set_pad (MX31_PIN_SD1_DATA2 , +MMC_PAD_CFG |PAD_CTL_PUE_PUD |PAD_CTL_100K_PU ); +mxc_iomux_set_pad (MX31_PIN_SD1_DATA3 , +MMC_PAD_CFG |PAD_CTL_PUE_PUD |PAD_CTL_100K_PU ); +mxc_iomux_set_pad (MX31_PIN_SD1_CMD , +MMC_PAD_CFG |PAD_CTL_PUE_PUD |PAD_CTL_100K_PU );mxc_iomux_set_pad (MX31_PIN_SD1_CLK ,MMC_PAD_CFG ); -mxc_iomux_set_pad (MX31_PIN_SD1_CMD ,MMC_PAD_CFG ); ret =gpio_request (gpio_det,"MMC detect" );if (ret)@@ -133,7 +145,7 @@ static void mxc_mmc1_exit(struct device *dev, void *data) {gpio_free (gpio_det);gpio_free (gpio_wp); -free_irq (IOMUX_TO_IRQ (MX31_PIN_GPIO1_1 ), data); +free_irq (IOMUX_TO_IRQ (MX31_PIN_DCD_DCE1 ), data); }static struct imxmmc_platform_data mmc_pdata = {Signature · 1 line
1.6.5.4
PATCH 1/1 ARM: IMX31: configure pins iomux for SDHC setup on litekit board.
100K pulls are recommended in MCIMX31 reference manual. By the way, let me enable card removal detection in the next patch.
Quoted 88 lines · Daniel Mack
Quoted 1 line · Vladimir Zapolskiy
This patch adds SDHC support, and corrects current pins setup.
Just double-checked the schematics and it seems I indeed got the read-only pin wrong. And I didn't need the 100K pulls, SDHC/MMC worked fine for me without. But I'm happy to add them, so
Acked-by Daniel Mack <[email protected]>Thanks for working on this.
Daniel
Quoted 74 lines
Signed-off-by Vladimir Zapolskiy <[email protected]>Cc Daniel Mack <[email protected]>Cc Sascha Hauer <[email protected]>---
?arch/arm/mach-mx3/mx31lite-db.c | ? 28 ++++++++++++++++++++-------- ?1 files changed, 20 insertions(+), 8 deletions(-)arch/arm/mach-mx3/mx31lite-db.c +7
-0@@ -67,6 +67,13 @@ static unsigned int litekit_db_board_pins[] __initdata = { ? ? ? MX31_PIN_CSPI1_SS0__SS0, ? ? ? MX31_PIN_CSPI1_SS1__SS1, ? ? ? MX31_PIN_CSPI1_SS2__SS2, + ? ? /* SDHC1 */ + ? ? MX31_PIN_SD1_DATA0__SD1_DATA0, + ? ? MX31_PIN_SD1_DATA1__SD1_DATA1, + ? ? MX31_PIN_SD1_DATA2__SD1_DATA2, + ? ? MX31_PIN_SD1_DATA3__SD1_DATA3, + ? ? MX31_PIN_SD1_CLK__SD1_CLK, + ? ? MX31_PIN_SD1_CMD__SD1_CMD, ?};?/* UART */
arch/arm/mach-mx3/mx31lite-db.c +13
-9@@ -79,11 +86,11 @@ static struct imxuart_platform_data uart_pdata __initdata = { ?static int gpio_det, gpio_wp; ?#define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ - ? ? ? ? ? ? ? ? ? ? PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) + ? ? ? ? ? ? ? ? ?PAD_CTL_ODE_CMOS) ?static int mxc_mmc1_get_ro(struct device *dev) ?{ - ? ? return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_LCS0)); + ? ? return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_GPIO1_6)); ?} ?static int mxc_mmc1_init(struct device *dev,@@ -94,12 +101,17 @@ static int mxc_mmc1_init(struct device *dev, ? ? ? gpio_det = IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1); ? ? ? gpio_wp = IOMUX_TO_GPIO(MX31_PIN_GPIO1_6); - ? ? mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, MMC_PAD_CFG); - ? ? mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, MMC_PAD_CFG); - ? ? mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, MMC_PAD_CFG); - ? ? mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, MMC_PAD_CFG); + ? ? mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, + ? ? ? ? ? ? ? ? ? ? ? MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); + ? ? mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, + ? ? ? ? ? ? ? ? ? ? ? MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); + ? ? mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, + ? ? ? ? ? ? ? ? ? ? ? MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); + ? ? mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, + ? ? ? ? ? ? ? ? ? ? ? MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); + ? ? mxc_iomux_set_pad(MX31_PIN_SD1_CMD, + ? ? ? ? ? ? ? ? ? ? ? MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); ? ? ? mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG); - ? ? mxc_iomux_set_pad(MX31_PIN_SD1_CMD, MMC_PAD_CFG); ? ? ? ret = gpio_request(gpio_det, "MMC detect"); ? ? ? if (ret)@@ -133,7 +145,7 @@ static void mxc_mmc1_exit(struct device *dev, void *data) ?{ ? ? ? gpio_free(gpio_det); ? ? ? gpio_free(gpio_wp); - ? ? free_irq(IOMUX_TO_IRQ(MX31_PIN_GPIO1_1), data); + ? ? free_irq(IOMUX_TO_IRQ(MX31_PIN_DCD_DCE1), data); ?} ?static struct imxmmc_platform_data mmc_pdata = { --1.6.5.4
PATCH v2 1/1 ARM: IMX31: configure pins iomux for SDHC setup on litekit board.
This patch adds SDHC support, and corrects current pins setup. Added irq handling on card removal.
--- arch/arm/mach-mx3/mx31lite-db.c | 30 +++++++++++++++++++++--------- 1 files changed, 21 insertions(+), 9 deletions(-)
arch/arm/mach-mx3/mx31lite-db.c +21 -9
@@ -67,6 +67,13 @@ static unsigned int litekit_db_board_pins[] __initdata = {MX31_PIN_CSPI1_SS0__SS0 ,MX31_PIN_CSPI1_SS1__SS1 ,MX31_PIN_CSPI1_SS2__SS2 , +/* SDHC1 */ +MX31_PIN_SD1_DATA0__SD1_DATA0 , +MX31_PIN_SD1_DATA1__SD1_DATA1 , +MX31_PIN_SD1_DATA2__SD1_DATA2 , +MX31_PIN_SD1_DATA3__SD1_DATA3 , +MX31_PIN_SD1_CLK__SD1_CLK , + MX31_PIN_SD1_CMD__SD1_CMD, };/* UART */
@@ -79,11 +86,11 @@ static struct imxuart_platform_data uart_pdata __initdata = {static int gpio_det, gpio_wp;#define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ - PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) + PAD_CTL_ODE_CMOS)static int mxc_mmc1_get_ro (struct device *dev) { -return gpio_get_value (IOMUX_TO_GPIO (MX31_PIN_LCS0 )); +return gpio_get_value (IOMUX_TO_GPIO (MX31_PIN_GPIO1_6 )); } static int mxc_mmc1_init(struct device *dev,
@@ -94,12 +101,17 @@ static int mxc_mmc1_init(struct device *dev, gpio_det =IOMUX_TO_GPIO (MX31_PIN_DCD_DCE1 ); gpio_wp =IOMUX_TO_GPIO (MX31_PIN_GPIO1_6 ); -mxc_iomux_set_pad (MX31_PIN_SD1_DATA0 ,MMC_PAD_CFG ); -mxc_iomux_set_pad (MX31_PIN_SD1_DATA1 ,MMC_PAD_CFG ); -mxc_iomux_set_pad (MX31_PIN_SD1_DATA2 ,MMC_PAD_CFG ); -mxc_iomux_set_pad (MX31_PIN_SD1_DATA3 ,MMC_PAD_CFG ); +mxc_iomux_set_pad (MX31_PIN_SD1_DATA0 , +MMC_PAD_CFG |PAD_CTL_PUE_PUD |PAD_CTL_100K_PU ); +mxc_iomux_set_pad (MX31_PIN_SD1_DATA1 , +MMC_PAD_CFG |PAD_CTL_PUE_PUD |PAD_CTL_100K_PU ); +mxc_iomux_set_pad (MX31_PIN_SD1_DATA2 , +MMC_PAD_CFG |PAD_CTL_PUE_PUD |PAD_CTL_100K_PU ); +mxc_iomux_set_pad (MX31_PIN_SD1_DATA3 , +MMC_PAD_CFG |PAD_CTL_PUE_PUD |PAD_CTL_100K_PU ); +mxc_iomux_set_pad (MX31_PIN_SD1_CMD , +MMC_PAD_CFG |PAD_CTL_PUE_PUD |PAD_CTL_100K_PU );mxc_iomux_set_pad (MX31_PIN_SD1_CLK ,MMC_PAD_CFG ); -mxc_iomux_set_pad (MX31_PIN_SD1_CMD ,MMC_PAD_CFG ); ret =gpio_request (gpio_det,"MMC detect" );if (ret)
@@ -113,7 +125,7 @@ static int mxc_mmc1_init(struct device *dev,gpio_direction_input (gpio_wp); ret =request_irq (IOMUX_TO_IRQ (MX31_PIN_DCD_DCE1 ), detect_irq, -IRQF_DISABLED |IRQF_TRIGGER_FALLING , +IRQF_TRIGGER_RISING |IRQF_TRIGGER_FALLING ,"MMC detect" , data);if (ret) goto exit_free_wp;
@@ -133,7 +145,7 @@ static void mxc_mmc1_exit(struct device *dev, void *data) {gpio_free (gpio_det);gpio_free (gpio_wp); -free_irq (IOMUX_TO_IRQ (MX31_PIN_GPIO1_1 ), data); +free_irq (IOMUX_TO_IRQ (MX31_PIN_DCD_DCE1 ), data); }static struct imxmmc_platform_data mmc_pdata = {
Signature · 1 line
1.6.5.4
PATCH v2 1/1 ARM: IMX31: configure pins iomux for SDHC setup on litekit board.
Quoted 2 lines · Vladimir Zapolskiy
This patch adds SDHC support, and corrects current pins setup. Added irq handling on card removal.
Ok, added to mxc-master
Sascha
Quoted 85 lines
Signed-off-by Vladimir Zapolskiy <[email protected]>Cc Daniel Mack <[email protected]>Cc Sascha Hauer <[email protected]>--- arch/arm/mach-mx3/mx31lite-db.c | 30 +++++++++++++++++++++--------- 1 files changed, 21 insertions(+), 9 deletions(-)arch/arm/mach-mx3/mx31lite-db.c +21
-9@@ -67,6 +67,13 @@ static unsigned int litekit_db_board_pins[] __initdata = {MX31_PIN_CSPI1_SS0__SS0 ,MX31_PIN_CSPI1_SS1__SS1 ,MX31_PIN_CSPI1_SS2__SS2 , +/* SDHC1 */ +MX31_PIN_SD1_DATA0__SD1_DATA0 , +MX31_PIN_SD1_DATA1__SD1_DATA1 , +MX31_PIN_SD1_DATA2__SD1_DATA2 , +MX31_PIN_SD1_DATA3__SD1_DATA3 , +MX31_PIN_SD1_CLK__SD1_CLK , + MX31_PIN_SD1_CMD__SD1_CMD, };/* UART */ @@ -79,11 +86,11 @@ static struct imxuart_platform_data uart_pdata __initdata = {static int gpio_det, gpio_wp;#define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ - PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) + PAD_CTL_ODE_CMOS)static int mxc_mmc1_get_ro (struct device *dev) { -return gpio_get_value (IOMUX_TO_GPIO (MX31_PIN_LCS0 )); +return gpio_get_value (IOMUX_TO_GPIO (MX31_PIN_GPIO1_6 )); } static int mxc_mmc1_init(struct device *dev,@@ -94,12 +101,17 @@ static int mxc_mmc1_init(struct device *dev, gpio_det =IOMUX_TO_GPIO (MX31_PIN_DCD_DCE1 ); gpio_wp =IOMUX_TO_GPIO (MX31_PIN_GPIO1_6 ); -mxc_iomux_set_pad (MX31_PIN_SD1_DATA0 ,MMC_PAD_CFG ); -mxc_iomux_set_pad (MX31_PIN_SD1_DATA1 ,MMC_PAD_CFG ); -mxc_iomux_set_pad (MX31_PIN_SD1_DATA2 ,MMC_PAD_CFG ); -mxc_iomux_set_pad (MX31_PIN_SD1_DATA3 ,MMC_PAD_CFG ); +mxc_iomux_set_pad (MX31_PIN_SD1_DATA0 , +MMC_PAD_CFG |PAD_CTL_PUE_PUD |PAD_CTL_100K_PU ); +mxc_iomux_set_pad (MX31_PIN_SD1_DATA1 , +MMC_PAD_CFG |PAD_CTL_PUE_PUD |PAD_CTL_100K_PU ); +mxc_iomux_set_pad (MX31_PIN_SD1_DATA2 , +MMC_PAD_CFG |PAD_CTL_PUE_PUD |PAD_CTL_100K_PU ); +mxc_iomux_set_pad (MX31_PIN_SD1_DATA3 , +MMC_PAD_CFG |PAD_CTL_PUE_PUD |PAD_CTL_100K_PU ); +mxc_iomux_set_pad (MX31_PIN_SD1_CMD , +MMC_PAD_CFG |PAD_CTL_PUE_PUD |PAD_CTL_100K_PU );mxc_iomux_set_pad (MX31_PIN_SD1_CLK ,MMC_PAD_CFG ); -mxc_iomux_set_pad (MX31_PIN_SD1_CMD ,MMC_PAD_CFG ); ret =gpio_request (gpio_det,"MMC detect" );if (ret)@@ -113,7 +125,7 @@ static int mxc_mmc1_init(struct device *dev,gpio_direction_input (gpio_wp); ret =request_irq (IOMUX_TO_IRQ (MX31_PIN_DCD_DCE1 ), detect_irq, -IRQF_DISABLED |IRQF_TRIGGER_FALLING , +IRQF_TRIGGER_RISING |IRQF_TRIGGER_FALLING ,"MMC detect" , data);if (ret) goto exit_free_wp;@@ -133,7 +145,7 @@ static void mxc_mmc1_exit(struct device *dev, void *data) {gpio_free (gpio_det);gpio_free (gpio_wp); -free_irq (IOMUX_TO_IRQ (MX31_PIN_GPIO1_1 ), data); +free_irq (IOMUX_TO_IRQ (MX31_PIN_DCD_DCE1 ), data); }static struct imxmmc_platform_data mmc_pdata = {Signature · 1 line
1.6.5.4
Signature · 4 lines
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