ARM: MM: Add ARM_L1_CACHE_SHIFT_6 for handle inside each ARCH Kconfig
Subsystems (2)
PATCH 1/1 ARM: MM: Add ARM_L1_CACHE_SHIFT_6 for handle inside each ARCH Kconfig
This patch adds ARM_L1_CACHE_SHIFT_6 into arch/arm/Kconfig. Basically, ARM L1 cache line size is 32Bytes. Therefore, whenever new ARCH which has 64Bytes L1 cache line size is added, have to set ARM_L1_CACHE_SHIFT to 6. That is, have to add/modify arch/arm/mm/Kconfig.
This patch is for handle it in each ARCH such as ARCH_OMAP3, ARCH_S5PC1XX, and ARCH_S5PV210 which is in review.
This patch also adds selecting ARM_L1_CACHE_SHIFT_6 into Kconfig of ARCH_OMAP3 and ARCH_S5PC1XX.
--- arch/arm/Kconfig | 6 ++++++ arch/arm/mm/Kconfig | 2 +- arch/arm/plat-omap/Kconfig | 1 + 3 files changed, 8 insertions(+), 1 deletions(-)
arch/arm/Kconfig +6 -0
@@ -161,6 +161,11 @@ config ARCH_MTD_XIP config GENERIC_HARDIRQS_NO__DO_IRQ def_bool y +config ARM_L1_CACHE_SHIFT_6 + bool + help + Setting ARM L1 cache line size to 64 Bytes. + if OPROFILE config OPROFILE_ARMV6
@@ -646,6 +651,7 @@ config ARCH_S5PC1XX select GENERIC_GPIO select HAVE_CLK select CPU_V7 + select ARM_L1_CACHE_SHIFT_6 help Samsung S5PC1XX series based systems
arch/arm/mm/Kconfig +1 -1
@@ -779,5 +779,5 @@ config CACHE_XSC3L2 config ARM_L1_CACHE_SHIFT int - default 6 if ARCH_OMAP3 || ARCH_S5PC1XX + default 6 if ARM_L1_CACHE_SHIFT_6 default 5
arch/arm/plat-omap/Kconfig +1 -0
@@ -22,6 +22,7 @@ config ARCH_OMAP3 bool "TI OMAP3" select CPU_V7 select COMMON_CLKDEV + select ARM_L1_CACHE_SHIFT_6 config ARCH_OMAP4 bool "TI OMAP4"
Signature · 1 line
1.6.2.5
PATCH 1/1 ARM: MM: Add ARM_L1_CACHE_SHIFT_6 for handle inside each ARCH Kconfig
Quoted 8 lines · Kukjin Kim
This patch adds
ARM_L1_CACHE_SHIFT_6intoarch/arm/Kconfig. Basically, ARM L1 cache line size is 32Bytes. Therefore, whenever new ARCH which has 64Bytes L1 cache line size is added, have to setARM_L1_CACHE_SHIFTto 6. That is, have to add/modifyarch/arm/mm/Kconfig.
This patch is for handle it in each ARCH such asARCH_OMAP3,ARCH_S5PC1XX, andARCH_S5PV210which is in review.
This patch also adds selectingARM_L1_CACHE_SHIFT_6intoKconfigofARCH_OMAP3andARCH_S5PC1XX.
Note, 'this patch' is pretty much redudant, it is common knowledege and self-evident that this is a patch.
I think the only problem with this patch is that the description could do with a re-write, as so:
Add ARM_L1_CACHE_SHIFT_6 to arch/arm/Kconfig to allow CPUs with L1 cache lines which are 64bytes to indicate this without having to alter the arch/arm/mm/Kconfig entry each time.
Update the mm Kconfig so that ARM_L1_CACHE_SHIFT default value uses this and change OMAP3 and SPC1XX to select ARM_L1_CACHE_SHIFT_6.
Quoted 62 lines
Signed-off-by Kukjin Kim <[email protected]>--- arch/arm/Kconfig | 6 ++++++ arch/arm/mm/Kconfig | 2 +- arch/arm/plat-omap/Kconfig | 1 + 3 files changed, 8 insertions(+), 1 deletions(-)arch/arm/Kconfig +6
-0@@ -161,6 +161,11 @@ config ARCH_MTD_XIP config GENERIC_HARDIRQS_NO__DO_IRQ def_bool y +config ARM_L1_CACHE_SHIFT_6 + bool + help + Setting ARM L1 cache line size to 64 Bytes. + if OPROFILE config OPROFILE_ARMV6@@ -646,6 +651,7 @@ config ARCH_S5PC1XX select GENERIC_GPIO select HAVE_CLK select CPU_V7 + select ARM_L1_CACHE_SHIFT_6 help Samsung S5PC1XX series based systemsarch/arm/mm/Kconfig +1
-1@@ -779,5 +779,5 @@ config CACHE_XSC3L2 config ARM_L1_CACHE_SHIFT int - default 6 if ARCH_OMAP3 || ARCH_S5PC1XX + default 6 if ARM_L1_CACHE_SHIFT_6 default 5arch/arm/plat-omap/Kconfig +1
-0@@ -22,6 +22,7 @@ config ARCH_OMAP3 bool "TI OMAP3" select CPU_V7 select COMMON_CLKDEV + select ARM_L1_CACHE_SHIFT_6 config ARCH_OMAP4 bool "TI OMAP4"Signature · 7 lines
1.6.2.5 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel at lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
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