IB/core: Add support for enhanced atomic operations
PATCH 1/2 IB/core: Add support for enhanced atomic operations
This patchset adds support for the following enhanced atomic operations:
- Masked atomic compare and swap
- Masked atomic fetch and add
These operations enable using a smaller amount of memory when using multiple locks by using portions of a 64 bit value in an atomic operation.
- Add new IB_WR_ATOMIC_MASKED_CMP_AND_SWP and IB_WR_ATOMIC_MASKED_FETCH_AND_ADD send opcodes that can be used to mark a "masked atomic compare and swap" and "masked atomic fetch and add" work request correspondingly.
- Add IB_DEVICE_MASKED_ATOMIC capability bit.
- Add mask fields to atomic struct of ib_send_wr
- Add new opcodes to ib_wc_opcode
--- include/rdma/ib_verbs.h | 9 ++++++++- 1 files changed, 8 insertions(+), 1 deletions(-)
include/rdma/ib_verbs.h +8 -1
@@ -105,6 +105,7 @@ enum ib_device_cap_flags {IB_DEVICE_UD_TSO = (1 <<19 ),IB_DEVICE_MEM_MGT_EXTENSIONS = (1 <<21 ),IB_DEVICE_BLOCK_MULTICAST_LOOPBACK = (1 <<22 ), + IB_DEVICE_MASKED_ATOMIC = (1<<23), }; enum ib_atomic_cap {
@@ -472,7 +473,9 @@ enum ib_wc_opcode {* receive by testing (opcode & IB_WC_RECV). */ IB_WC_RECV =1 <<7 , -IB_WC_RECV_RDMA_WITH_IMM +IB_WC_RECV_RDMA_WITH_IMM , +IB_WC_MASKED_COMP_SWAP , +IB_WC_MASKED_FETCH_ADD }; enum ib_wc_flags {
@@ -689,6 +692,8 @@ enum ib_wr_opcode {IB_WR_RDMA_READ_WITH_INV ,IB_WR_LOCAL_INV ,IB_WR_FAST_REG_MR , +IB_WR_ATOMIC_MASKED_CMP_AND_SWP , + IB_WR_ATOMIC_MASKED_FETCH_AND_ADD, }; enum ib_send_flags {
@@ -732,6 +737,8 @@ struct ib_send_wr {u64 compare_add;u64 swap;u32 rkey; +u64 compare_add_mask; +u64 swap_mask; } atomic;struct {struct ib_ah *ah;
Signature · 6 lines
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include/rdma/ib_verbs.h enum ib_wc_opcode { · line 479
Quoted 10 lines
enum
ib_atomic_cap{include/rdma/ib_verbs.h +3
-1@@ -472,7 +473,9 @@ enum ib_wc_opcode {* receive by testing (opcode & IB_WC_RECV). */ IB_WC_RECV =1 <<7 , - IB_WC_RECV_RDMA_WITH_IMM +IB_WC_RECV_RDMA_WITH_IMM , +IB_WC_MASKED_COMP_SWAP , + IB_WC_MASKED_FETCH_ADD };
This breaks the ability to check for a receive by testing opcode & IB_WC_RECV. Is it even necessary to define new work completion opcodes?
include/rdma/ib_verbs.h enum ib_wr_opcode { · line 697
Quoted 8 lines
include/rdma/ib_verbs.h +2
-0enum ib_wc_flags {@@ -689,6 +692,8 @@ enum ib_wr_opcode {IB_WR_RDMA_READ_WITH_INV ,IB_WR_LOCAL_INV ,IB_WR_FAST_REG_MR , +IB_WR_ATOMIC_MASKED_CMP_AND_SWP , + IB_WR_ATOMIC_MASKED_FETCH_AND_ADD, };
Just tossing this out as a possibility -- the mask itself could be used to indicate the type of operation. Kernel clients would always set the mask for all atomic operations.
Also, is there a kernel user for this functionality?
- Sean
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A message that is not in the archive (sent off-list or not yet received): 96930957548D41E0B47FA465CAAD05E6-Zpru7NauK7drdx17CPfAsdBPR1lH4CV8@public.gmane.org
Quoted 4 lines · Sean Hefty
Quoted 4 lines
enum
ib_atomic_cap{include/rdma/ib_verbs.h +0
-0@@ -472,7 +473,9 @@ enum ib_wc_opcode {* receive by testing (opcode & IB_WC_RECV). */
Quoted 8 lines
include/rdma/ib_verbs.h enum ib_wc_opcode { · line 479
Quoted 6 lines
include/rdma/ib_verbs.h +3
-1IB_WC_RECV =1 <<7 , - IB_WC_RECV_RDMA_WITH_IMM +IB_WC_RECV_RDMA_WITH_IMM , +IB_WC_MASKED_COMP_SWAP , + IB_WC_MASKED_FETCH_ADD };This breaks the ability to check for a receive by testing opcode &
IB_WC_RECV.
Thanks Sean,
I'll send an updated patch with the fix.
Quoted 14 lines
Is it even necessary to define new work completion opcodes?
include/rdma/ib_verbs.h enum ib_wr_opcode { · line 697
Quoted 8 lines
include/rdma/ib_verbs.h +2
-0enum ib_wc_flags {@@ -689,6 +692,8 @@ enum ib_wr_opcode {IB_WR_RDMA_READ_WITH_INV ,IB_WR_LOCAL_INV ,IB_WR_FAST_REG_MR , +IB_WR_ATOMIC_MASKED_CMP_AND_SWP , + IB_WR_ATOMIC_MASKED_FETCH_AND_ADD, };Just tossing this out as a possibility -- the mask itself could be used to indicate the type of operation. Kernel clients would always set the mask for all atomic operations.
I don't have a strong opinion on this, but it looks to me more natural to use new opcodes and this way it is backward compatible.
Regards,
Vladimir
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Quoted 5 lines · Sean Hefty
Just tossing this out as a possibility -- the mask itself could be used to indicate the type of operation. Kernel clients would always set the mask for all atomic operations.
Also, is there a kernel user for this functionality?
RDS would make use of this.
Regards -- Andy
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A message that is not in the archive (sent off-list or not yet received): [email protected]
Oracle is planning to use these masked atomic ops..
Quoted 10 lines · Andy Grover
Quoted 6 lines · Sean Hefty
Just tossing this out as a possibility -- the mask itself could be used to indicate the type of operation. Kernel clients would always set the mask for all atomic operations.
Also, is there a kernel user for this functionality?
Quoted 9 lines
RDS would make use of this.
Regards -- Andy
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