Skip to contentSkip to conversation

i.MX35: Fix pad control bit positions

PATCH In review Juergen Beisert 2 participants 3 messages Jan 29, 2010 – Feb 12, 2010

Subsystems (3)
Arm (32-bit) Arm sub-architectures Arm i.MX and Layerscape
lore
Share & tools
lore

Juergen Beisert

author
#0 lore raw

PATCH 1/1 i.MX35: Fix pad control bit positions

Using these macros simplify the configuration for special GPIO usage. But they should use correct bit positions for usage in the IOMUX_PAD() macro.

Note: These are the bit positions of the i.MX35 CPU. Not checked for the other i.MX3x CPUs.

Signed-off-by Juergen Beisert <[email protected]>
---
 arch/arm/mach-imx/include/mach/iomux-v3.h |   34 +++++++++++++++---------------
 1 file changed, 17 insertions(+), 17 deletions(-)
arch/arm/mach-imx/include/mach/iomux-v3.h +17 -17
Index: u-boot-v2/arch/arm/mach-imx/include/mach/iomux-v3.h
===================================================================
@@ -68,25 +68,25 @@ struct pad_desc {
 /*
  * Use to set PAD control
  */
-#define PAD_CTL_DRIVE_VOLTAGE_3_3_V	0
-#define PAD_CTL_DRIVE_VOLTAGE_1_8_V	1
+#define PAD_CTL_DRIVE_VOLTAGE_3_3_V	(0)
+#define PAD_CTL_DRIVE_VOLTAGE_1_8_V	(1 << 13)
 
-#define PAD_CTL_NO_HYSTERESIS		0
-#define PAD_CTL_HYSTERESIS		1
+#define PAD_CTL_NO_HYSTERESIS		(0)
+#define PAD_CTL_HYSTERESIS		(1 << 8)
 
-#define PAD_CTL_PULL_DISABLED		0x0
-#define PAD_CTL_PULL_KEEPER		0xa
-#define PAD_CTL_PULL_DOWN_100K		0xc
-#define PAD_CTL_PULL_UP_47K		0xd
-#define PAD_CTL_PULL_UP_100K		0xe
-#define PAD_CTL_PULL_UP_22K		0xf
-
-#define PAD_CTL_OUTPUT_CMOS		0
-#define PAD_CTL_OUTPUT_OPEN_DRAIN	1
-
-#define PAD_CTL_DRIVE_STRENGTH_NORM	0
-#define PAD_CTL_DRIVE_STRENGTH_HIGH	1
-#define PAD_CTL_DRIVE_STRENGTH_MAX	2
+#define PAD_CTL_PULL_DISABLED		(0)
+#define PAD_CTL_PULL_KEEPER		(0xa << 4)
+#define PAD_CTL_PULL_DOWN_100K		(0xc << 4)
+#define PAD_CTL_PULL_UP_47K		(0xd << 4)
+#define PAD_CTL_PULL_UP_100K		(0xe << 4)
+#define PAD_CTL_PULL_UP_22K		(0xf << 4)
+
+#define PAD_CTL_OUTPUT_CMOS		(0)
+#define PAD_CTL_OUTPUT_OPEN_DRAIN	(1 << 3)
+
+#define PAD_CTL_DRIVE_STRENGTH_NORM	(0)
+#define PAD_CTL_DRIVE_STRENGTH_HIGH	(1 << 1)
+#define PAD_CTL_DRIVE_STRENGTH_MAX	(2 << 1)
 
 #define PAD_CTL_SLEW_RATE_SLOW		0
 #define PAD_CTL_SLEW_RATE_FAST		1
Signature · 9 lines
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | Phone: +49-8766-939 228     |
Vertretung Sued/Muenchen, Germany             | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686              | http://www.pengutronix.de/  |

_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox
author
#1 lore raw

Hi Sascha,

as discussed at FOSDEM: *ping* ;-)

Quoted 60 lines · Juergen Beisert

Using these macros simplify the configuration for special GPIO usage. But they should use correct bit positions for usage in the IOMUX_PAD() macro.

Note: These are the bit positions of the i.MX35 CPU. Not checked for the other i.MX3x CPUs.

Signed-off-by Juergen Beisert <[email protected]>
---
 arch/arm/mach-imx/include/mach/iomux-v3.h |   34

+++++++++++++++--------------- 1 file changed, 17 insertions(+), 17 deletions(-)

Index: u-boot-v2/arch/arm/mach-imx/include/mach/iomux-v3.h
===================================================================

arch/arm/mach-imx/include/mach/iomux-v3.h +17 -17
@@ -68,25 +68,25 @@ struct pad_desc {
 /*
  * Use to set PAD control
  */
-#define PAD_CTL_DRIVE_VOLTAGE_3_3_V	0
-#define PAD_CTL_DRIVE_VOLTAGE_1_8_V	1
+#define PAD_CTL_DRIVE_VOLTAGE_3_3_V	(0)
+#define PAD_CTL_DRIVE_VOLTAGE_1_8_V	(1 << 13)
 
-#define PAD_CTL_NO_HYSTERESIS		0
-#define PAD_CTL_HYSTERESIS		1
+#define PAD_CTL_NO_HYSTERESIS		(0)
+#define PAD_CTL_HYSTERESIS		(1 << 8)
 
-#define PAD_CTL_PULL_DISABLED		0x0
-#define PAD_CTL_PULL_KEEPER		0xa
-#define PAD_CTL_PULL_DOWN_100K		0xc
-#define PAD_CTL_PULL_UP_47K		0xd
-#define PAD_CTL_PULL_UP_100K		0xe
-#define PAD_CTL_PULL_UP_22K		0xf
-
-#define PAD_CTL_OUTPUT_CMOS		0
-#define PAD_CTL_OUTPUT_OPEN_DRAIN	1
-
-#define PAD_CTL_DRIVE_STRENGTH_NORM	0
-#define PAD_CTL_DRIVE_STRENGTH_HIGH	1
-#define PAD_CTL_DRIVE_STRENGTH_MAX	2
+#define PAD_CTL_PULL_DISABLED		(0)
+#define PAD_CTL_PULL_KEEPER		(0xa << 4)
+#define PAD_CTL_PULL_DOWN_100K		(0xc << 4)
+#define PAD_CTL_PULL_UP_47K		(0xd << 4)
+#define PAD_CTL_PULL_UP_100K		(0xe << 4)
+#define PAD_CTL_PULL_UP_22K		(0xf << 4)
+
+#define PAD_CTL_OUTPUT_CMOS		(0)
+#define PAD_CTL_OUTPUT_OPEN_DRAIN	(1 << 3)
+
+#define PAD_CTL_DRIVE_STRENGTH_NORM	(0)
+#define PAD_CTL_DRIVE_STRENGTH_HIGH	(1 << 1)
+#define PAD_CTL_DRIVE_STRENGTH_MAX	(2 << 1)
 
 #define PAD_CTL_SLEW_RATE_SLOW		0
 #define PAD_CTL_SLEW_RATE_FAST		1
Signature · 9 lines
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | Phone: +49-8766-939 228     |
Vertretung Sued/Muenchen, Germany             | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686              | http://www.pengutronix.de/  |

_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox
maintainer
#2 lore raw

Hi Juergen,

Quoted 3 lines · Juergen Beisert

Hi Sascha,

as discussed at FOSDEM: *ping* ;-)

This is already applied.

Sascha

Quoted 74 lines
Quoted 60 lines · Juergen Beisert

Using these macros simplify the configuration for special GPIO usage. But they should use correct bit positions for usage in the IOMUX_PAD() macro.

Note: These are the bit positions of the i.MX35 CPU. Not checked for the other i.MX3x CPUs.

Signed-off-by Juergen Beisert <[email protected]>
---
 arch/arm/mach-imx/include/mach/iomux-v3.h |   34

+++++++++++++++--------------- 1 file changed, 17 insertions(+), 17 deletions(-)

Index: u-boot-v2/arch/arm/mach-imx/include/mach/iomux-v3.h
===================================================================

arch/arm/mach-imx/include/mach/iomux-v3.h +17 -17
@@ -68,25 +68,25 @@ struct pad_desc {
 /*
  * Use to set PAD control
  */
-#define PAD_CTL_DRIVE_VOLTAGE_3_3_V	0
-#define PAD_CTL_DRIVE_VOLTAGE_1_8_V	1
+#define PAD_CTL_DRIVE_VOLTAGE_3_3_V	(0)
+#define PAD_CTL_DRIVE_VOLTAGE_1_8_V	(1 << 13)
 
-#define PAD_CTL_NO_HYSTERESIS		0
-#define PAD_CTL_HYSTERESIS		1
+#define PAD_CTL_NO_HYSTERESIS		(0)
+#define PAD_CTL_HYSTERESIS		(1 << 8)
 
-#define PAD_CTL_PULL_DISABLED		0x0
-#define PAD_CTL_PULL_KEEPER		0xa
-#define PAD_CTL_PULL_DOWN_100K		0xc
-#define PAD_CTL_PULL_UP_47K		0xd
-#define PAD_CTL_PULL_UP_100K		0xe
-#define PAD_CTL_PULL_UP_22K		0xf
-
-#define PAD_CTL_OUTPUT_CMOS		0
-#define PAD_CTL_OUTPUT_OPEN_DRAIN	1
-
-#define PAD_CTL_DRIVE_STRENGTH_NORM	0
-#define PAD_CTL_DRIVE_STRENGTH_HIGH	1
-#define PAD_CTL_DRIVE_STRENGTH_MAX	2
+#define PAD_CTL_PULL_DISABLED		(0)
+#define PAD_CTL_PULL_KEEPER		(0xa << 4)
+#define PAD_CTL_PULL_DOWN_100K		(0xc << 4)
+#define PAD_CTL_PULL_UP_47K		(0xd << 4)
+#define PAD_CTL_PULL_UP_100K		(0xe << 4)
+#define PAD_CTL_PULL_UP_22K		(0xf << 4)
+
+#define PAD_CTL_OUTPUT_CMOS		(0)
+#define PAD_CTL_OUTPUT_OPEN_DRAIN	(1 << 3)
+
+#define PAD_CTL_DRIVE_STRENGTH_NORM	(0)
+#define PAD_CTL_DRIVE_STRENGTH_HIGH	(1 << 1)
+#define PAD_CTL_DRIVE_STRENGTH_MAX	(2 << 1)
 
 #define PAD_CTL_SLEW_RATE_SLOW		0
 #define PAD_CTL_SLEW_RATE_FAST		1
Signature · 9 lines
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | Phone: +49-8766-939 228     |
Vertretung Sued/Muenchen, Germany             | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686              | http://www.pengutronix.de/  |

_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox
Signature · 9 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

_______________________________________________
barebox mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/barebox