drm: Allow platform devices to register as DRM devices
Subsystems (8)
Following is a patch to allow platform devices on platforms without PCI to register and operate as fully fledged DRM devices. I have been using this code for some time now and I'm convinced that the model works, but I'm posting this to get some constructive criticism on ways to improve the patch and get it ready for upstream.
Thanks,
Jordan
PATCH 1/1 drm: Allow platform devices to register as DRM devices
Allow platform devices without PCI resources to be DRM devices.
---
drivers/gpu/drm/Kconfig | 4 - drivers/gpu/drm/Makefile | 2 drivers/gpu/drm/drm_bufs.c | 27 ++++++- drivers/gpu/drm/drm_drv.c | 38 +-------- drivers/gpu/drm/drm_edid.c | 3 + drivers/gpu/drm/drm_info.c | 23 ++++-- drivers/gpu/drm/drm_ioctl.c | 70 ++++++++++++----- drivers/gpu/drm/drm_irq.c | 16 ++-- drivers/gpu/drm/drm_pci.c | 142 +++++++++++++++++++++++++++++++++++ drivers/gpu/drm/drm_platform.c | 121 ++++++++++++++++++++++++++++++ drivers/gpu/drm/drm_stub.c | 90 +--------------------- drivers/gpu/drm/drm_sysfs.c | 7 +- drivers/gpu/drm/drm_vm.c | 14 +++ drivers/gpu/drm/i915/i915_drv.c | 2 drivers/gpu/drm/radeon/radeon_drv.c | 2 include/drm/drmP.h | 52 +++++++++++-- 16 files changed, 444 insertions(+), 169 deletions(-) create mode 100644 drivers/gpu/drm/drm_platform.c
drivers/gpu/drm/Kconfig +0 -0
@@ -6,7 +6,7 @@ # menuconfig DRM tristate "Direct Rendering Manager (XFree86 4.1.0 and higher DRI
support)"
- depends on (AGP || AGP=n) && PCI && !EMULATED_CMPXCHG && MMU
+ depends on !EMULATED_CMPXCHG && MMU
select I2C
select I2C_ALGOBIT
help
@@ -16,7 +16,7 @@ menuconfig DRM
These modules provide support for synchronization, security, and DMA transfers. Please see <http://dri.sourceforge.net/> for more details. You should also select and configure AGP
- (/dev/agpgart) support.
+ (/dev/agpgart) support if it is available for your platform.
config DRM_KMS_HELPER
tristate
drivers/gpu/drm/Makefile +1 -1
@@ -9,7 +9,7 @@ drm-y := drm_auth.o drm_bufs.o drm_cache.o \ drm_drv.o drm_fops.o drm_gem.o drm_ioctl.o drm_irq.o \ drm_lock.o drm_memory.o drm_proc.o drm_stub.o drm_vm.o \ drm_agpsupport.o drm_scatter.o ati_pcigart.o drm_pci.o \ - drm_sysfs.o drm_hashtab.o drm_sman.o drm_mm.o \ + drm_platform.o drm_sysfs.o drm_hashtab.o drm_sman.o drm_mm.o \ drm_crtc.o drm_modes.o drm_edid.o \ drm_info.o drm_debugfs.o drm_encoder_slave.o
drivers/gpu/drm/drm_bufs.c +1 -0
@@ -11,6 +11,7 @@* * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. +* Copyright (c) 2009, Code Aurora Forum. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a
@@ -40,13 +41,37 @@ resource_size_t drm_get_resource_start(struct drm_device *dev,
unsigned int resource)
{
+ if (drm_core_check_feature(dev, DRIVER_USE_PLATFORM_DEVICE)) {
+ struct resource *r;
+ r = platform_get_resource(dev->platformdev, IORESOURCE_MEM,
+ resource);
+
+ return r ? r->start : 0;
+ }
+
+#ifdef CONFIG_PCI
return pci_resource_start(dev->pdev, resource);
+#endif
+
+ return 0;
}
EXPORT_SYMBOL(drm_get_resource_start);
resource_size_t drm_get_resource_len(struct drm_device *dev, unsigned
int resource)
{
+ if (drm_core_check_feature(dev, DRIVER_USE_PLATFORM_DEVICE)) {
+ struct resource *r;
+ r = platform_get_resource(dev->platformdev, IORESOURCE_MEM,
+ resource);
+
+ return r ? (r->end - r->start) : 0;
+ }
+
+#ifdef CONFIG_PCI
return pci_resource_len(dev->pdev, resource);
+#endif
+
+ return 0;
}
EXPORT_SYMBOL(drm_get_resource_len);
@@ -188,7 +213,7 @@ static int drm_addmap_core(struct drm_device * dev, resource_size_t offset,
switch (map->type) {
case _DRM_REGISTERS:
case _DRM_FRAME_BUFFER:
-#if !defined(__sparc__) && !defined(__alpha__) && !defined(__ia64__) && !defined(__powerpc64__) && !defined(__x86_64__) +#if !defined(__sparc__) && !defined(__alpha__) && !defined(__ia64__) && !defined(__powerpc64__) && !defined(__x86_64__) && !defined(__arm__)
if (map->offset + (map->size-1) < map->offset ||
map->offset < virt_to_phys(high_memory)) {
kfree(map);
drivers/gpu/drm/drm_drv.c +1 -0
@@ -24,6 +24,7 @@* * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. +* Copyright (c) 2009, Code Aurora Forum. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a
@@ -242,47 +243,20 @@ int drm_lastclose(struct drm_device * dev)* * Initializes an array of drm_device structures, and attempts to * initialize all available devices, using consecutive minors,
registering the
- * stubs and initializing the AGP device.
+ * stubs and initializing the device.
*
* Expands the \c DRIVER_PREINIT and \c DRIVER_POST_INIT macros before and
* after the initialization for driver customization.
*/
int drm_init(struct drm_driver *driver)
{
- struct pci_dev *pdev = NULL;
- const struct pci_device_id *pid;
- int i;
-
DRM_DEBUG("\n");
-
INIT_LIST_HEAD(&driver->device_list);
- if (driver->driver_features & DRIVER_MODESET)
- return pci_register_driver(&driver->pci_driver);
-
- /* If not using KMS, fall back to stealth mode manual scanning. */
- for (i = 0; driver->pci_driver.id_table[i].vendor != 0; i++) {
- pid = &driver->pci_driver.id_table[i];
-
- /* Loop around setting up a DRM device for each PCI device
- * matching our ID and device class. If we had the internal
- * function that pci_get_subsys and pci_get_class used, we'd
- * be able to just pass pid in instead of doing a two-stage
- * thing.
- */
- pdev = NULL;
- while ((pdev =
- pci_get_subsys(pid->vendor, pid->device, pid->subvendor,
- pid->subdevice, pdev)) != NULL) {
- if ((pdev->class & pid->class_mask) != pid->class)
- continue;
-
- /* stealth mode requires a manual probe */
- pci_dev_get(pdev);
- drm_get_dev(pdev, pid, driver);
- }
- }
- return 0;
+ if (driver->driver_features & DRIVER_USE_PLATFORM_DEVICE)
+ return drm_platform_init(driver);
+ else
+ return drm_pci_init(driver);
}
EXPORT_SYMBOL(drm_init);
drivers/gpu/drm/drm_edid.c +3 -0
@@ -1220,6 +1220,9 @@ struct edid *drm_get_edid(struct drm_connector *connector,int ret;struct edid *edid; +if (drm_core_check_feature (connector->dev,DRIVER_USE_PLATFORM_DEVICE )) +return NULL ; + edid =kmalloc (EDID_LENGTH * (MAX_EDID_EXT_NUM +1 ),GFP_KERNEL );if (edid ==NULL ) {
drivers/gpu/drm/drm_info.c +17 -6
@@ -51,13 +51,24 @@ int drm_name_info(struct seq_file *m, void *data)if (!master)return 0 ; -if (master->unique) { -seq_printf (m,"%s %s %s\n" , - dev->driver->pci_driver.name, -pci_name (dev->pdev), master->unique); +if (drm_core_check_feature (dev,DRIVER_USE_PLATFORM_DEVICE )) { +if (master->unique) { +seq_printf (m,"%s %s\n" , + dev->driver->platform_device->name, + master->unique); + }else { +seq_printf (m,"%s\n" , + dev->driver->platform_device->name); + } }else { -seq_printf (m,"%s %s\n" , dev->driver->pci_driver.name, -pci_name (dev->pdev)); +if (master->unique) { +seq_printf (m,"%s %s %s\n" , + dev->driver->pci_driver.name, +pci_name (dev->pdev), master->unique); + }else { +seq_printf (m,"%s %s\n" , dev->driver->pci_driver.name, +pci_name (dev->pdev)); + } }return 0 ;
drivers/gpu/drm/drm_ioctl.c +48 -22
86 lines not on this page · raw message
drivers/gpu/drm/drm_irq.c +10 -6
@@ -11,6 +11,7 @@* * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. +* Copyright (c) 2009, Code Aurora Forum. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a
@@ -56,6 +57,9 @@ int drm_irq_by_busid(struct drm_device *dev, void *data, {struct drm_irq_busid *p = data; +if (drm_core_check_feature (dev,DRIVER_USE_PLATFORM_DEVICE )) +return -EINVAL ; +if (!drm_core_check_feature (dev,DRIVER_HAVE_IRQ ))return -EINVAL ;
@@ -210,7 +214,7 @@ int drm_irq_install(struct drm_device *dev)if (!drm_core_check_feature (dev,DRIVER_HAVE_IRQ ))return -EINVAL ; -if (dev->pdev->irq ==0 ) +if (drm_dev_to_irq (dev) ==0 )return -EINVAL ;mutex_lock (&dev->struct_mutex);
@@ -228,7 +232,7 @@ int drm_irq_install(struct drm_device *dev) dev->irq_enabled =1 ;mutex_unlock (&dev->struct_mutex); -DRM_DEBUG ("irq=%d\n" , dev->pdev->irq); +DRM_DEBUG ("irq=%d\n" ,drm_dev_to_irq (dev));/* Before installing handler */ dev->driver->irq_preinstall (dev);
@@ -301,14 +305,14 @@ int drm_irq_uninstall(struct drm_device * dev)if (!irq_enabled)return -EINVAL ; -DRM_DEBUG ("irq=%d\n" , dev->pdev->irq); +DRM_DEBUG ("irq=%d\n" ,drm_dev_to_irq (dev));if (!drm_core_check_feature (dev,DRIVER_MODESET ))vga_client_register (dev->pdev,NULL ,NULL ,NULL ); dev->driver->irq_uninstall (dev); -free_irq (dev->pdev->irq, dev); +free_irq (drm_dev_to_irq (dev), dev);return 0 ; }
@@ -340,7 +344,7 @@ int drm_control(struct drm_device *dev, void *data,if (drm_core_check_feature (dev,DRIVER_MODESET ))return 0 ;if (dev->if_version <DRM_IF_VERSION (1 ,2 ) && - ctl->irq != dev->pdev->irq) + ctl->irq !=drm_dev_to_irq (dev))return -EINVAL ;return drm_irq_install (dev);case DRM_UNINST_HANDLER :
@@ -649,7 +653,7 @@ int drm_wait_vblank(struct drm_device *dev, void *data,int ret =0 ;unsigned int flags, seq, crtc; -if ((!dev->pdev->irq) || (!dev->irq_enabled)) +if ((!drm_dev_to_irq (dev)) || (!dev->irq_enabled))return -EINVAL ;if (vblwait->request.type & _DRM_VBLANK_SIGNAL)
drivers/gpu/drm/drm_pci.c +142 -0
152 lines not on this page · raw message
drivers/gpu/drm/drm_platform.c new file +121 -0
121 lines not on this page · raw message
drivers/gpu/drm/drm_stub.c +3 -87
120 lines not on this page · raw message
drivers/gpu/drm/drm_sysfs.c +6 -1
@@ -7,6 +7,7 @@* Copyright (c) 2004 Jon Smirl <[email protected]> * Copyright (c) 2003-2004 Greg Kroah-Hartman <[email protected]> * Copyright (c) 2003-2004 IBM Corp. +* Copyright (c) 2009, Code Aurora Forum. All rights reserved. * * This file is released under the GPLv2 *
@@ -486,7 +487,11 @@ int drm_sysfs_device_add(struct drm_minor *minor)int err;char *minor_str; - minor->kdev.parent = &minor->dev->pdev->dev; +if (minor->dev->platformdev !=NULL ) + minor->kdev.parent = &minor->dev->platformdev->dev; +else + minor->kdev.parent = &minor->dev->pdev->dev; + minor->kdev.class = drm_class; minor->kdev.release = drm_sysfs_device_release; minor->kdev.devt = minor->device;
drivers/gpu/drm/drm_vm.c +12 -1
@@ -60,7 +60,7 @@ static pgprot_t drm_io_prot(uint32_t map_type, struct vm_area_struct *vma) tmp =pgprot_writecombine (tmp); else tmp =pgprot_noncached (tmp); -#elif defined(__sparc__) +#elif defined(__sparc__) || defined(__arm__) tmp =pgprot_noncached (tmp);#endif return tmp;
@@ -600,6 +600,7 @@ int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma) }switch (map->type) { +#if !defined(__arm__)case _DRM_AGP:if (drm_core_has_AGP (dev) && dev->agp->cant_use_aperture) {/*
@@ -614,20 +615,31 @@ int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma)break ; }/* fall through to _DRM_FRAME_BUFFER... */ +#endif case _DRM_FRAME_BUFFER:case _DRM_REGISTERS: offset = dev->driver->get_reg_ofs (dev); vma->vm_flags |=VM_IO ;/* not in core dump */ vma->vm_page_prot =drm_io_prot (map->type, vma); +#if !defined(__arm__)if (io_remap_pfn_range (vma, vma->vm_start, (map->offset + offset) >>PAGE_SHIFT , vma->vm_end - vma->vm_start, vma->vm_page_prot))return -EAGAIN ; +#else +if (remap_pfn_range (vma, vma->vm_start, + (map->offset + offset) >>PAGE_SHIFT , + vma->vm_end - vma->vm_start, + vma->vm_page_prot)) +return -EAGAIN ; +#endif + DRM_DEBUG(" Type = %d; start = 0x%lx, end = 0x%lx," " offset = 0x%llx\n", map->type, vma->vm_start, vma->vm_end, (unsigned long long)(map->offset +
offset));
+
vma->vm_ops = &drm_vm_ops;
break;
case _DRM_CONSISTENT:
drivers/gpu/drm/i915/i915_drv.c +1 -1
@@ -392,7 +392,7 @@ int i965_reset(struct drm_device *dev, u8 flags)static int __devinit i915_pci_probe (struct pci_dev *pdev,const struct pci_device_id *ent) { -return drm_get_dev (pdev, ent, &driver); +return drm_get_pci_dev (pdev, ent, &driver); } static void
drivers/gpu/drm/radeon/radeon_drv.c +1 -1
@@ -223,7 +223,7 @@ static struct drm_driver kms_driver;static int __devinit radeon_pci_probe (struct pci_dev *pdev,const struct pci_device_id *ent) { -return drm_get_dev (pdev, ent, &kms_driver); +return drm_get_pci_dev (pdev, ent, &kms_driver); } static void
include/drm/drmP.h +44 -8
118 lines not on this page · raw message
Dave Airlie
maintainerQuoted 4 lines · Jordan Crouse
Allow platform devices without PCI resources to be DRM devices.
Signed-off-by Jordan Crouse <[email protected]>
This patch has a bunch of whitespace damage at least in my inbox and also in patchwork
Please also be careful with the places you add copyrights, you moved a bunch of code
from drm_drv.c to drm_pci.c and added a copyright for Code Aurora in drm_pci.c? You can
only assert copyright if you actually wrote the code, otherwise the patch contains your authorship details and who contributed the code. I'm guessing you might have
copyright over one file in this that being drm_platform.c, the rest I'm less sure about.
I also wonder if we could/should separate the arm drm support out from this patch (i.e.
the __arm__ changes).
Some other misc comments below:
Quoted 5 lines
#
menuconfig DRM
tristate "Direct Rendering Manager (XFree86 4.1.0 and higher DRI support)"
- depends on (AGP || AGP=n) && PCI && !EMULATED_CMPXCHG && MMU
From what I can see the AGP || AGP==n is still required, you just want to drop the PCI
dependancy??
drivers/gpu/drm/drm_bufs.c line 15
Quoted 12 lines
+ depends on !EMULATED_CMPXCHG && MMU
drivers/gpu/drm/drm_bufs.c +1
-0@@ -11,6 +11,7 @@ * * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. + * Copyright (c) 2009, Code Aurora Forum. * All Rights Reserved.
There have been much bigger changes to these files without copyright additions, I'm not sure how big something needs to be but I'm not 100% sure this comes close.
Quoted 57 lines
resource_size_t
drm_get_resource_start(struct drm_device *dev, unsigned int resource)
{
+ if (drm_core_check_feature(dev, DRIVER_USE_PLATFORM_DEVICE)) {
+ struct resource *r;
+ r = platform_get_resource(dev->platformdev,IORESOURCE_MEM,
+ resource);drivers/gpu/drm/drm_bufs.c +5
-0+ + return r ? r->start : 0; + } + +#ifdef CONFIG_PCI return
pci_resource_start(dev->pdev, resource);drivers/gpu/drm/drm_bufs.c +3
-0+#endif + + return 0;}
EXPORT_SYMBOL(drm_get_resource_start);resource_size_t
drm_get_resource_len(struct drm_device *dev, unsigned int resource)
{
+ if (drm_core_check_feature(dev, DRIVER_USE_PLATFORM_DEVICE)) {
+ struct resource *r;
+ r = platform_get_resource(dev->platformdev,IORESOURCE_MEM,
+ resource);drivers/gpu/drm/drm_bufs.c +5
-0+ + return r ? (r->end - r->start) : 0; + } + +#ifdef CONFIG_PCI return
pci_resource_len(dev->pdev, resource);drivers/gpu/drm/drm_bufs.c +3
-0+#endif + + return 0;}
EXPORT_SYMBOL(drm_get_resource_len);
drivers/gpu/drm/drm_bufs.c +0
-0@@ -188,7 +213,7 @@ static int drm_addmap_core(struct drm_device * dev, resource_size_t offset, switch (map->type) {case
_DRM_REGISTERS:
case_DRM_FRAME_BUFFER:
-#if !defined(__sparc__) && !defined(__alpha__) && !defined(__ia64__) && !defined(__powerpc64__) && !defined(__x86_64__)
+#if !defined(__sparc__) && !defined(__alpha__) && !defined(__ia64__) && !defined(__powerpc64__) && !defined(__x86_64__) && !defined(__arm__) if (map->offset+ (map->size-1) <map->offset||map->offset<virt_to_phys(high_memory)) { kfree(map);drivers/gpu/drm/drm_drv.c +0
-0
drivers/gpu/drm/drm_drv.c line 28
Quoted 5 lines
drivers/gpu/drm/drm_drv.c +1
-0@@ -24,6 +24,7 @@ * * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. + * Copyright (c) 2009, Code Aurora Forum. * All Rights Reserved.
again similiar, but even less code since you mostly remove code.
Quoted 62 lines
drivers/gpu/drm/drm_drv.c +0
-0* * Permission is hereby granted, free of charge, to any person obtaining a@@ -242,47 +243,20 @@ int drm_lastclose(struct drm_device * dev) * * Initializes an array of drm_device structures, and attempts to * initialize all available devices, using consecutive minors, registeringthe
- * stubs and initializing the AGP device.
+ * stubs and initializing the device.
*
* Expands the \cDRIVER_PREINITand \cDRIVER_POST_INITmacros before and
* after the initialization for driver customization.
*/
intdrm_init(struct drm_driver *driver)
{
- structpci_dev*pdev = NULL;
- const structpci_device_id*pid;
- int i;
-
DRM_DEBUG("\n");
-
INIT_LIST_HEAD(&driver->device_list);- if (
driver->driver_features&DRIVER_MODESET)
- returnpci_register_driver(&driver->pci_driver);drivers/gpu/drm/drm_drv.c +0
-14- - /* If not using KMS, fall back to stealth mode manual scanning. */ - for (i = 0; driver->pci_driver.id_table[i].vendor != 0; i++) { - pid = &driver->pci_driver.id_table[i]; - - /* Loop around setting up a DRM device for each PCI device - * matching our ID and device class. If we had the internal - * function that pci_get_subsys and pci_get_class used, we'd - * be able to just pass pid in instead of doing a two-stage - * thing. - */ - pdev = NULL; - while ((pdev = - pci_get_subsys(pid->vendor, pid->device,
pid->subvendor,
- pid->subdevice, pdev)) != NULL) {
- if ((pdev->class&pid->class_mask) !=pid->class)
- continue;
-
- /* stealth mode requires a manual probe */
-pci_dev_get(pdev);
-drm_get_dev(pdev, pid, driver);
- }
- }
- return 0;
+ if (driver->driver_features&DRIVER_USE_PLATFORM_DEVICE)
+ returndrm_platform_init(driver);
+ else
+ returndrm_pci_init(driver);
}EXPORT_SYMBOL(drm_init);
drivers/gpu/drm/drm_edid.c +0
-0
drivers/gpu/drm/drm_edid.c struct edid *drm_get_edid(struct drm_connector · line 1227
Quoted 8 lines
drivers/gpu/drm/drm_edid.c +3
-0@@ -1220,6 +1220,9 @@ struct edid *drm_get_edid(struct drm_connector *connector, int ret; struct edid *edid; + if (drm_core_check_feature(connector->dev,DRIVER_USE_PLATFORM_DEVICE )) + return NULL; +
This makes no sense, having the ability to probe EDID or not is most definitely not a platform vs PCI problem.
Quoted 5 lines
drivers/gpu/drm/drm_edid.c +0
-0{struct
drm_irq_busid*p = data;+ if (
drm_core_check_feature(dev, DRIVER_USE_PLATFORM_DEVICE))
+ return-EINVAL;
Not 100% sure about this, but if you only intend on KMS and don't need to inform userspace of irq support this should be okay.
Quoted 78 lines
drivers/gpu/drm/drm_vm.c +0
-0@@ -60,7 +60,7 @@ static pgprot_t drm_io_prot(uint32_t map_type, struct vm_area_struct *vma) tmp = pgprot_writecombine(tmp);else
tmp =pgprot_noncached(tmp);drivers/gpu/drm/drm_vm.c +1
-1-#elif defined(__sparc__) +#elif defined(__sparc__) || defined(__arm__)tmp =
pgprot_noncached(tmp);
#endif
return tmp;drivers/gpu/drm/drm_vm.c +1
-0@@ -600,6 +600,7 @@ int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma) } switch (map->type) { +#if !defined(__arm__)case
_DRM_AGP:
if (drm_core_has_AGP(dev)&&dev->agp->cant_use_aperture) { /*drivers/gpu/drm/drm_vm.c +1
-0@@ -614,20 +615,31 @@ int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma) break; } /* fall through to _DRM_FRAME_BUFFER... */ +#endif case
_DRM_FRAME_BUFFER:
case_DRM_REGISTERS:
offset =dev->driver->get_reg_ofs(dev);vma->vm_flags|=VM_IO; /* not in core dump */vma->vm_page_prot=drm_io_prot(map->type, vma); +#if !defined(__arm__)
if (io_remap_pfn_range(vma,vma->vm_start, (map->offset+ offset) >>PAGE_SHIFT,vma->vm_end-vma->vm_start,vma->vm_page_prot)) return-EAGAIN;
+#else
+ if (remap_pfn_range(vma,vma->vm_start,
+ (map->offset+ offset) >>PAGE_SHIFT,
+vma->vm_end-vma->vm_start,
+vma->vm_page_prot))
+ return-EAGAIN;drivers/gpu/drm/drm_vm.c +2
-0+#endif +DRM_DEBUG(" Type = %d; start = 0x%lx, end = 0x%lx," " offset = 0x%llx\n",
map->type,
vma->vm_start,vma->vm_end, (unsigned long long)(map->offset + offset));
+
vma->vm_ops =&drm_vm_ops;
break;
case_DRM_CONSISTENT:drivers/gpu/drm/i915/i915_drv.c +0
-0@@ -392,7 +392,7 @@ int i965_reset(struct drm_device *dev, u8 flags)static int
__devinit
i915_pci_probe(structpci_dev*pdev, const structpci_device_id*ent) {
- returndrm_get_dev(pdev, ent, &driver);
+ returndrm_get_pci_dev(pdev, ent, &driver);
}static void
drivers/gpu/drm/radeon/radeon_drv.c +0
-0@@ -223,7 +223,7 @@ static struct drm_driver kms_driver;
Quoted 7 lines
static int
__devinit
radeon_pci_probe(structpci_dev*pdev, const structpci_device_id*ent) {
- returndrm_get_dev(pdev, ent, &kms_driver);
+ returndrm_get_pci_dev(pdev, ent, &kms_driver);
}
This also doesn't address noueau/vmwgfx entry points.
Dave.
Quoted 7 lines · Dave Airlie
Quoted 3 lines · Jordan Crouse
Allow platform devices without PCI resources to be DRM devices.
Signed-off-by Jordan Crouse <[email protected]>This patch has a bunch of whitespace damage at least in my inbox and also in patchwork
Yes, PBCAK.
Quoted 10 lines
Please also be careful with the places you add copyrights, you moved a bunch of code
fromdrm_drv.ctodrm_pci.cand added a copyright for Code Aurora indrm_pci.c? You can
only assert copyright if you actually wrote the code, otherwise the patch contains your authorship details and who contributed the code. I'm guessing you might have
copyright over one file in this that beingdrm_platform.c, the rest I'm less sure about.
Quoted 3 lines
I also wonder if we could/should separate the arm drm support out from this patch (i.e.
the__arm__changes).
That might not be a bad idea, I'll do that.
Quoted 11 lines
Some other misc comments below:
Quoted 7 lines
#
menuconfig DRM
tristate "Direct Rendering Manager (XFree86 4.1.0 and higher DRI
support)"
- depends on (AGP || AGP=n) && PCI && !EMULATED_CMPXCHG && MMUFrom what I can see the AGP || AGP==n is still required, you just want
to drop the PCI
dependancy??
I guess technically we could also drop the AGP requirement, but since it worked on my box with AGP=n it seemed to me like a NOP.
Quoted 147 lines
drivers/gpu/drm/drm_bufs.c line 15
Quoted 12 lines
(quoted diff) +1
-0+ depends on !EMULATED_CMPXCHG && MMUdrivers/gpu/drm/drm_bufs.c +1
-0@@ -11,6 +11,7 @@* * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. +* Copyright (c) 2009, Code Aurora Forum. * All Rights Reserved. There have been much bigger changes to these files without copyright additions, I'm not sure how big something needs to be but I'm not 100% sure this comes close.
Quoted 56 lines
drivers/gpu/drm/drm_bufs.c +0
-0resource_size_t drm_get_resource_start (struct drm_device *dev,unsigned int resource){
drivers/gpu/drm/drm_bufs.c +12
-0+if (drm_core_check_feature (dev,DRIVER_USE_PLATFORM_DEVICE )) { +struct resource *r; + r =platform_get_resource (dev->platformdev,IORESOURCE_MEM , + resource); + +return r ? r->start :0 ; + } + +#ifdef CONFIG_PCI return pci_resource_start (dev->pdev, resource); +#endif + +return 0 ; }EXPORT_SYMBOL (drm_get_resource_start); resource_size_t drm_get_resource_len(struct drm_device *dev, unsigned intresource)
{drivers/gpu/drm/drm_bufs.c +13
-1+if (drm_core_check_feature (dev,DRIVER_USE_PLATFORM_DEVICE )) { +struct resource *r; + r =platform_get_resource (dev->platformdev,IORESOURCE_MEM , + resource); + +return r ? (r->end - r->start) :0 ; + } + +#ifdef CONFIG_PCI return pci_resource_len (dev->pdev, resource); +#endif + +return 0 ; }EXPORT_SYMBOL (drm_get_resource_len);@@ -188,7 +213,7 @@ static int drm_addmap_core(struct drm_device * dev, resource_size_t offset, switch (map->type) {case _DRM_REGISTERS:case _DRM_FRAME_BUFFER: -#if !defined(__sparc__) && !defined(__alpha__) && !defined(__ia64__) && !defined(__powerpc64__) && !defined(__x86_64__) +#if !defined(__sparc__) && !defined(__alpha__) && !defined(__ia64__) && !defined(__powerpc64__) && !defined(__x86_64__) && !defined(__arm__)if (map->offset + (map->size-1) < map->offset || map->offset < virt_to_phys(high_memory)) { kfree(map);drivers/gpu/drm/drm_drv.c +0
-0drivers/gpu/drm/drm_drv.c line 28
Quoted 5 lines
drivers/gpu/drm/drm_drv.c +1
-0@@ -24,6 +24,7 @@* * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. +* Copyright (c) 2009, Code Aurora Forum. * All Rights Reserved. again similiar, but even less code since you mostly remove code.
Quoted 66 lines
drivers/gpu/drm/drm_drv.c +0
-0* * Permission is hereby granted, free of charge, to any person obtaining a @@ -242,47 +243,20 @@ int drm_lastclose(struct drm_device * dev)* * Initializes an array of drm_device structures, and attempts to * initialize all available devices, using consecutive minors, registering the
- * stubs and initializing the AGP device.
+ * stubs and initializing the device.
*
* Expands the \cDRIVER_PREINITand \cDRIVER_POST_INITmacros before and
* after the initialization for driver customization.
*/
intdrm_init(struct drm_driver *driver)
{drivers/gpu/drm/drm_drv.c +0
-21- struct pci_dev *pdev = NULL; - const struct pci_device_id *pid; - int i; -DRM_DEBUG ("\n" ); -INIT_LIST_HEAD (&driver->device_list); - if (driver->driver_features & DRIVER_MODESET) - return pci_register_driver(&driver->pci_driver); - - /* If not using KMS, fall back to stealth mode manual scanning. */ - for (i = 0; driver->pci_driver.id_table[i].vendor != 0; i++) { - pid = &driver->pci_driver.id_table[i]; - - /* Loop around setting up a DRM device for each PCI device - * matching our ID and device class. If we had the internal - * function that pci_get_subsys and pci_get_class used, we'd - * be able to just pass pid in instead of doing a two-stage - * thing. - */ - pdev = NULL; - while ((pdev = - pci_get_subsys(pid->vendor, pid->device,
pid->subvendor,drivers/gpu/drm/drm_drv.c +4
-10- pid->subdevice, pdev)) != NULL) { -if ((pdev->class & pid->class_mask) != pid->class) -continue ; - -/* stealth mode requires a manual probe */ -pci_dev_get (pdev); -drm_get_dev (pdev, pid, driver); - } - } -return 0 ; +if (driver->driver_features &DRIVER_USE_PLATFORM_DEVICE ) +return drm_platform_init (driver); +else +return drm_pci_init (driver); }EXPORT_SYMBOL (drm_init);drivers/gpu/drm/drm_edid.c +0
-0@@ -1220,6 +1220,9 @@ struct edid *drm_get_edid(struct drm_connector *connector, int ret;struct edid *edid;
Quoted 8 lines
drivers/gpu/drm/drm_edid.c struct edid *drm_get_edid(struct drm_connector *connector, · line 1225
Quoted 4 lines
drivers/gpu/drm/drm_edid.c +3
-0+if (drm_core_check_feature (connector->dev,DRIVER_USE_PLATFORM_DEVICE )) +return NULL ; +This makes no sense, having the ability to probe EDID or not is most definitely not a platform vs PCI problem.
Yeah, that was my poor man's "Don't probe EDID" hack. I'm not sure if there is a smart way to implicitly check to see if EDID should be probed, but I'm worried about abusing the features flag too badly, though if a DRIVER_USE_EDID is needed then we shouldn't be shy about using it.
Quoted 11 lines
drivers/gpu/drm/drm_edid.c
Quoted 8 lines
drivers/gpu/drm/drm_edid.c +0
-0{struct drm_irq_busid *p = data;drivers/gpu/drm/drm_edid.c +2
-0+if (drm_core_check_feature (dev,DRIVER_USE_PLATFORM_DEVICE )) +return -EINVAL ;Not 100% sure about this, but if you only intend on KMS and don't need to inform userspace of irq support this should be okay.
Again, a "don't do this" hack. I'll look at this more carefully and see if there is a good way to evaluate this based on the hooks that the platform has defined.
Quoted 73 lines
Quoted 73 lines
drivers/gpu/drm/drm_vm.c +1
-1@@ -60,7 +60,7 @@ static pgprot_t drm_io_prot(uint32_t map_type, struct vm_area_struct *vma) tmp =pgprot_writecombine (tmp); else tmp =pgprot_noncached (tmp); -#elif defined(__sparc__) +#elif defined(__sparc__) || defined(__arm__) tmp =pgprot_noncached (tmp);#endif return tmp;drivers/gpu/drm/drm_vm.c +1
-0@@ -600,6 +600,7 @@ int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma) }switch (map->type) { +#if !defined(__arm__)case _DRM_AGP:if (drm_core_has_AGP (dev) && dev->agp->cant_use_aperture) {/*drivers/gpu/drm/drm_vm.c +11
-0@@ -614,20 +615,31 @@ int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma) break; }/* fall through to _DRM_FRAME_BUFFER... */ +#endif case _DRM_FRAME_BUFFER:case _DRM_REGISTERS: offset = dev->driver->get_reg_ofs (dev); vma->vm_flags |=VM_IO ;/* not in core dump */ vma->vm_page_prot =drm_io_prot (map->type, vma); +#if !defined(__arm__)if (io_remap_pfn_range (vma, vma->vm_start, (map->offset + offset) >>PAGE_SHIFT , vma->vm_end - vma->vm_start, vma->vm_page_prot))return -EAGAIN ; +#else +if (remap_pfn_range (vma, vma->vm_start, + (map->offset + offset) >>PAGE_SHIFT , + vma->vm_end - vma->vm_start, + vma->vm_page_prot)) +return -EAGAIN ; +#endif +DRM_DEBUG (" Type = %d; start = 0x%lx, end = 0x%lx," " offset = 0x%llx\n" , map->type, vma->vm_start, vma->vm_end, (unsigned long long )(map->offset + offset)); +vma->vm_ops = &drm_vm_ops; break; case _DRM_CONSISTENT:drivers/gpu/drm/i915/i915_drv.c +1
-1@@ -392,7 +392,7 @@ int i965_reset(struct drm_device *dev, u8 flags)static int __devinit i915_pci_probe (struct pci_dev *pdev,const struct pci_device_id *ent) { -return drm_get_dev (pdev, ent, &driver); +return drm_get_pci_dev (pdev, ent, &driver); }
Quoted 16 lines
Quoted 7 lines
drivers/gpu/drm/i915/i915_drv.c +0
-0static voiddrivers/gpu/drm/radeon/radeon_drv.c +0
-0drivers/gpu/drm/radeon/radeon_drv.c static struct drm_driver kms_driver; · line 228
Quoted 7 lines
drivers/gpu/drm/radeon/radeon_drv.c +1
-1@@ -223,7 +223,7 @@ static struct drm_driver kms_driver;static int __devinit radeon_pci_probe (struct pci_dev *pdev,const struct pci_device_id *ent) { -return drm_get_dev (pdev, ent, &kms_driver); +return drm_get_pci_dev (pdev, ent, &kms_driver); }This also doesn't address noueau/vmwgfx entry points.
Yep, thats my bad. I'll refresh and push better patches without whitespace stupidity. Thanks for your comments.
Jordan
Dave Airlie
maintainerQuoted 4 lines
I guess technically we could also drop the AGP requirement, but since it worked
on my box with AGP=n it seemed to me like a NOP.
Its not a NOP, otherwise we'd remove it, AGP || AGP=n means if AGP is enabled DRM must be enabled similiarly, it stops AGP=m + DRM=y basically.
Quoted 19 lines
Quoted 10 lines
Quoted 10 lines
EXPORT_SYMBOL(drm_init);
drivers/gpu/drm/drm_edid.c +0
-0@@ -1220,6 +1220,9 @@ struct edid *drm_get_edid(struct drm_connector *connector, int ret; struct edid *edid;Quoted 8 lines
drivers/gpu/drm/drm_edid.c struct edid *drm_get_edid(struct drm_connector *connector, · line 1225
Quoted 4 lines
drivers/gpu/drm/drm_edid.c +3
-0+ if (drm_core_check_feature(connector->dev,DRIVER_USE_PLATFORM_DEVICE )) + return NULL; +This makes no sense, having the ability to probe EDID or not is most definitely not a platform vs PCI problem.
Quoted 5 lines
Yeah, that was my poor man's "Don't probe EDID" hack. I'm not sure if there is a smart way to implicitly check to see if EDID should be probed, but I'm worried about abusing the features flag too badly, though if a
DRIVER_USE_EDID
is needed then we shouldn't be shy about using it.
The generic code never calls this only the driver, so there should be no need for flags at all.
Quoted 7 lines
Quoted 2 lines
Not 100% sure about this, but if you only intend on KMS and don't need to inform userspace of irq support this should be okay.
Again, a "don't do this" hack. I'll look at this more carefully and see if there
is a good way to evaluate this based on the hooks that the platform has defined.
Its mostly used in UMS to inform userspace for some strange reason its pretty legacy at this point, new driver should probably not hit it.
Quoted 7 lines
Quoted 4 lines
drivers/gpu/drm/drm_edid.c static pgprot_t drm_io_prot(uint32_t map_type, struct
Quoted 1 line
drivers/gpu/drm/drm_edid.c +0
-0@@ -60,7 +60,7 @@ static pgprot_t drm_io_prot(uint32_t map_type, structThis also doesn't address noueau/vmwgfx entry points.
Yep, thats my bad. I'll refresh and push better patches without whitespace stupidity.
Thanks,
Dave.
Quoted 17 lines · Dave Airlie
Quoted 4 lines · Jordan Crouse
Allow platform devices without PCI resources to be DRM devices.
Signed-off-by Jordan Crouse <[email protected]>This patch has a bunch of whitespace damage at least in my inbox and also in patchwork
Please also be careful with the places you add copyrights, you moved a bunch of code from
drm_drv.ctodrm_pci.cand added a copyright for Code Aurora indrm_pci.c? You can only assert copyright if you actually wrote the code, otherwise the patch contains your authorship details and who contributed the code. I'm guessing you might have copyright over one file in this that beingdrm_platform.c, the rest I'm less sure about.
Quoted 3 lines
I also wonder if we could/should separate the arm drm support out from this patch (i.e. the
__arm__changes).
Also note that pgprot_noncached() is a standard interface these days, so there is no longer any reason to special case it. There's no reason for the io prot mapping code turning in to the hell that was the fbmem.c mmap.
Quoted 2 lines · Jordan Crouse
Allow platform devices without PCI resources to be DRM devices.
I really dislike the fact that drm has bus specific junk all over the generic code. Some ideas how to clean that up:
Add 'struct device *dev' into drm_device so you don't have to go through the pdev/platformdev to get it every time. Also use dev_name() instead of pci_name() and whatever you used for the platform device case.
Add 'int irq' into struct drm_device instead of adding more bus specific hoops to get at the irq. Not sure I like the generic code mucking about with the irq directly though but baby steps are easier to handle.
Get rid of the drm_resource_start/len wrappers. AFAICS they're all called from the low level driver code anyway and the driver knows the bus type so there's no need for the wrappers.
It would be nice to get the struct pci_driver out of the the drm_driver structure. Since you now have a new pci specific drm_get_dev() thing could you also pass the pci_driver as a function parameter instead of having it live inside the drm_driver?
Also all cases where there's some PCI specific stuff (the busid stuff mostly) you could just check the drm_device.pdev pointer instead of having to add another driver flags to identify non-PCI devices. Although I don't really like having the pdev/platformdev pointers in there at all.
That's sort of my secret drm TODO list but so far didn't have the time to actually do the coding part.
Signature · 3 lines
Ville Syrjälä [email protected] http://www.sci.fi/~syrjala/
PATCH v2 1/1 DRM platform device support
In reply to Jordan CrouseHere is the second revision implementing platform device support for DRM. I've split the original patch into three and applied most of the comments I got from the previous go-around. The first patch removes the resource wrappers from DRM and switches the drivers to use the bus level functions. The second patch adds the platform support, and the third patch adds the ARM specific #ifdefs.
Plus, a bonus patch that ensures that the DRM offset fits into the pgoff (unsigned long) offset for mmap. The original code made a 64 bit value that didn't fly with a 32 bit processor.
Thanks for the comments and keep em coming.
Jordan
PATCH v3 1/1 DRM platform device support
DRM platform device support freshly rebased for 2.6.35. Nothing changed in the code over the set I sent on 5/27.
Jordan
PATCH 1/4 drm: Remove drm_resource wrappers
In reply to [email protected]Remove the drm_resource wrappers and directly use the actual PCI and/or platform functions in their place.
--- drivers/gpu/drm/drm_bufs.c | 13 ------------- drivers/gpu/drm/i915/i915_dma.c | 6 +++--- drivers/gpu/drm/mga/mga_dma.c | 4 ++-- drivers/gpu/drm/nouveau/nouveau_bo.c | 2 +- drivers/gpu/drm/nouveau/nouveau_channel.c | 3 ++- drivers/gpu/drm/nouveau/nouveau_mem.c | 16 +++++++++------- drivers/gpu/drm/nouveau/nv20_graph.c | 4 ++-- drivers/gpu/drm/nouveau/nv40_graph.c | 2 +- drivers/gpu/drm/nouveau/nv50_instmem.c | 3 ++- drivers/gpu/drm/radeon/evergreen.c | 4 ++-- drivers/gpu/drm/radeon/r100.c | 4 ++-- drivers/gpu/drm/radeon/r600.c | 4 ++-- drivers/gpu/drm/radeon/radeon_bios.c | 2 +- drivers/gpu/drm/radeon/radeon_cp.c | 8 ++++---- drivers/gpu/drm/radeon/radeon_device.c | 4 ++-- drivers/gpu/drm/radeon/rs600.c | 4 ++-- drivers/gpu/drm/radeon/rs690.c | 4 ++-- drivers/gpu/drm/radeon/rv770.c | 4 ++-- drivers/gpu/drm/savage/savage_bci.c | 24 +++++++++++++----------- include/drm/drmP.h | 4 ---- 20 files changed, 54 insertions(+), 65 deletions(-)
drivers/gpu/drm/drm_bufs.c +0 -13
@@ -39,19 +39,6 @@#include <asm/shmparam.h> #include "drmP.h" -resource_size_t drm_get_resource_start (struct drm_device *dev,unsigned int resource) -{ -return pci_resource_start (dev->pdev, resource); -} -EXPORT_SYMBOL (drm_get_resource_start); - -resource_size_t drm_get_resource_len (struct drm_device *dev,unsigned int resource) -{ -return pci_resource_len (dev->pdev, resource); -} - -EXPORT_SYMBOL (drm_get_resource_len); -static struct drm_map_list *drm_find_matching_map (struct drm_device *dev,struct drm_local_map *map) {
drivers/gpu/drm/i915/i915_dma.c +3 -3
@@ -1354,7 +1354,7 @@ static int i915_load_modeset_init(struct drm_device *dev,int fb_bar =IS_I9XX (dev) ?2 :0 ;int ret =0 ; - dev->mode_config.fb_base =drm_get_resource_start (dev, fb_bar) & + dev->mode_config.fb_base =pci_resource_start (dev->pdev, fb_bar) &0xff000000 ;/* Basic memrange allocator for stolen space (aka vram) */
@@ -2063,8 +2063,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)/* Add register map (needed for suspend/resume) */ mmio_bar =IS_I9XX (dev) ?0 :1 ; - base =drm_get_resource_start (dev, mmio_bar); - size =drm_get_resource_len (dev, mmio_bar); + base =pci_resource_start (dev->pdev, mmio_bar); + size =pci_resource_len (dev->pdev, mmio_bar);if (i915_get_bridge_dev (dev)) { ret = -EIO ;
drivers/gpu/drm/mga/mga_dma.c +2 -2
@@ -405,8 +405,8 @@ int mga_driver_load(struct drm_device * dev, unsigned long flags) dev_priv->usec_timeout =MGA_DEFAULT_USEC_TIMEOUT ; dev_priv->chipset = flags; - dev_priv->mmio_base =drm_get_resource_start (dev,1 ); - dev_priv->mmio_size =drm_get_resource_len (dev,1 ); + dev_priv->mmio_base =pci_resource_start (dev->pdev,1 ); + dev_priv->mmio_size =pci_resource_len (dev->pdev,1 ); dev->counters +=3 ; dev->types[6 ] = _DRM_STAT_IRQ;
drivers/gpu/drm/nouveau/nouveau_bo.c +1 -1
@@ -783,7 +783,7 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)break ;case TTM_PL_VRAM : mem->bus.offset = mem->mm_node->start <<PAGE_SHIFT ; - mem->bus.base =drm_get_resource_start (dev,1 ); + man->bus.base =pci_resource_start (dev->pdev,1 ); mem->bus.is_iomem = true;break ;default :
drivers/gpu/drm/nouveau/nouveau_channel.c +2 -1
@@ -62,7 +62,8 @@ nouveau_channel_pushbuf_ctxdma_init(struct nouveau_channel *chan)* VRAM. */ ret =nouveau_gpuobj_dma_new (chan,NV_CLASS_DMA_IN_MEMORY , -drm_get_resource_start (dev,1 ), +pci_resource_start (dev->pdev, +1 ), dev_priv->fb_available_size,NV_DMA_ACCESS_RO ,NV_DMA_TARGET_PCI , &pushbuf);
drivers/gpu/drm/nouveau/nouveau_mem.c +9 -7
@@ -471,8 +471,9 @@ void nouveau_mem_close(struct drm_device *dev) }if (dev_priv->fb_mtrr) { -drm_mtrr_del (dev_priv->fb_mtrr,drm_get_resource_start (dev,1 ), -drm_get_resource_len (dev,1 ),DRM_MTRR_WC ); +drm_mtrr_del (dev_priv->fb_mtrr, +pci_resource_start (dev->pdev,1 ), +pci_resource_len (dev->pdev,1 ),DRM_MTRR_WC ); dev_priv->fb_mtrr =0 ; } }
@@ -633,7 +634,7 @@ nouveau_mem_init(struct drm_device *dev)struct ttm_bo_device *bdev = &dev_priv->ttm.bdev;int ret, dma_bits =32 ; - dev_priv->fb_phys =drm_get_resource_start (dev,1 ); + dev_priv->fb_phys =pci_resource_start (dev->pdev,1 ); dev_priv->gart_info.type =NOUVEAU_GART_NONE ; if (dev_priv->card_type >= NV_50 &&
@@ -665,8 +666,9 @@ nouveau_mem_init(struct drm_device *dev) dev_priv->fb_available_size = dev_priv->vram_size; dev_priv->fb_mappable_pages = dev_priv->fb_available_size; -if (dev_priv->fb_mappable_pages >drm_get_resource_len (dev,1 )) - dev_priv->fb_mappable_pages =drm_get_resource_len (dev,1 ); +if (dev_priv->fb_mappable_pages >pci_resource_len (dev->pdev,1 )) + dev_priv->fb_mappable_pages = +pci_resource_len (dev->pdev,1 ); dev_priv->fb_mappable_pages >>=PAGE_SHIFT ;/* remove reserved space at end of vram from available amount */
@@ -718,8 +720,8 @@ nouveau_mem_init(struct drm_device *dev)return ret; } - dev_priv->fb_mtrr =drm_mtrr_add (drm_get_resource_start (dev,1 ), -drm_get_resource_len (dev,1 ), + dev_priv->fb_mtrr =drm_mtrr_add (pci_resource_start (dev->pdev,1 ), +pci_resource_len (dev->pdev,1 ),DRM_MTRR_WC );return 0 ;
drivers/gpu/drm/nouveau/nv20_graph.c +2 -2
@@ -616,7 +616,7 @@ nv20_graph_init(struct drm_device *dev)nv_wr32 (dev,NV10_PGRAPH_SURFACE , tmp);/* begin RAM config */ - vramsz =drm_get_resource_len (dev,0 ) -1 ; + vramsz =pci_resource_len (dev->pdev,0 ) -1 ;nv_wr32 (dev,0x4009A4 ,nv_rd32 (dev,NV04_PFB_CFG0 ));nv_wr32 (dev,0x4009A8 ,nv_rd32 (dev,NV04_PFB_CFG1 ));nv_wr32 (dev,NV10_PGRAPH_RDI_INDEX ,0x00EA0000 );
@@ -717,7 +717,7 @@ nv30_graph_init(struct drm_device *dev)nv_wr32 (dev,0x0040075c ,0x00000001 );/* begin RAM config */ -/* vramsz = drm_get_resource_len(dev, 0) - 1; */ +/* vramsz = pci_resource_len(dev->pdev, 0) - 1; */ nv_wr32 (dev,0x4009A4 ,nv_rd32 (dev,NV04_PFB_CFG0 ));nv_wr32 (dev,0x4009A8 ,nv_rd32 (dev,NV04_PFB_CFG1 ));if (dev_priv->chipset !=0x34 ) {
drivers/gpu/drm/nouveau/nv40_graph.c +1 -1
@@ -367,7 +367,7 @@ nv40_graph_init(struct drm_device *dev)nv40_graph_set_region_tiling (dev, i,0 ,0 ,0 );/* begin RAM config */ - vramsz =drm_get_resource_len (dev,0 ) -1 ; + vramsz =pci_resource_len (dev->pdev,0 ) -1 ;switch (dev_priv->chipset) {case 0x40 :nv_wr32 (dev,0x4009A4 ,nv_rd32 (dev,NV04_PFB_CFG0 ));
drivers/gpu/drm/nouveau/nv50_instmem.c +2 -1
@@ -241,7 +241,8 @@ nv50_instmem_init(struct drm_device *dev)return ret;BAR0_WI32 (priv->fb_bar->gpuobj,0x00 ,0x7fc00000 );BAR0_WI32 (priv->fb_bar->gpuobj,0x04 ,0x40000000 + -drm_get_resource_len (dev,1 ) -1 ); +pci_resource_len (dev->pmem, +1 ) -1 );BAR0_WI32 (priv->fb_bar->gpuobj,0x08 ,0x40000000 );BAR0_WI32 (priv->fb_bar->gpuobj,0x0c ,0x00000000 );BAR0_WI32 (priv->fb_bar->gpuobj,0x10 ,0x00000000 );
drivers/gpu/drm/radeon/evergreen.c +2 -2
@@ -1334,8 +1334,8 @@ int evergreen_mc_init(struct radeon_device *rdev) } rdev->mc.vram_width = numchan * chansize;/* Could aper size report 0 ? */ - rdev->mc.aper_base =drm_get_resource_start (rdev->ddev,0 ); - rdev->mc.aper_size =drm_get_resource_len (rdev->ddev,0 ); + rdev->mc.aper_base =pci_resource_start (rdev->pdev,0 ); + rdev->mc.aper_size =pci_resource_len (rdev->pdev,0 );/* Setup GPU memory space */ /* size in MB on evergreen */ rdev->mc.mc_vram_size =RREG32 (CONFIG_MEMSIZE ) *1024 *1024 ;
drivers/gpu/drm/radeon/r100.c +2 -2
@@ -2295,8 +2295,8 @@ void r100_vram_init_sizes(struct radeon_device *rdev)u64 config_aper_size;/* work out accessible VRAM */ - rdev->mc.aper_base =drm_get_resource_start (rdev->ddev,0 ); - rdev->mc.aper_size =drm_get_resource_len (rdev->ddev,0 ); + rdev->mc.aper_base =pci_resource_start (rdev->pdev,0 ); + rdev->mc.aper_size =pci_resource_len (rdev->pdev,0 ); rdev->mc.visible_vram_size =r100_get_accessible_vram (rdev);/* FIXME we don't use the second aperture yet when we could use it */ if (rdev->mc.visible_vram_size > rdev->mc.aper_size)
drivers/gpu/drm/radeon/r600.c +2 -2
@@ -1217,8 +1217,8 @@ int r600_mc_init(struct radeon_device *rdev) } rdev->mc.vram_width = numchan * chansize;/* Could aper size report 0 ? */ - rdev->mc.aper_base =drm_get_resource_start (rdev->ddev,0 ); - rdev->mc.aper_size =drm_get_resource_len (rdev->ddev,0 ); + rdev->mc.aper_base =pci_resource_start (rdev->pdev,0 ); + rdev->mc.aper_size =pci_resource_len (rdev->pdev,0 );/* Setup GPU memory space */ rdev->mc.mc_vram_size =RREG32 (CONFIG_MEMSIZE ); rdev->mc.real_vram_size =RREG32 (CONFIG_MEMSIZE );
drivers/gpu/drm/radeon/radeon_bios.c +1 -1
@@ -53,7 +53,7 @@ static bool igp_read_bios_from_vram(struct radeon_device *rdev)return false; rdev->bios =NULL ; - vram_base =drm_get_resource_start (rdev->ddev,0 ); + vram_base =pci_resource_start (rdev->pdev,0 ); bios =ioremap (vram_base, size);if (!bios) {return false;
drivers/gpu/drm/radeon/radeon_cp.c +4 -4
@@ -2120,8 +2120,8 @@ int radeon_driver_load(struct drm_device *dev, unsigned long flags)else dev_priv->flags |=RADEON_IS_PCI ; - ret =drm_addmap (dev,drm_get_resource_start (dev,2 ), -drm_get_resource_len (dev,2 ), _DRM_REGISTERS, + ret =drm_addmap (dev,pci_resource_start (dev->pdev,2 ), +pci_resource_len (dev->pdev,2 ), _DRM_REGISTERS, _DRM_READ_ONLY | _DRM_DRIVER, &dev_priv->mmio);if (ret !=0 )return ret;
@@ -2194,9 +2194,9 @@ int radeon_driver_firstopen(struct drm_device *dev) dev_priv->gart_info.table_size =RADEON_PCIGART_TABLE_SIZE ; - dev_priv->fb_aper_offset =drm_get_resource_start (dev,0 ); + dev_priv->fb_aper_offset =pci_resource_start (dev->pdev,0 ); ret =drm_addmap (dev, dev_priv->fb_aper_offset, -drm_get_resource_len (dev,0 ), _DRM_FRAME_BUFFER, +pci_resource_len (dev->pdev,0 ), _DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING, &map);if (ret !=0 )return ret;
drivers/gpu/drm/radeon/radeon_device.c +2 -2
@@ -650,8 +650,8 @@ int radeon_device_init(struct radeon_device *rdev,/* Registers mapping */ /* TODO: block userspace mapping of io register */ - rdev->rmmio_base =drm_get_resource_start (rdev->ddev,2 ); - rdev->rmmio_size =drm_get_resource_len (rdev->ddev,2 ); + rdev->rmmio_base =pci_resource_start (rdev->pdev,2 ); + rdev->rmmio_size =pci_resource_len (rdev->pdev,2 ); rdev->rmmio =ioremap (rdev->rmmio_base, rdev->rmmio_size);if (rdev->rmmio ==NULL ) {return -ENOMEM ;
drivers/gpu/drm/radeon/rs600.c +2 -2
@@ -686,8 +686,8 @@ void rs600_mc_init(struct radeon_device *rdev) {u64 base; - rdev->mc.aper_base =drm_get_resource_start (rdev->ddev,0 ); - rdev->mc.aper_size =drm_get_resource_len (rdev->ddev,0 ); + rdev->mc.aper_base =pci_resource_start (rdev->pdev,0 ); + rdev->mc.aper_size =pci_resource_len (rdev->pdev,0 ); rdev->mc.vram_is_ddr = true; rdev->mc.vram_width =128 ; rdev->mc.real_vram_size =RREG32 (RADEON_CONFIG_MEMSIZE );
drivers/gpu/drm/radeon/rs690.c +2 -2
@@ -154,8 +154,8 @@ void rs690_mc_init(struct radeon_device *rdev) rdev->mc.vram_width =128 ; rdev->mc.real_vram_size =RREG32 (RADEON_CONFIG_MEMSIZE ); rdev->mc.mc_vram_size = rdev->mc.real_vram_size; - rdev->mc.aper_base =drm_get_resource_start (rdev->ddev,0 ); - rdev->mc.aper_size =drm_get_resource_len (rdev->ddev,0 ); + rdev->mc.aper_base =pci_resource_start (rdev->pdev,0 ); + rdev->mc.aper_size =pci_resource_len (rdev->pdev,0 ); rdev->mc.visible_vram_size = rdev->mc.aper_size; base =RREG32_MC (R_000100_MCCFG_FB_LOCATION ); base =G_000100_MC_FB_START (base) <<16 ;
drivers/gpu/drm/radeon/rv770.c +2 -2
@@ -919,8 +919,8 @@ int rv770_mc_init(struct radeon_device *rdev) } rdev->mc.vram_width = numchan * chansize;/* Could aper size report 0 ? */ - rdev->mc.aper_base =drm_get_resource_start (rdev->ddev,0 ); - rdev->mc.aper_size =drm_get_resource_len (rdev->ddev,0 ); + rdev->mc.aper_base =pci_resource_start (rdev->pdev,0 ); + rdev->mc.aper_size =pci_resource_len (rdev->pdev,0 );/* Setup GPU memory space */ rdev->mc.mc_vram_size =RREG32 (CONFIG_MEMSIZE ); rdev->mc.real_vram_size =RREG32 (CONFIG_MEMSIZE );
drivers/gpu/drm/savage/savage_bci.c +13 -11
@@ -573,13 +573,13 @@ int savage_driver_firstopen(struct drm_device *dev) dev_priv->mtrr[2 ].handle =-1 ;if (S3_SAVAGE3D_SERIES (dev_priv->chipset)) { fb_rsrc =0 ; - fb_base =drm_get_resource_start (dev,0 ); + fb_base =pci_resource_start (dev->pdev,0 ); fb_size =SAVAGE_FB_SIZE_S3 ; mmio_base = fb_base +SAVAGE_FB_SIZE_S3 ; aper_rsrc =0 ; aperture_base = fb_base +SAVAGE_APERTURE_OFFSET ;/* this should always be true */ -if (drm_get_resource_len (dev,0 ) ==0x08000000 ) { +if (pci_resource_len (dev->pdev,0 ) ==0x08000000 ) {/* Don't make MMIO write-cobining! We need 3 * MTRRs. */ dev_priv->mtrr[0 ].base = fb_base;
@@ -599,18 +599,19 @@ int savage_driver_firstopen(struct drm_device *dev) dev_priv->mtrr[2].size, DRM_MTRR_WC); }else {DRM_ERROR ("strange pci_resource_len %08llx\n" , - (unsigned long long )drm_get_resource_len (dev,0 )); + (unsigned long long ) +pci_resource_len (dev->pdev,0 )); } }else if (dev_priv->chipset !=S3_SUPERSAVAGE && dev_priv->chipset !=S3_SAVAGE2000 ) { - mmio_base =drm_get_resource_start (dev,0 ); + mmio_base =pci_resource_start (dev->pdev,0 ); fb_rsrc =1 ; - fb_base =drm_get_resource_start (dev,1 ); + fb_base =pci_resource_start (dev->pdev,1 ); fb_size =SAVAGE_FB_SIZE_S4 ; aper_rsrc =1 ; aperture_base = fb_base +SAVAGE_APERTURE_OFFSET ;/* this should always be true */ -if (drm_get_resource_len (dev,1 ) ==0x08000000 ) { +if (pci_resource_len (dev->pdev,1 ) ==0x08000000 ) {/* Can use one MTRR to cover both fb and * aperture. */ dev_priv->mtrr[0 ].base = fb_base;
@@ -620,15 +621,16 @@ int savage_driver_firstopen(struct drm_device *dev) dev_priv->mtrr[0].size, DRM_MTRR_WC); }else {DRM_ERROR ("strange pci_resource_len %08llx\n" , - (unsigned long long )drm_get_resource_len (dev,1 )); + (unsigned long long ) +pci_resource_len (dev->pdev,1 )); } }else { - mmio_base =drm_get_resource_start (dev,0 ); + mmio_base =pci_resource_start (dev->pdev,0 ); fb_rsrc =1 ; - fb_base =drm_get_resource_start (dev,1 ); - fb_size =drm_get_resource_len (dev,1 ); + fb_base =pci_resource_start (dev->pdev,1 ); + fb_size =pci_resource_len (dev->pdev,1 ); aper_rsrc =2 ; - aperture_base =drm_get_resource_start (dev,2 ); + aperture_base =pci_resource_start (dev->pdev,2 );/* Automatic MTRR setup will do the right thing. */ }
include/drm/drmP.h +0 -4
@@ -1273,10 +1273,6 @@ extern int drm_freebufs(struct drm_device *dev, void *data,extern int drm_mapbufs (struct drm_device *dev,void *data,struct drm_file *file_priv);extern int drm_order (unsigned long size); -extern resource_size_t drm_get_resource_start (struct drm_device *dev, -unsigned int resource); -extern resource_size_t drm_get_resource_len (struct drm_device *dev, -unsigned int resource);/* DMA support (drm_dma.h) */ extern int drm_dma_setup (struct drm_device *dev);
Signature · 1 line
1.7.0.1
Re: [PATCH 1/4] drm: Remove drm_resource wrappers
Quoted 443 lines · Jordan Crouse
Remove the
drm_resourcewrappers and directly use the actual PCI and/or platform functions in their place.Signed-off-by Jordan Crouse <[email protected]>---
drivers/gpu/drm/drm_bufs.c | 13 -------------drivers/gpu/drm/i915/i915_dma.c| 6 +++---drivers/gpu/drm/mga/mga_dma.c| 4 ++--drivers/gpu/drm/nouveau/nouveau_bo.c| 2 +-drivers/gpu/drm/nouveau/nouveau_channel.c| 3 ++-drivers/gpu/drm/nouveau/nouveau_mem.c| 16 +++++++++-------drivers/gpu/drm/nouveau/nv20_graph.c| 4 ++--drivers/gpu/drm/nouveau/nv40_graph.c| 2 +-drivers/gpu/drm/nouveau/nv50_instmem.c| 3 ++-drivers/gpu/drm/radeon/evergreen.c| 4 ++--drivers/gpu/drm/radeon/r100.c| 4 ++--drivers/gpu/drm/radeon/r600.c| 4 ++--drivers/gpu/drm/radeon/radeon_bios.c| 2 +-drivers/gpu/drm/radeon/radeon_cp.c| 8 ++++----drivers/gpu/drm/radeon/radeon_device.c| 4 ++--drivers/gpu/drm/radeon/rs600.c | 4 ++-- drivers/gpu/drm/radeon/rs690.c | 4 ++-- drivers/gpu/drm/radeon/rv770.c | 4 ++-- drivers/gpu/drm/savage/savage_bci.c | 24 +++++++++++++----------- include/drm/drmP.h | 4 ---- 20 files changed, 54 insertions(+), 65 deletions(-)drivers/gpu/drm/drm_bufs.c +0
-13@@ -39,19 +39,6 @@ #include <asm/shmparam.h> #include "drmP.h" -resource_size_t drm_get_resource_start (struct drm_device *dev,unsigned int resource) -{ - return pci_resource_start(dev->pdev, resource); -} -EXPORT_SYMBOL (drm_get_resource_start); - -resource_size_t drm_get_resource_len (struct drm_device *dev,unsigned int resource) -{ - return pci_resource_len(dev->pdev, resource); -} - -EXPORT_SYMBOL (drm_get_resource_len); - static struct drm_map_list *drm_find_matching_map(struct drm_device *dev, struct drm_local_map *map) {drivers/gpu/drm/i915/i915_dma.c +3
-3@@ -1354,7 +1354,7 @@ static int i915_load_modeset_init(struct drm_device *dev, int fb_bar = IS_I9XX(dev) ? 2 : 0; int ret = 0; - dev->mode_config.fb_base = drm_get_resource_start(dev, fb_bar) & + dev->mode_config.fb_base = pci_resource_start(dev->pdev, fb_bar) & 0xff000000; /* Basic memrange allocator for stolen space (aka vram) */@@ -2063,8 +2063,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) /* Add register map (needed for suspend/resume) */ mmio_bar = IS_I9XX(dev) ? 0 : 1; - base = drm_get_resource_start(dev, mmio_bar); - size = drm_get_resource_len(dev, mmio_bar); + base = pci_resource_start(dev->pdev, mmio_bar); + size = pci_resource_len(dev->pdev, mmio_bar); if (i915_get_bridge_dev(dev)) { ret = -EIO;drivers/gpu/drm/mga/mga_dma.c +2
-2@@ -405,8 +405,8 @@ int mga_driver_load(struct drm_device * dev, unsigned long flags) dev_priv->usec_timeout = MGA_DEFAULT_USEC_TIMEOUT; dev_priv->chipset = flags; - dev_priv->mmio_base = drm_get_resource_start(dev, 1); - dev_priv->mmio_size = drm_get_resource_len(dev, 1); + dev_priv->mmio_base = pci_resource_start(dev->pdev, 1); + dev_priv->mmio_size = pci_resource_len(dev->pdev, 1); dev->counters += 3; dev->types[6] = _DRM_STAT_IRQ;drivers/gpu/drm/nouveau/nouveau_bo.c +0
-0@@ -783,7 +783,7 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem) break;case
TTM_PL_VRAM:
mem->bus.offset =mem->mm_node->start<<PAGE_SHIFT;
-mem->bus.base=drm_get_resource_start(dev, 1);
+man->bus.base=pci_resource_start(dev->pdev, 1);mem->bus.is_iomem= true;
break;
default:drivers/gpu/drm/nouveau/nouveau_channel.c +2
-1@@ -62,7 +62,8 @@ nouveau_channel_pushbuf_ctxdma_init(struct nouveau_channel *chan)* VRAM. */ ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY, - drm_get_resource_start(dev, 1), + pci_resource_start(dev->pdev, + 1), dev_priv->fb_available_size, NV_DMA_ACCESS_RO, NV_DMA_TARGET_PCI, &pushbuf);drivers/gpu/drm/nouveau/nouveau_mem.c +4
-3@@ -471,8 +471,9 @@ void nouveau_mem_close(struct drm_device *dev) } if (dev_priv->fb_mtrr) { - drm_mtrr_del(dev_priv->fb_mtrr, drm_get_resource_start(dev, 1), - drm_get_resource_len(dev, 1), DRM_MTRR_WC); + drm_mtrr_del(dev_priv->fb_mtrr, + pci_resource_start(dev->pdev, 1), + pci_resource_len(dev->pdev, 1), DRM_MTRR_WC); dev_priv->fb_mtrr = 0; } }@@ -633,7 +634,7 @@ nouveau_mem_init(struct drm_device *dev) struct ttm_bo_device *bdev = &dev_priv->ttm.bdev; int ret, dma_bits = 32; - dev_priv->fb_phys = drm_get_resource_start(dev, 1); + dev_priv->fb_phys = pci_resource_start(dev->pdev, 1); dev_priv->gart_info.type = NOUVEAU_GART_NONE;if (
dev_priv->card_type>=NV_50&&drivers/gpu/drm/nouveau/nouveau_mem.c +5
-4@@ -665,8 +666,9 @@ nouveau_mem_init(struct drm_device *dev) dev_priv->fb_available_size = dev_priv->vram_size; dev_priv->fb_mappable_pages = dev_priv->fb_available_size; - if (dev_priv->fb_mappable_pages > drm_get_resource_len(dev, 1)) - dev_priv->fb_mappable_pages = drm_get_resource_len(dev, 1); + if (dev_priv->fb_mappable_pages > pci_resource_len(dev->pdev, 1)) + dev_priv->fb_mappable_pages = + pci_resource_len(dev->pdev, 1); dev_priv->fb_mappable_pages >>= PAGE_SHIFT; /* remove reserved space at end of vram from available amount */@@ -718,8 +720,8 @@ nouveau_mem_init(struct drm_device *dev) return ret; } - dev_priv->fb_mtrr = drm_mtrr_add(drm_get_resource_start(dev, 1), - drm_get_resource_len(dev, 1), + dev_priv->fb_mtrr = drm_mtrr_add(pci_resource_start(dev->pdev, 1), + pci_resource_len(dev->pdev, 1), DRM_MTRR_WC); return 0;drivers/gpu/drm/nouveau/nv20_graph.c +2
-2@@ -616,7 +616,7 @@ nv20_graph_init(struct drm_device *dev) nv_wr32(dev, NV10_PGRAPH_SURFACE, tmp); /* begin RAM config */ - vramsz = drm_get_resource_len(dev, 0) - 1; + vramsz = pci_resource_len(dev->pdev, 0) - 1; nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0)); nv_wr32(dev, 0x4009A8, nv_rd32(dev, NV04_PFB_CFG1)); nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0000);@@ -717,7 +717,7 @@ nv30_graph_init(struct drm_device *dev) nv_wr32(dev, 0x0040075c , 0x00000001); /* begin RAM config */ - /* vramsz = drm_get_resource_len(dev, 0) - 1; */ + /* vramsz = pci_resource_len(dev->pdev, 0) - 1; */ nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0)); nv_wr32(dev, 0x4009A8, nv_rd32(dev, NV04_PFB_CFG1)); if (dev_priv->chipset != 0x34) {drivers/gpu/drm/nouveau/nv40_graph.c +1
-1@@ -367,7 +367,7 @@ nv40_graph_init(struct drm_device *dev) nv40_graph_set_region_tiling(dev, i, 0, 0, 0); /* begin RAM config */ - vramsz = drm_get_resource_len(dev, 0) - 1; + vramsz = pci_resource_len(dev->pdev, 0) - 1; switch (dev_priv->chipset) {case
0x40:
nv_wr32(dev,0x4009A4,nv_rd32(dev, NV04_PFB_CFG0));drivers/gpu/drm/nouveau/nv50_instmem.c +0
-0@@ -241,7 +241,8 @@ nv50_instmem_init(struct drm_device *dev) return ret; BAR0_WI32(priv->fb_bar->gpuobj, 0x00, 0x7fc00000);BAR0_WI32(priv->fb_bar->gpuobj,
0x04,0x40000000+
-drm_get_resource_len(dev, 1)- 1);
+ pci_resource_len(dev->pmem,
+ 1) - 1);BAR0_WI32(priv->fb_bar->gpuobj, 0x08, 0x40000000);BAR0_WI32(priv->fb_bar->gpuobj, 0x0c, 0x00000000);BAR0_WI32(priv->fb_bar->gpuobj, 0x10, 0x00000000);drivers/gpu/drm/radeon/evergreen.c +2
-2@@ -1334,8 +1334,8 @@ int evergreen_mc_init(struct radeon_device *rdev) } rdev->mc.vram_width = numchan * chansize; /* Could aper size report 0 ? */ - rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); - rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); + rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); + rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); /* Setup GPU memory space */ /* size in MB on evergreen */ rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;drivers/gpu/drm/radeon/r100.c +2
-2@@ -2295,8 +2295,8 @@ void r100_vram_init_sizes(struct radeon_device *rdev) u64 config_aper_size; /* work out accessible VRAM */ - rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); - rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); + rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); + rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); rdev->mc.visible_vram_size = r100_get_accessible_vram(rdev); /* FIXME we don't use the second aperture yet when we could use it */ if (rdev->mc.visible_vram_size > rdev->mc.aper_size)drivers/gpu/drm/radeon/r600.c +2
-2@@ -1217,8 +1217,8 @@ int r600_mc_init(struct radeon_device *rdev) } rdev->mc.vram_width = numchan * chansize; /* Could aper size report 0 ? */ - rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); - rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); + rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); + rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); /* Setup GPU memory space */ rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE); rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);drivers/gpu/drm/radeon/radeon_bios.c +1
-1@@ -53,7 +53,7 @@ static bool igp_read_bios_from_vram(struct radeon_device *rdev) return false; rdev->bios = NULL; - vram_base = drm_get_resource_start(rdev->ddev, 0); + vram_base = pci_resource_start(rdev->pdev, 0); bios = ioremap(vram_base, size); if (!bios) { return false;drivers/gpu/drm/radeon/radeon_cp.c +0
-0@@ -2120,8 +2120,8 @@ int radeon_driver_load(struct drm_device *dev, unsigned long flags)else
dev_priv->flags |=RADEON_IS_PCI;- ret = drm_addmap(dev,
drm_get_resource_start(dev, 2),
- drm_get_resource_len(dev, 2),_DRM_REGISTERS,
+ ret = drm_addmap(dev,pci_resource_start(dev->pdev, 2),
+ pci_resource_len(dev->pdev, 2),_DRM_REGISTERS,_DRM_READ_ONLY|_DRM_DRIVER,&dev_priv->mmio); if (ret != 0)
return ret;drivers/gpu/drm/radeon/radeon_cp.c +2
-2@@ -2194,9 +2194,9 @@ int radeon_driver_firstopen(struct drm_device *dev) dev_priv->gart_info.table_size = RADEON_PCIGART_TABLE_SIZE; - dev_priv->fb_aper_offset = drm_get_resource_start(dev, 0); + dev_priv->fb_aper_offset = pci_resource_start(dev->pdev, 0); ret = drm_addmap(dev, dev_priv->fb_aper_offset, - drm_get_resource_len(dev, 0), _DRM_FRAME_BUFFER, + pci_resource_len(dev->pdev, 0), _DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING, &map); if (ret != 0) return ret;drivers/gpu/drm/radeon/radeon_device.c +2
-2@@ -650,8 +650,8 @@ int radeon_device_init(struct radeon_device *rdev, /* Registers mapping */ /* TODO: block userspace mapping of io register */ - rdev->rmmio_base = drm_get_resource_start(rdev->ddev, 2); - rdev->rmmio_size = drm_get_resource_len(rdev->ddev, 2); + rdev->rmmio_base = pci_resource_start(rdev->pdev, 2); + rdev->rmmio_size = pci_resource_len(rdev->pdev, 2); rdev->rmmio = ioremap(rdev->rmmio_base, rdev->rmmio_size); if (rdev->rmmio == NULL) { return -ENOMEM;drivers/gpu/drm/radeon/rs600.c +2
-2@@ -686,8 +686,8 @@ void rs600_mc_init(struct radeon_device *rdev) { u64 base; - rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); - rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); + rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); + rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); rdev->mc.vram_is_ddr = true; rdev->mc.vram_width = 128; rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);drivers/gpu/drm/radeon/rs690.c +2
-2@@ -154,8 +154,8 @@ void rs690_mc_init(struct radeon_device *rdev) rdev->mc.vram_width = 128; rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE); rdev->mc.mc_vram_size = rdev->mc.real_vram_size; - rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); - rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); + rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); + rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); rdev->mc.visible_vram_size = rdev->mc.aper_size; base = RREG32_MC(R_000100_MCCFG_FB_LOCATION); base = G_000100_MC_FB_START(base) << 16;drivers/gpu/drm/radeon/rv770.c +2
-2@@ -919,8 +919,8 @@ int rv770_mc_init(struct radeon_device *rdev) } rdev->mc.vram_width = numchan * chansize; /* Could aper size report 0 ? */ - rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); - rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); + rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); + rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); /* Setup GPU memory space */ rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE); rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);drivers/gpu/drm/savage/savage_bci.c +13
-11@@ -573,13 +573,13 @@ int savage_driver_firstopen(struct drm_device *dev) dev_priv->mtrr[2].handle = -1; if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { fb_rsrc = 0; - fb_base = drm_get_resource_start(dev, 0); + fb_base = pci_resource_start(dev->pdev, 0); fb_size = SAVAGE_FB_SIZE_S3; mmio_base = fb_base + SAVAGE_FB_SIZE_S3; aper_rsrc = 0; aperture_base = fb_base + SAVAGE_APERTURE_OFFSET; /* this should always be true */ - if (drm_get_resource_len(dev, 0) == 0x08000000) { + if (pci_resource_len(dev->pdev, 0) == 0x08000000) { /* Don't make MMIO write-cobining! We need 3 * MTRRs. */ dev_priv->mtrr[0].base = fb_base;@@ -599,18 +599,19 @@ int savage_driver_firstopen(struct drm_device *dev) dev_priv->mtrr[2].size, DRM_MTRR_WC); } else { DRM_ERROR("strange pci_resource_len %08llx\n", - (unsigned long long)drm_get_resource_len(dev, 0)); + (unsigned long long) + pci_resource_len(dev->pdev, 0)); } } else if (dev_priv->chipset != S3_SUPERSAVAGE && dev_priv->chipset != S3_SAVAGE2000) { - mmio_base = drm_get_resource_start(dev, 0); + mmio_base = pci_resource_start(dev->pdev, 0); fb_rsrc = 1; - fb_base = drm_get_resource_start(dev, 1); + fb_base = pci_resource_start(dev->pdev, 1); fb_size = SAVAGE_FB_SIZE_S4; aper_rsrc = 1; aperture_base = fb_base + SAVAGE_APERTURE_OFFSET; /* this should always be true */ - if (drm_get_resource_len(dev, 1) == 0x08000000) { + if (pci_resource_len(dev->pdev, 1) == 0x08000000) { /* Can use one MTRR to cover both fb and * aperture. */ dev_priv->mtrr[0].base = fb_base;@@ -620,15 +621,16 @@ int savage_driver_firstopen(struct drm_device *dev) dev_priv->mtrr[0].size, DRM_MTRR_WC); } else { DRM_ERROR("strange pci_resource_len %08llx\n", - (unsigned long long)drm_get_resource_len(dev, 1)); + (unsigned long long) + pci_resource_len(dev->pdev, 1)); } } else { - mmio_base = drm_get_resource_start(dev, 0); + mmio_base = pci_resource_start(dev->pdev, 0); fb_rsrc = 1; - fb_base = drm_get_resource_start(dev, 1); - fb_size = drm_get_resource_len(dev, 1); + fb_base = pci_resource_start(dev->pdev, 1); + fb_size = pci_resource_len(dev->pdev, 1); aper_rsrc = 2; - aperture_base = drm_get_resource_start(dev, 2); + aperture_base = pci_resource_start(dev->pdev, 2); /* Automatic MTRR setup will do the right thing. */ }include/drm/drmP.h +0
-5@@ -1273,10 +1273,6 @@ extern int drm_freebufs(struct drm_device *dev, void *data, extern int drm_mapbufs(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int drm_order(unsigned long size); -extern resource_size_t drm_get_resource_start (struct drm_device *dev, - unsigned int resource); -extern resource_size_t drm_get_resource_len (struct drm_device *dev, - unsigned int resource); /* DMA support (drm_dma.h) */ extern int drm_dma_setup(struct drm_device *dev); --1.7.0.1
Quoted 5 lines
_______________________________________________
dri-devel mailing list
[email protected]
http://lists.freedesktop.org/mailman/listinfo/dri-devel
(I think I sent my reviewed-by the last time this patch was sent.)
PATCH 2/4 drm: Add support for platform devices to register as DRM devices
In reply to [email protected]Allow platform devices without PCI resources to be DRM devices.
--- drivers/gpu/drm/Kconfig | 4 +- drivers/gpu/drm/Makefile | 2 +- drivers/gpu/drm/drm_drv.c | 37 +------- drivers/gpu/drm/drm_edid.c | 4 +- drivers/gpu/drm/drm_info.c | 23 ++++-- drivers/gpu/drm/drm_ioctl.c | 77 ++++++++++++------ drivers/gpu/drm/drm_irq.c | 15 ++-- drivers/gpu/drm/drm_pci.c | 143 +++++++++++++++++++++++++++++++++ drivers/gpu/drm/drm_platform.c | 122 ++++++++++++++++++++++++++++ drivers/gpu/drm/drm_stub.c | 89 +-------------------- drivers/gpu/drm/drm_sysfs.c | 3 +- drivers/gpu/drm/i915/i915_dma.c | 1 + drivers/gpu/drm/i915/i915_drv.c | 2 +- drivers/gpu/drm/nouveau/nouveau_drv.c | 2 +- drivers/gpu/drm/radeon/radeon_drv.c | 2 +- drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 2 +- include/drm/drmP.h | 52 ++++++++++-- 17 files changed, 405 insertions(+), 175 deletions(-) create mode 100644 drivers/gpu/drm/drm_platform.c
drivers/gpu/drm/Kconfig +2 -2
@@ -6,7 +6,7 @@ # menuconfig DRM tristate "Direct Rendering Manager (XFree86 4.1.0 and higher DRI support)" - depends on (AGP || AGP=n) && PCI && !EMULATED_CMPXCHG && MMU + depends on (AGP || AGP=n) && !EMULATED_CMPXCHG && MMU select I2C select I2C_ALGOBIT select SLOW_WORK
@@ -17,7 +17,7 @@ menuconfig DRM These modules provide support for synchronization, security, and DMA transfers. Please see <http://dri.sourceforge.net/> for more details. You should also select and configure AGP - (/dev/agpgart) support. + (/dev/agpgart) support if it is available for your platform. config DRM_KMS_HELPER tristate
drivers/gpu/drm/Makefile +1 -1
@@ -9,7 +9,7 @@ drm-y := drm_auth.o drm_buffer.o drm_bufs.o drm_cache.o \ drm_drv.o drm_fops.o drm_gem.o drm_ioctl.o drm_irq.o \ drm_lock.o drm_memory.o drm_proc.o drm_stub.o drm_vm.o \ drm_agpsupport.o drm_scatter.o ati_pcigart.o drm_pci.o \ - drm_sysfs.o drm_hashtab.o drm_sman.o drm_mm.o \ + drm_platform.o drm_sysfs.o drm_hashtab.o drm_sman.o drm_mm.o \ drm_crtc.o drm_modes.o drm_edid.o \ drm_info.o drm_debugfs.o drm_encoder_slave.o
drivers/gpu/drm/drm_drv.c +5 -32
@@ -243,47 +243,20 @@ int drm_lastclose(struct drm_device * dev)* * Initializes an array of drm_device structures, and attempts to * initialize all available devices, using consecutive minors, registering the -* stubs and initializing the AGP device. +* stubs and initializing the device. * * Expands the \c DRIVER_PREINIT and \c DRIVER_POST_INIT macros before and * after the initialization for driver customization. */ int drm_init (struct drm_driver *driver) { -struct pci_dev *pdev =NULL ; -const struct pci_device_id *pid; -int i; -DRM_DEBUG ("\n" ); -INIT_LIST_HEAD (&driver->device_list); -if (driver->driver_features &DRIVER_MODESET ) -return pci_register_driver (&driver->pci_driver); - -/* If not using KMS, fall back to stealth mode manual scanning. */ -for (i =0 ; driver->pci_driver.id_table[i].vendor !=0 ; i++) { - pid = &driver->pci_driver.id_table[i]; - -/* Loop around setting up a DRM device for each PCI device -* matching our ID and device class. If we had the internal -* function that pci_get_subsys and pci_get_class used, we'd -* be able to just pass pid in instead of doing a two-stage -* thing. -*/ - pdev =NULL ; -while ((pdev = -pci_get_subsys (pid->vendor, pid->device, pid->subvendor, - pid->subdevice, pdev)) !=NULL ) { -if ((pdev->class & pid->class_mask) != pid->class) -continue ; - -/* stealth mode requires a manual probe */ -pci_dev_get (pdev); -drm_get_dev (pdev, pid, driver); - } - } -return 0 ; +if (driver->driver_features &DRIVER_USE_PLATFORM_DEVICE ) +return drm_platform_init (driver); +else +return drm_pci_init (driver); }EXPORT_SYMBOL (drm_init);
drivers/gpu/drm/drm_edid.c +2 -2
@@ -282,7 +282,7 @@ drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)return block; carp: -dev_warn (&connector->dev->pdev->dev,"%s: EDID block %d invalid.\n" , +dev_warn (&connector->dev->dev,"%s: EDID block %d invalid.\n" ,drm_get_connector_name (connector), j); out:
@@ -1626,7 +1626,7 @@ int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)return 0 ; }if (!drm_edid_is_valid (edid)) { -dev_warn (&connector->dev->pdev->dev,"%s: EDID invalid.\n" , +dev_warn (&connector->dev->dev,"%s: EDID invalid.\n" ,drm_get_connector_name (connector));return 0 ; }
drivers/gpu/drm/drm_info.c +17 -6
@@ -51,13 +51,24 @@ int drm_name_info(struct seq_file *m, void *data)if (!master)return 0 ; -if (master->unique) { -seq_printf (m,"%s %s %s\n" , - dev->driver->pci_driver.name, -pci_name (dev->pdev), master->unique); +if (drm_core_check_feature (dev,DRIVER_USE_PLATFORM_DEVICE )) { +if (master->unique) { +seq_printf (m,"%s %s %s\n" , + dev->driver->platform_device->name, +dev_name (dev->dev), master->unique); + }else { +seq_printf (m,"%s\n" , + dev->driver->platform_device->name); + } }else { -seq_printf (m,"%s %s\n" , dev->driver->pci_driver.name, -pci_name (dev->pdev)); +if (master->unique) { +seq_printf (m,"%s %s %s\n" , + dev->driver->pci_driver.name, +dev_name (dev->dev), master->unique); + }else { +seq_printf (m,"%s %s\n" , dev->driver->pci_driver.name, +dev_name (dev->dev)); + } }return 0 ;
drivers/gpu/drm/drm_ioctl.c +48 -23
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drivers/gpu/drm/drm_irq.c +9 -6
@@ -57,6 +57,9 @@ int drm_irq_by_busid(struct drm_device *dev, void *data, {struct drm_irq_busid *p = data; +if (drm_core_check_feature (dev,DRIVER_USE_PLATFORM_DEVICE )) +return -EINVAL ; +if (!drm_core_check_feature (dev,DRIVER_HAVE_IRQ ))return -EINVAL ;
@@ -211,7 +214,7 @@ int drm_irq_install(struct drm_device *dev)if (!drm_core_check_feature (dev,DRIVER_HAVE_IRQ ))return -EINVAL ; -if (dev->pdev->irq ==0 ) +if (drm_dev_to_irq (dev) ==0 )return -EINVAL ;mutex_lock (&dev->struct_mutex);
@@ -229,7 +232,7 @@ int drm_irq_install(struct drm_device *dev) dev->irq_enabled =1 ;mutex_unlock (&dev->struct_mutex); -DRM_DEBUG ("irq=%d\n" , dev->pdev->irq); +DRM_DEBUG ("irq=%d\n" ,drm_dev_to_irq (dev));/* Before installing handler */ dev->driver->irq_preinstall (dev);
@@ -302,14 +305,14 @@ int drm_irq_uninstall(struct drm_device * dev)if (!irq_enabled)return -EINVAL ; -DRM_DEBUG ("irq=%d\n" , dev->pdev->irq); +DRM_DEBUG ("irq=%d\n" ,drm_dev_to_irq (dev));if (!drm_core_check_feature (dev,DRIVER_MODESET ))vga_client_register (dev->pdev,NULL ,NULL ,NULL ); dev->driver->irq_uninstall (dev); -free_irq (dev->pdev->irq, dev); +free_irq (drm_dev_to_irq (dev), dev);return 0 ; }
@@ -341,7 +344,7 @@ int drm_control(struct drm_device *dev, void *data,if (drm_core_check_feature (dev,DRIVER_MODESET ))return 0 ;if (dev->if_version <DRM_IF_VERSION (1 ,2 ) && - ctl->irq != dev->pdev->irq) + ctl->irq !=drm_dev_to_irq (dev))return -EINVAL ;return drm_irq_install (dev);case DRM_UNINST_HANDLER :
@@ -651,7 +654,7 @@ int drm_wait_vblank(struct drm_device *dev, void *data,int ret =0 ;unsigned int flags, seq, crtc; -if ((!dev->pdev->irq) || (!dev->irq_enabled)) +if ((!drm_dev_to_irq (dev)) || (!dev->irq_enabled))return -EINVAL ;if (vblwait->request.type & _DRM_VBLANK_SIGNAL)
drivers/gpu/drm/drm_pci.c +143 -0
147 lines not on this page · raw message
drivers/gpu/drm/drm_platform.c new file +122 -0
122 lines not on this page · raw message
drivers/gpu/drm/drm_stub.c +2 -87
113 lines not on this page · raw message
drivers/gpu/drm/drm_sysfs.c +2 -1
@@ -489,7 +489,8 @@ int drm_sysfs_device_add(struct drm_minor *minor)int err;char *minor_str; - minor->kdev.parent = &minor->dev->pdev->dev; + minor->kdev.parent = &minor->dev->dev; + minor->kdev.class = drm_class; minor->kdev.release = drm_sysfs_device_release; minor->kdev.devt = minor->device;
drivers/gpu/drm/i915/i915_dma.c +1 -0
@@ -34,6 +34,7 @@#include "i915_drm.h" #include "i915_drv.h" #include "i915_trace.h" +#include <linux/pci.h> #include <linux/vgaarb.h> #include <linux/acpi.h> #include <linux/pnp.h>
drivers/gpu/drm/i915/i915_drv.c +1 -1
@@ -413,7 +413,7 @@ int i965_reset(struct drm_device *dev, u8 flags)static int __devinit i915_pci_probe (struct pci_dev *pdev,const struct pci_device_id *ent) { -return drm_get_dev (pdev, ent, &driver); +return drm_get_pci_dev (pdev, ent, &driver); } static void
drivers/gpu/drm/nouveau/nouveau_drv.c +1 -1
@@ -132,7 +132,7 @@ static struct drm_driver driver;static int __devinit nouveau_pci_probe (struct pci_dev *pdev,const struct pci_device_id *ent) { -return drm_get_dev (pdev, ent, &driver); +return drm_get_pci_dev (pdev, ent, &driver); } static void
drivers/gpu/drm/radeon/radeon_drv.c +1 -1
@@ -238,7 +238,7 @@ static struct drm_driver kms_driver;static int __devinit radeon_pci_probe (struct pci_dev *pdev,const struct pci_device_id *ent) { -return drm_get_dev (pdev, ent, &kms_driver); +return drm_get_pci_dev (pdev, ent, &kms_driver); } static void
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c +1 -1
@@ -764,7 +764,7 @@ static struct drm_driver driver = {static int vmw_probe (struct pci_dev *pdev,const struct pci_device_id *ent) { -return drm_get_dev (pdev, ent, &driver); +return drm_get_pci_dev (pdev, ent, &driver); }static int __init vmwgfx_init (void )
include/drm/drmP.h +44 -8
124 lines not on this page · raw message
Signature · 1 line
1.7.0.1
_______________________________________________
dri-devel mailing list
[email protected]
http://lists.freedesktop.org/mailman/listinfo/dri-devel
PATCH 3/4 drm: Add __arm defines to DRM
In reply to [email protected]Add __arm defines to specify behavior specific for an ARM processor.
--- drivers/gpu/drm/drm_bufs.c | 2 +- drivers/gpu/drm/drm_vm.c | 14 +++++++++++++- 2 files changed, 14 insertions(+), 2 deletions(-)
drivers/gpu/drm/drm_bufs.c +1 -1
@@ -176,7 +176,7 @@ static int drm_addmap_core(struct drm_device * dev, resource_size_t offset,switch (map->type) {case _DRM_REGISTERS:case _DRM_FRAME_BUFFER: -#if !defined(__sparc__) && !defined(__alpha__) && !defined(__ia64__) && !defined(__powerpc64__) && !defined(__x86_64__) +#if !defined(__sparc__) && !defined(__alpha__) && !defined(__ia64__) && !defined(__powerpc64__) && !defined(__x86_64__) && !defined(__arm__)if (map->offset + (map->size-1 ) < map->offset || map->offset <virt_to_phys (high_memory)) {kfree (map);
drivers/gpu/drm/drm_vm.c +13 -1
@@ -61,7 +61,7 @@ static pgprot_t drm_io_prot(uint32_t map_type, struct vm_area_struct *vma) tmp =pgprot_writecombine (tmp); else tmp =pgprot_noncached (tmp); -#elif defined(__sparc__) +#elif defined(__sparc__) || defined(__arm__) tmp =pgprot_noncached (tmp);#endif return tmp;
@@ -601,6 +601,7 @@ int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma) }switch (map->type) { +#if !defined(__arm__)case _DRM_AGP:if (drm_core_has_AGP (dev) && dev->agp->cant_use_aperture) {/*
@@ -615,20 +616,31 @@ int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma)break ; }/* fall through to _DRM_FRAME_BUFFER... */ +#endif case _DRM_FRAME_BUFFER:case _DRM_REGISTERS: offset = dev->driver->get_reg_ofs (dev); vma->vm_flags |=VM_IO ;/* not in core dump */ vma->vm_page_prot =drm_io_prot (map->type, vma); +#if !defined(__arm__)if (io_remap_pfn_range (vma, vma->vm_start, (map->offset + offset) >>PAGE_SHIFT , vma->vm_end - vma->vm_start, vma->vm_page_prot))return -EAGAIN ; +#else +if (remap_pfn_range (vma, vma->vm_start, + (map->offset + offset) >>PAGE_SHIFT , + vma->vm_end - vma->vm_start, + vma->vm_page_prot)) +return -EAGAIN ; +#endif +DRM_DEBUG (" Type = %d; start = 0x%lx, end = 0x%lx," " offset = 0x%llx\n" , map->type, vma->vm_start, vma->vm_end, (unsigned long long )(map->offset + offset)); + vma->vm_ops = &drm_vm_ops;break ;case _DRM_CONSISTENT:
Signature · 1 line
1.7.0.1
PATCH 4/4 drm: Make sure the DRM offset matches the CPU
In reply to [email protected]The pgoff option in mmap() is defined as an unsigned long so the offset generated by DRM needs to fit into BITS_PER_LONG for the CPU in question.
--- drivers/gpu/drm/drm_gem.c | 10 ++++++++++ 1 files changed, 10 insertions(+), 0 deletions(-)
drivers/gpu/drm/drm_gem.c +10 -0
@@ -68,8 +68,18 @@* We make up offsets for buffer objects so we can recognize them at * mmap time. */ + +/* pgoff in mmap is an unsigned long, so we need to make sure that +* the faked up offset will fit +*/ + +#if BITS_PER_LONG ==64 #define DRM_FILE_PAGE_OFFSET_START ((0xFFFFFFFFUL >> PAGE_SHIFT) + 1)#define DRM_FILE_PAGE_OFFSET_SIZE ((0xFFFFFFFFUL >> PAGE_SHIFT) * 16) +#else +#define DRM_FILE_PAGE_OFFSET_START ((0xFFFFFFFUL >> PAGE_SHIFT) + 1) +#define DRM_FILE_PAGE_OFFSET_SIZE ((0xFFFFFFFUL >> PAGE_SHIFT) * 16) +#endif /** * Initialize the GEM device fields
Signature · 1 line
1.7.0.1
PATCH 1/4 drm: Remove drm_resource wrappers
In reply to Jordan CrouseFrom: Jordan Crouse <[email protected]>
Remove the drm_resource wrappers and directly use the actual PCI and/or platform functions in their place.
--- drivers/gpu/drm/drm_bufs.c | 13 ------------- drivers/gpu/drm/i915/i915_dma.c | 6 +++--- drivers/gpu/drm/mga/mga_dma.c | 4 ++-- drivers/gpu/drm/nouveau/nouveau_bo.c | 2 +- drivers/gpu/drm/nouveau/nouveau_channel.c | 3 ++- drivers/gpu/drm/nouveau/nouveau_mem.c | 16 +++++++++------- drivers/gpu/drm/nouveau/nv20_graph.c | 4 ++-- drivers/gpu/drm/nouveau/nv40_graph.c | 2 +- drivers/gpu/drm/nouveau/nv50_instmem.c | 3 ++- drivers/gpu/drm/radeon/evergreen.c | 4 ++-- drivers/gpu/drm/radeon/r100.c | 4 ++-- drivers/gpu/drm/radeon/r600.c | 4 ++-- drivers/gpu/drm/radeon/radeon_bios.c | 2 +- drivers/gpu/drm/radeon/radeon_cp.c | 8 ++++---- drivers/gpu/drm/radeon/radeon_device.c | 4 ++-- drivers/gpu/drm/radeon/rs600.c | 4 ++-- drivers/gpu/drm/radeon/rs690.c | 4 ++-- drivers/gpu/drm/radeon/rv770.c | 4 ++-- drivers/gpu/drm/savage/savage_bci.c | 24 +++++++++++++----------- include/drm/drmP.h | 4 ---- 20 files changed, 54 insertions(+), 65 deletions(-)
drivers/gpu/drm/drm_bufs.c +0 -13
@@ -39,19 +39,6 @@#include <asm/shmparam.h> #include "drmP.h" -resource_size_t drm_get_resource_start (struct drm_device *dev,unsigned int resource) -{ -return pci_resource_start (dev->pdev, resource); -} -EXPORT_SYMBOL (drm_get_resource_start); - -resource_size_t drm_get_resource_len (struct drm_device *dev,unsigned int resource) -{ -return pci_resource_len (dev->pdev, resource); -} - -EXPORT_SYMBOL (drm_get_resource_len); -static struct drm_map_list *drm_find_matching_map (struct drm_device *dev,struct drm_local_map *map) {
drivers/gpu/drm/i915/i915_dma.c +3 -3
@@ -1429,7 +1429,7 @@ static int i915_load_modeset_init(struct drm_device *dev,int fb_bar =IS_I9XX (dev) ?2 :0 ;int ret =0 ; - dev->mode_config.fb_base =drm_get_resource_start (dev, fb_bar) & + dev->mode_config.fb_base =pci_resource_start (dev->pdev, fb_bar) &0xff000000 ;/* Basic memrange allocator for stolen space (aka vram) */
@@ -1612,8 +1612,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)/* Add register map (needed for suspend/resume) */ mmio_bar =IS_I9XX (dev) ?0 :1 ; - base =drm_get_resource_start (dev, mmio_bar); - size =drm_get_resource_len (dev, mmio_bar); + base =pci_resource_start (dev->pdev, mmio_bar); + size =pci_resource_len (dev->pdev, mmio_bar);if (i915_get_bridge_dev (dev)) { ret = -EIO ;
drivers/gpu/drm/mga/mga_dma.c +2 -2
@@ -405,8 +405,8 @@ int mga_driver_load(struct drm_device * dev, unsigned long flags) dev_priv->usec_timeout =MGA_DEFAULT_USEC_TIMEOUT ; dev_priv->chipset = flags; - dev_priv->mmio_base =drm_get_resource_start (dev,1 ); - dev_priv->mmio_size =drm_get_resource_len (dev,1 ); + dev_priv->mmio_base =pci_resource_start (dev->pdev,1 ); + dev_priv->mmio_size =pci_resource_len (dev->pdev,1 ); dev->counters +=3 ; dev->types[6 ] = _DRM_STAT_IRQ;
drivers/gpu/drm/nouveau/nouveau_bo.c +1 -1
@@ -783,7 +783,7 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)break ;case TTM_PL_VRAM : mem->bus.offset = mem->mm_node->start <<PAGE_SHIFT ; - mem->bus.base =drm_get_resource_start (dev,1 ); + man->bus.base =pci_resource_start (dev->pdev,1 ); mem->bus.is_iomem = true;break ;default :
drivers/gpu/drm/nouveau/nouveau_channel.c +2 -1
@@ -62,7 +62,8 @@ nouveau_channel_pushbuf_ctxdma_init(struct nouveau_channel *chan)* VRAM. */ ret =nouveau_gpuobj_dma_new (chan,NV_CLASS_DMA_IN_MEMORY , -drm_get_resource_start (dev,1 ), +pci_resource_start (dev->pdev, +1 ), dev_priv->fb_available_size,NV_DMA_ACCESS_RO ,NV_DMA_TARGET_PCI , &pushbuf);
drivers/gpu/drm/nouveau/nouveau_mem.c +9 -7
@@ -471,8 +471,9 @@ void nouveau_mem_close(struct drm_device *dev) }if (dev_priv->fb_mtrr) { -drm_mtrr_del (dev_priv->fb_mtrr,drm_get_resource_start (dev,1 ), -drm_get_resource_len (dev,1 ),DRM_MTRR_WC ); +drm_mtrr_del (dev_priv->fb_mtrr, +pci_resource_start (dev->pdev,1 ), +pci_resource_len (dev->pdev,1 ),DRM_MTRR_WC ); dev_priv->fb_mtrr =0 ; } }
@@ -632,7 +633,7 @@ nouveau_mem_init(struct drm_device *dev)struct ttm_bo_device *bdev = &dev_priv->ttm.bdev;int ret, dma_bits =32 ; - dev_priv->fb_phys =drm_get_resource_start (dev,1 ); + dev_priv->fb_phys =pci_resource_start (dev->pdev,1 ); dev_priv->gart_info.type =NOUVEAU_GART_NONE ; if (dev_priv->card_type >= NV_50 &&
@@ -664,8 +665,9 @@ nouveau_mem_init(struct drm_device *dev) dev_priv->fb_available_size = dev_priv->vram_size; dev_priv->fb_mappable_pages = dev_priv->fb_available_size; -if (dev_priv->fb_mappable_pages >drm_get_resource_len (dev,1 )) - dev_priv->fb_mappable_pages =drm_get_resource_len (dev,1 ); +if (dev_priv->fb_mappable_pages >pci_resource_len (dev->pdev,1 )) + dev_priv->fb_mappable_pages = +pci_resource_len (dev->pdev,1 ); dev_priv->fb_mappable_pages >>=PAGE_SHIFT ;/* remove reserved space at end of vram from available amount */
@@ -717,8 +719,8 @@ nouveau_mem_init(struct drm_device *dev)return ret; } - dev_priv->fb_mtrr =drm_mtrr_add (drm_get_resource_start (dev,1 ), -drm_get_resource_len (dev,1 ), + dev_priv->fb_mtrr =drm_mtrr_add (pci_resource_start (dev->pdev,1 ), +pci_resource_len (dev->pdev,1 ),DRM_MTRR_WC );return 0 ;
drivers/gpu/drm/nouveau/nv20_graph.c +2 -2
@@ -616,7 +616,7 @@ nv20_graph_init(struct drm_device *dev)nv_wr32 (dev,NV10_PGRAPH_SURFACE , tmp);/* begin RAM config */ - vramsz =drm_get_resource_len (dev,0 ) -1 ; + vramsz =pci_resource_len (dev->pdev,0 ) -1 ;nv_wr32 (dev,0x4009A4 ,nv_rd32 (dev,NV04_PFB_CFG0 ));nv_wr32 (dev,0x4009A8 ,nv_rd32 (dev,NV04_PFB_CFG1 ));nv_wr32 (dev,NV10_PGRAPH_RDI_INDEX ,0x00EA0000 );
@@ -717,7 +717,7 @@ nv30_graph_init(struct drm_device *dev)nv_wr32 (dev,0x0040075c ,0x00000001 );/* begin RAM config */ -/* vramsz = drm_get_resource_len(dev, 0) - 1; */ +/* vramsz = pci_resource_len(dev->pdev, 0) - 1; */ nv_wr32 (dev,0x4009A4 ,nv_rd32 (dev,NV04_PFB_CFG0 ));nv_wr32 (dev,0x4009A8 ,nv_rd32 (dev,NV04_PFB_CFG1 ));if (dev_priv->chipset !=0x34 ) {
drivers/gpu/drm/nouveau/nv40_graph.c +1 -1
@@ -367,7 +367,7 @@ nv40_graph_init(struct drm_device *dev)nv40_graph_set_region_tiling (dev, i,0 ,0 ,0 );/* begin RAM config */ - vramsz =drm_get_resource_len (dev,0 ) -1 ; + vramsz =pci_resource_len (dev->pdev,0 ) -1 ;switch (dev_priv->chipset) {case 0x40 :nv_wr32 (dev,0x4009A4 ,nv_rd32 (dev,NV04_PFB_CFG0 ));
drivers/gpu/drm/nouveau/nv50_instmem.c +2 -1
@@ -241,7 +241,8 @@ nv50_instmem_init(struct drm_device *dev)return ret;BAR0_WI32 (priv->fb_bar->gpuobj,0x00 ,0x7fc00000 );BAR0_WI32 (priv->fb_bar->gpuobj,0x04 ,0x40000000 + -drm_get_resource_len (dev,1 ) -1 ); +pci_resource_len (dev->pmem, +1 ) -1 );BAR0_WI32 (priv->fb_bar->gpuobj,0x08 ,0x40000000 );BAR0_WI32 (priv->fb_bar->gpuobj,0x0c ,0x00000000 );BAR0_WI32 (priv->fb_bar->gpuobj,0x10 ,0x00000000 );
drivers/gpu/drm/radeon/evergreen.c +2 -2
@@ -1300,8 +1300,8 @@ int evergreen_mc_init(struct radeon_device *rdev) } rdev->mc.vram_width = numchan * chansize;/* Could aper size report 0 ? */ - rdev->mc.aper_base =drm_get_resource_start (rdev->ddev,0 ); - rdev->mc.aper_size =drm_get_resource_len (rdev->ddev,0 ); + rdev->mc.aper_base =pci_resource_start (rdev->pdev,0 ); + rdev->mc.aper_size =pci_resource_len (rdev->pdev,0 );/* Setup GPU memory space */ /* size in MB on evergreen */ rdev->mc.mc_vram_size =RREG32 (CONFIG_MEMSIZE ) *1024 *1024 ;
drivers/gpu/drm/radeon/r100.c +2 -2
@@ -2284,8 +2284,8 @@ void r100_vram_init_sizes(struct radeon_device *rdev)u64 config_aper_size;/* work out accessible VRAM */ - rdev->mc.aper_base =drm_get_resource_start (rdev->ddev,0 ); - rdev->mc.aper_size =drm_get_resource_len (rdev->ddev,0 ); + rdev->mc.aper_base =pci_resource_start (rdev->pdev,0 ); + rdev->mc.aper_size =pci_resource_len (rdev->pdev,0 ); rdev->mc.visible_vram_size =r100_get_accessible_vram (rdev);/* FIXME we don't use the second aperture yet when we could use it */ if (rdev->mc.visible_vram_size > rdev->mc.aper_size)
drivers/gpu/drm/radeon/r600.c +2 -2
@@ -1118,8 +1118,8 @@ int r600_mc_init(struct radeon_device *rdev) } rdev->mc.vram_width = numchan * chansize;/* Could aper size report 0 ? */ - rdev->mc.aper_base =drm_get_resource_start (rdev->ddev,0 ); - rdev->mc.aper_size =drm_get_resource_len (rdev->ddev,0 ); + rdev->mc.aper_base =pci_resource_start (rdev->pdev,0 ); + rdev->mc.aper_size =pci_resource_len (rdev->pdev,0 );/* Setup GPU memory space */ rdev->mc.mc_vram_size =RREG32 (CONFIG_MEMSIZE ); rdev->mc.real_vram_size =RREG32 (CONFIG_MEMSIZE );
drivers/gpu/drm/radeon/radeon_bios.c +1 -1
@@ -49,7 +49,7 @@ static bool igp_read_bios_from_vram(struct radeon_device *rdev)resource_size_t size =256 *1024 ;/* ??? */ rdev->bios =NULL ; - vram_base =drm_get_resource_start (rdev->ddev,0 ); + vram_base =pci_resource_start (rdev->pdev,0 ); bios =ioremap (vram_base, size);if (!bios) {return false;
drivers/gpu/drm/radeon/radeon_cp.c +4 -4
@@ -2120,8 +2120,8 @@ int radeon_driver_load(struct drm_device *dev, unsigned long flags)else dev_priv->flags |=RADEON_IS_PCI ; - ret =drm_addmap (dev,drm_get_resource_start (dev,2 ), -drm_get_resource_len (dev,2 ), _DRM_REGISTERS, + ret =drm_addmap (dev,pci_resource_start (dev->pdev,2 ), +pci_resource_len (dev->pdev,2 ), _DRM_REGISTERS, _DRM_READ_ONLY | _DRM_DRIVER, &dev_priv->mmio);if (ret !=0 )return ret;
@@ -2194,9 +2194,9 @@ int radeon_driver_firstopen(struct drm_device *dev) dev_priv->gart_info.table_size =RADEON_PCIGART_TABLE_SIZE ; - dev_priv->fb_aper_offset =drm_get_resource_start (dev,0 ); + dev_priv->fb_aper_offset =pci_resource_start (dev->pdev,0 ); ret =drm_addmap (dev, dev_priv->fb_aper_offset, -drm_get_resource_len (dev,0 ), _DRM_FRAME_BUFFER, +pci_resource_len (dev->pdev,0 ), _DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING, &map);if (ret !=0 )return ret;
drivers/gpu/drm/radeon/radeon_device.c +2 -2
@@ -648,8 +648,8 @@ int radeon_device_init(struct radeon_device *rdev,/* Registers mapping */ /* TODO: block userspace mapping of io register */ - rdev->rmmio_base =drm_get_resource_start (rdev->ddev,2 ); - rdev->rmmio_size =drm_get_resource_len (rdev->ddev,2 ); + rdev->rmmio_base =pci_resource_start (rdev->pdev,2 ); + rdev->rmmio_size =pci_resource_len (rdev->pdev,2 ); rdev->rmmio =ioremap (rdev->rmmio_base, rdev->rmmio_size);if (rdev->rmmio ==NULL ) {return -ENOMEM ;
drivers/gpu/drm/radeon/rs600.c +2 -2
@@ -685,8 +685,8 @@ void rs600_mc_init(struct radeon_device *rdev) {u64 base; - rdev->mc.aper_base =drm_get_resource_start (rdev->ddev,0 ); - rdev->mc.aper_size =drm_get_resource_len (rdev->ddev,0 ); + rdev->mc.aper_base =pci_resource_start (rdev->pdev,0 ); + rdev->mc.aper_size =pci_resource_len (rdev->pdev,0 ); rdev->mc.vram_is_ddr = true; rdev->mc.vram_width =128 ; rdev->mc.real_vram_size =RREG32 (RADEON_CONFIG_MEMSIZE );
drivers/gpu/drm/radeon/rs690.c +2 -2
@@ -151,8 +151,8 @@ void rs690_mc_init(struct radeon_device *rdev) rdev->mc.vram_width =128 ; rdev->mc.real_vram_size =RREG32 (RADEON_CONFIG_MEMSIZE ); rdev->mc.mc_vram_size = rdev->mc.real_vram_size; - rdev->mc.aper_base =drm_get_resource_start (rdev->ddev,0 ); - rdev->mc.aper_size =drm_get_resource_len (rdev->ddev,0 ); + rdev->mc.aper_base =pci_resource_start (rdev->pdev,0 ); + rdev->mc.aper_size =pci_resource_len (rdev->pdev,0 ); rdev->mc.visible_vram_size = rdev->mc.aper_size; base =RREG32_MC (R_000100_MCCFG_FB_LOCATION ); base =G_000100_MC_FB_START (base) <<16 ;
drivers/gpu/drm/radeon/rv770.c +2 -2
@@ -908,8 +908,8 @@ int rv770_mc_init(struct radeon_device *rdev) } rdev->mc.vram_width = numchan * chansize;/* Could aper size report 0 ? */ - rdev->mc.aper_base =drm_get_resource_start (rdev->ddev,0 ); - rdev->mc.aper_size =drm_get_resource_len (rdev->ddev,0 ); + rdev->mc.aper_base =pci_resource_start (rdev->pdev,0 ); + rdev->mc.aper_size =pci_resource_len (rdev->pdev,0 );/* Setup GPU memory space */ rdev->mc.mc_vram_size =RREG32 (CONFIG_MEMSIZE ); rdev->mc.real_vram_size =RREG32 (CONFIG_MEMSIZE );
drivers/gpu/drm/savage/savage_bci.c +13 -11
@@ -573,13 +573,13 @@ int savage_driver_firstopen(struct drm_device *dev) dev_priv->mtrr[2 ].handle =-1 ;if (S3_SAVAGE3D_SERIES (dev_priv->chipset)) { fb_rsrc =0 ; - fb_base =drm_get_resource_start (dev,0 ); + fb_base =pci_resource_start (dev->pdev,0 ); fb_size =SAVAGE_FB_SIZE_S3 ; mmio_base = fb_base +SAVAGE_FB_SIZE_S3 ; aper_rsrc =0 ; aperture_base = fb_base +SAVAGE_APERTURE_OFFSET ;/* this should always be true */ -if (drm_get_resource_len (dev,0 ) ==0x08000000 ) { +if (pci_resource_len (dev->pdev,0 ) ==0x08000000 ) {/* Don't make MMIO write-cobining! We need 3 * MTRRs. */ dev_priv->mtrr[0 ].base = fb_base;
@@ -599,18 +599,19 @@ int savage_driver_firstopen(struct drm_device *dev) dev_priv->mtrr[2].size, DRM_MTRR_WC); }else {DRM_ERROR ("strange pci_resource_len %08llx\n" , - (unsigned long long )drm_get_resource_len (dev,0 )); + (unsigned long long ) +pci_resource_len (dev->pdev,0 )); } }else if (dev_priv->chipset !=S3_SUPERSAVAGE && dev_priv->chipset !=S3_SAVAGE2000 ) { - mmio_base =drm_get_resource_start (dev,0 ); + mmio_base =pci_resource_start (dev->pdev,0 ); fb_rsrc =1 ; - fb_base =drm_get_resource_start (dev,1 ); + fb_base =pci_resource_start (dev->pdev,1 ); fb_size =SAVAGE_FB_SIZE_S4 ; aper_rsrc =1 ; aperture_base = fb_base +SAVAGE_APERTURE_OFFSET ;/* this should always be true */ -if (drm_get_resource_len (dev,1 ) ==0x08000000 ) { +if (pci_resource_len (dev->pdev,1 ) ==0x08000000 ) {/* Can use one MTRR to cover both fb and * aperture. */ dev_priv->mtrr[0 ].base = fb_base;
@@ -620,15 +621,16 @@ int savage_driver_firstopen(struct drm_device *dev) dev_priv->mtrr[0].size, DRM_MTRR_WC); }else {DRM_ERROR ("strange pci_resource_len %08llx\n" , - (unsigned long long )drm_get_resource_len (dev,1 )); + (unsigned long long ) +pci_resource_len (dev->pdev,1 )); } }else { - mmio_base =drm_get_resource_start (dev,0 ); + mmio_base =pci_resource_start (dev->pdev,0 ); fb_rsrc =1 ; - fb_base =drm_get_resource_start (dev,1 ); - fb_size =drm_get_resource_len (dev,1 ); + fb_base =pci_resource_start (dev->pdev,1 ); + fb_size =pci_resource_len (dev->pdev,1 ); aper_rsrc =2 ; - aperture_base =drm_get_resource_start (dev,2 ); + aperture_base =pci_resource_start (dev->pdev,2 );/* Automatic MTRR setup will do the right thing. */ }
include/drm/drmP.h +0 -4
@@ -1273,10 +1273,6 @@ extern int drm_freebufs(struct drm_device *dev, void *data,extern int drm_mapbufs (struct drm_device *dev,void *data,struct drm_file *file_priv);extern int drm_order (unsigned long size); -extern resource_size_t drm_get_resource_start (struct drm_device *dev, -unsigned int resource); -extern resource_size_t drm_get_resource_len (struct drm_device *dev, -unsigned int resource);/* DMA support (drm_dma.h) */ extern int drm_dma_setup (struct drm_device *dev);
Signature · 1 line
1.7.0.1
Re: [PATCH 1/4] drm: Remove drm_resource wrappers
Seems like a good simplification.
PATCH 2/4 drm: Add support for platform devices to register as DRM devices
In reply to Jordan CrouseFrom: Jordan Crouse <[email protected]>
Allow platform devices without PCI resources to be DRM devices.
--- drivers/gpu/drm/Kconfig | 4 +- drivers/gpu/drm/Makefile | 2 +- drivers/gpu/drm/drm_drv.c | 37 +------- drivers/gpu/drm/drm_edid.c | 4 +- drivers/gpu/drm/drm_info.c | 23 ++++-- drivers/gpu/drm/drm_ioctl.c | 77 ++++++++++++------ drivers/gpu/drm/drm_irq.c | 15 ++-- drivers/gpu/drm/drm_pci.c | 143 +++++++++++++++++++++++++++++++++ drivers/gpu/drm/drm_platform.c | 122 ++++++++++++++++++++++++++++ drivers/gpu/drm/drm_stub.c | 89 +-------------------- drivers/gpu/drm/drm_sysfs.c | 3 +- drivers/gpu/drm/i915/i915_dma.c | 1 + drivers/gpu/drm/i915/i915_drv.c | 2 +- drivers/gpu/drm/nouveau/nouveau_drv.c | 2 +- drivers/gpu/drm/radeon/radeon_drv.c | 2 +- drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 2 +- include/drm/drmP.h | 52 ++++++++++-- 17 files changed, 405 insertions(+), 175 deletions(-) create mode 100644 drivers/gpu/drm/drm_platform.c
drivers/gpu/drm/Kconfig +2 -2
@@ -6,7 +6,7 @@ # menuconfig DRM tristate "Direct Rendering Manager (XFree86 4.1.0 and higher DRI support)" - depends on (AGP || AGP=n) && PCI && !EMULATED_CMPXCHG && MMU + depends on (AGP || AGP=n) && !EMULATED_CMPXCHG && MMU select I2C select I2C_ALGOBIT select SLOW_WORK
@@ -17,7 +17,7 @@ menuconfig DRM These modules provide support for synchronization, security, and DMA transfers. Please see <http://dri.sourceforge.net/> for more details. You should also select and configure AGP - (/dev/agpgart) support. + (/dev/agpgart) support if it is available for your platform. config DRM_KMS_HELPER tristate
drivers/gpu/drm/Makefile +1 -1
@@ -9,7 +9,7 @@ drm-y := drm_auth.o drm_buffer.o drm_bufs.o drm_cache.o \ drm_drv.o drm_fops.o drm_gem.o drm_ioctl.o drm_irq.o \ drm_lock.o drm_memory.o drm_proc.o drm_stub.o drm_vm.o \ drm_agpsupport.o drm_scatter.o ati_pcigart.o drm_pci.o \ - drm_sysfs.o drm_hashtab.o drm_sman.o drm_mm.o \ + drm_platform.o drm_sysfs.o drm_hashtab.o drm_sman.o drm_mm.o \ drm_crtc.o drm_modes.o drm_edid.o \ drm_info.o drm_debugfs.o drm_encoder_slave.o
drivers/gpu/drm/drm_drv.c +5 -32
@@ -243,47 +243,20 @@ int drm_lastclose(struct drm_device * dev)* * Initializes an array of drm_device structures, and attempts to * initialize all available devices, using consecutive minors, registering the -* stubs and initializing the AGP device. +* stubs and initializing the device. * * Expands the \c DRIVER_PREINIT and \c DRIVER_POST_INIT macros before and * after the initialization for driver customization. */ int drm_init (struct drm_driver *driver) { -struct pci_dev *pdev =NULL ; -const struct pci_device_id *pid; -int i; -DRM_DEBUG ("\n" ); -INIT_LIST_HEAD (&driver->device_list); -if (driver->driver_features &DRIVER_MODESET ) -return pci_register_driver (&driver->pci_driver); - -/* If not using KMS, fall back to stealth mode manual scanning. */ -for (i =0 ; driver->pci_driver.id_table[i].vendor !=0 ; i++) { - pid = &driver->pci_driver.id_table[i]; - -/* Loop around setting up a DRM device for each PCI device -* matching our ID and device class. If we had the internal -* function that pci_get_subsys and pci_get_class used, we'd -* be able to just pass pid in instead of doing a two-stage -* thing. -*/ - pdev =NULL ; -while ((pdev = -pci_get_subsys (pid->vendor, pid->device, pid->subvendor, - pid->subdevice, pdev)) !=NULL ) { -if ((pdev->class & pid->class_mask) != pid->class) -continue ; - -/* stealth mode requires a manual probe */ -pci_dev_get (pdev); -drm_get_dev (pdev, pid, driver); - } - } -return 0 ; +if (driver->driver_features &DRIVER_USE_PLATFORM_DEVICE ) +return drm_platform_init (driver); +else +return drm_pci_init (driver); }EXPORT_SYMBOL (drm_init);
drivers/gpu/drm/drm_edid.c +2 -2
@@ -282,7 +282,7 @@ drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)return block; carp: -dev_warn (&connector->dev->pdev->dev,"%s: EDID block %d invalid.\n" , +dev_warn (&connector->dev->dev,"%s: EDID block %d invalid.\n" ,drm_get_connector_name (connector), j); out:
@@ -1626,7 +1626,7 @@ int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)return 0 ; }if (!drm_edid_is_valid (edid)) { -dev_warn (&connector->dev->pdev->dev,"%s: EDID invalid.\n" , +dev_warn (&connector->dev->dev,"%s: EDID invalid.\n" ,drm_get_connector_name (connector));return 0 ; }
drivers/gpu/drm/drm_info.c +17 -6
@@ -51,13 +51,24 @@ int drm_name_info(struct seq_file *m, void *data)if (!master)return 0 ; -if (master->unique) { -seq_printf (m,"%s %s %s\n" , - dev->driver->pci_driver.name, -pci_name (dev->pdev), master->unique); +if (drm_core_check_feature (dev,DRIVER_USE_PLATFORM_DEVICE )) { +if (master->unique) { +seq_printf (m,"%s %s %s\n" , + dev->driver->platform_device->name, +dev_name (dev->dev), master->unique); + }else { +seq_printf (m,"%s\n" , + dev->driver->platform_device->name); + } }else { -seq_printf (m,"%s %s\n" , dev->driver->pci_driver.name, -pci_name (dev->pdev)); +if (master->unique) { +seq_printf (m,"%s %s %s\n" , + dev->driver->pci_driver.name, +dev_name (dev->dev), master->unique); + }else { +seq_printf (m,"%s %s\n" , dev->driver->pci_driver.name, +dev_name (dev->dev)); + } }return 0 ;
drivers/gpu/drm/drm_ioctl.c +48 -23
80 lines not on this page · raw message
drivers/gpu/drm/drm_irq.c +9 -6
@@ -57,6 +57,9 @@ int drm_irq_by_busid(struct drm_device *dev, void *data, {struct drm_irq_busid *p = data; +if (drm_core_check_feature (dev,DRIVER_USE_PLATFORM_DEVICE )) +return -EINVAL ; +if (!drm_core_check_feature (dev,DRIVER_HAVE_IRQ ))return -EINVAL ;
@@ -211,7 +214,7 @@ int drm_irq_install(struct drm_device *dev)if (!drm_core_check_feature (dev,DRIVER_HAVE_IRQ ))return -EINVAL ; -if (dev->pdev->irq ==0 ) +if (drm_dev_to_irq (dev) ==0 )return -EINVAL ;mutex_lock (&dev->struct_mutex);
@@ -229,7 +232,7 @@ int drm_irq_install(struct drm_device *dev) dev->irq_enabled =1 ;mutex_unlock (&dev->struct_mutex); -DRM_DEBUG ("irq=%d\n" , dev->pdev->irq); +DRM_DEBUG ("irq=%d\n" ,drm_dev_to_irq (dev));/* Before installing handler */ dev->driver->irq_preinstall (dev);
@@ -302,14 +305,14 @@ int drm_irq_uninstall(struct drm_device * dev)if (!irq_enabled)return -EINVAL ; -DRM_DEBUG ("irq=%d\n" , dev->pdev->irq); +DRM_DEBUG ("irq=%d\n" ,drm_dev_to_irq (dev));if (!drm_core_check_feature (dev,DRIVER_MODESET ))vga_client_register (dev->pdev,NULL ,NULL ,NULL ); dev->driver->irq_uninstall (dev); -free_irq (dev->pdev->irq, dev); +free_irq (drm_dev_to_irq (dev), dev);return 0 ; }
@@ -341,7 +344,7 @@ int drm_control(struct drm_device *dev, void *data,if (drm_core_check_feature (dev,DRIVER_MODESET ))return 0 ;if (dev->if_version <DRM_IF_VERSION (1 ,2 ) && - ctl->irq != dev->pdev->irq) + ctl->irq !=drm_dev_to_irq (dev))return -EINVAL ;return drm_irq_install (dev);case DRM_UNINST_HANDLER :
@@ -651,7 +654,7 @@ int drm_wait_vblank(struct drm_device *dev, void *data,int ret =0 ;unsigned int flags, seq, crtc; -if ((!dev->pdev->irq) || (!dev->irq_enabled)) +if ((!drm_dev_to_irq (dev)) || (!dev->irq_enabled))return -EINVAL ;if (vblwait->request.type & _DRM_VBLANK_SIGNAL)
drivers/gpu/drm/drm_pci.c +143 -0
147 lines not on this page · raw message
drivers/gpu/drm/drm_platform.c new file +122 -0
122 lines not on this page · raw message
drivers/gpu/drm/drm_stub.c +2 -87
113 lines not on this page · raw message
drivers/gpu/drm/drm_sysfs.c +2 -1
@@ -489,7 +489,8 @@ int drm_sysfs_device_add(struct drm_minor *minor)int err;char *minor_str; - minor->kdev.parent = &minor->dev->pdev->dev; + minor->kdev.parent = &minor->dev->dev; + minor->kdev.class = drm_class; minor->kdev.release = drm_sysfs_device_release; minor->kdev.devt = minor->device;
drivers/gpu/drm/i915/i915_dma.c +1 -0
@@ -34,6 +34,7 @@#include "i915_drm.h" #include "i915_drv.h" #include "i915_trace.h" +#include <linux/pci.h> #include <linux/vgaarb.h> #include <linux/acpi.h> #include <linux/pnp.h>
drivers/gpu/drm/i915/i915_drv.c +1 -1
@@ -435,7 +435,7 @@ int i965_reset(struct drm_device *dev, u8 flags)static int __devinit i915_pci_probe (struct pci_dev *pdev,const struct pci_device_id *ent) { -return drm_get_dev (pdev, ent, &driver); +return drm_get_pci_dev (pdev, ent, &driver); } static void
drivers/gpu/drm/nouveau/nouveau_drv.c +1 -1
@@ -132,7 +132,7 @@ static struct drm_driver driver;static int __devinit nouveau_pci_probe (struct pci_dev *pdev,const struct pci_device_id *ent) { -return drm_get_dev (pdev, ent, &driver); +return drm_get_pci_dev (pdev, ent, &driver); } static void
drivers/gpu/drm/radeon/radeon_drv.c +1 -1
@@ -237,7 +237,7 @@ static struct drm_driver kms_driver;static int __devinit radeon_pci_probe (struct pci_dev *pdev,const struct pci_device_id *ent) { -return drm_get_dev (pdev, ent, &kms_driver); +return drm_get_pci_dev (pdev, ent, &kms_driver); } static void
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c +1 -1
@@ -758,7 +758,7 @@ static struct drm_driver driver = {static int vmw_probe (struct pci_dev *pdev,const struct pci_device_id *ent) { -return drm_get_dev (pdev, ent, &driver); +return drm_get_pci_dev (pdev, ent, &driver); }static int __init vmwgfx_init (void )
include/drm/drmP.h +44 -8
124 lines not on this page · raw message
Signature · 1 line
1.7.0.1
PATCH 3/4 drm: Add __arm defines to DRM
In reply to Jordan CrouseFrom: Jordan Crouse <[email protected]>
Add __arm defines to specify behavior specific for an ARM processor.
--- drivers/gpu/drm/drm_bufs.c | 2 +- drivers/gpu/drm/drm_vm.c | 14 +++++++++++++- 2 files changed, 14 insertions(+), 2 deletions(-)
drivers/gpu/drm/drm_bufs.c +1 -1
@@ -176,7 +176,7 @@ static int drm_addmap_core(struct drm_device * dev, resource_size_t offset,switch (map->type) {case _DRM_REGISTERS:case _DRM_FRAME_BUFFER: -#if !defined(__sparc__) && !defined(__alpha__) && !defined(__ia64__) && !defined(__powerpc64__) && !defined(__x86_64__) +#if !defined(__sparc__) && !defined(__alpha__) && !defined(__ia64__) && !defined(__powerpc64__) && !defined(__x86_64__) && !defined(__arm__)if (map->offset + (map->size-1 ) < map->offset || map->offset <virt_to_phys (high_memory)) {kfree (map);
drivers/gpu/drm/drm_vm.c +13 -1
@@ -61,7 +61,7 @@ static pgprot_t drm_io_prot(uint32_t map_type, struct vm_area_struct *vma) tmp =pgprot_writecombine (tmp); else tmp =pgprot_noncached (tmp); -#elif defined(__sparc__) +#elif defined(__sparc__) || defined(__arm__) tmp =pgprot_noncached (tmp);#endif return tmp;
@@ -601,6 +601,7 @@ int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma) }switch (map->type) { +#if !defined(__arm__)case _DRM_AGP:if (drm_core_has_AGP (dev) && dev->agp->cant_use_aperture) {/*
@@ -615,20 +616,31 @@ int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma)break ; }/* fall through to _DRM_FRAME_BUFFER... */ +#endif case _DRM_FRAME_BUFFER:case _DRM_REGISTERS: offset = dev->driver->get_reg_ofs (dev); vma->vm_flags |=VM_IO ;/* not in core dump */ vma->vm_page_prot =drm_io_prot (map->type, vma); +#if !defined(__arm__)if (io_remap_pfn_range (vma, vma->vm_start, (map->offset + offset) >>PAGE_SHIFT , vma->vm_end - vma->vm_start, vma->vm_page_prot))return -EAGAIN ; +#else +if (remap_pfn_range (vma, vma->vm_start, + (map->offset + offset) >>PAGE_SHIFT , + vma->vm_end - vma->vm_start, + vma->vm_page_prot)) +return -EAGAIN ; +#endif +DRM_DEBUG (" Type = %d; start = 0x%lx, end = 0x%lx," " offset = 0x%llx\n" , map->type, vma->vm_start, vma->vm_end, (unsigned long long )(map->offset + offset)); + vma->vm_ops = &drm_vm_ops;break ;case _DRM_CONSISTENT:
Signature · 1 line
1.7.0.1
PATCH 4/4 drm: Make sure the DRM offset matches the CPU
In reply to Jordan CrouseFrom: Jordan Crouse <[email protected]>
The pgoff option in mmap() is defined as an unsigned long so the offset generated by DRM needs to fit into BITS_PER_LONG for the CPU in question.
--- drivers/gpu/drm/drm_gem.c | 10 ++++++++++ 1 files changed, 10 insertions(+), 0 deletions(-)
drivers/gpu/drm/drm_gem.c +10 -0
@@ -68,8 +68,18 @@* We make up offsets for buffer objects so we can recognize them at * mmap time. */ + +/* pgoff in mmap is an unsigned long, so we need to make sure that +* the faked up offset will fit +*/ + +#if BITS_PER_LONG ==64 #define DRM_FILE_PAGE_OFFSET_START ((0xFFFFFFFFUL >> PAGE_SHIFT) + 1)#define DRM_FILE_PAGE_OFFSET_SIZE ((0xFFFFFFFFUL >> PAGE_SHIFT) * 16) +#else +#define DRM_FILE_PAGE_OFFSET_START ((0xFFFFFFFUL >> PAGE_SHIFT) + 1) +#define DRM_FILE_PAGE_OFFSET_SIZE ((0xFFFFFFFUL >> PAGE_SHIFT) * 16) +#endif /** * Initialize the GEM device fields
Signature · 1 line
1.7.0.1