u-boot next: a generic approach for nios2 arch

These patches are for next u-boot release. I udnerstand the merge window is not opened yet. But there are quite a few things to review, so please allow me submit them early.

This is a generic approach to port u-boot for nios2 boards. We try to ease the porting of a new nios2 design. We will rely on tools generated header file which contains the devices base address, instead of entering the hex numbers by hand.

Thomas Chou (28):
nios2: add nios2-generic board
cfi flash: add status polling method for amd flash
serial: move altera uart driver to drivers/serial
serial: move altera jtaguart driver to drivers/serial
serial: move yanu driver to drivers/serial
spi: add altera spi controller support
net: add opencore 10/100 ethernet mac support
net: add altera triple speeds ethernet mac support
nios2: change asm-nios2/io.h to compatible with nios2 linux
nios2: add asm-nios2/errno.h
nios2: add local_irq_enable/disable to asm-nios2/system.h
nios2: use bitops from linux-2.6 asm-generic
nios2: fix __fswab64 link error with asm-nios2/byteorder.h
nios2: add dma_alloc_coherent with asm-nios2/dma-mapping.h
nios2: add gpio support with asm-nios2/gpio.h
nios2: move timer handler from interrupt.c to timer.c
nios2: define text_base in start.S for linker script
nios2: pass command line and initrd to linux
nios2: board init for eth, no flash, nand and mmc
nios2: fix writel in board/altera/common/epled.c
nios2: add cf ide init and reset handler
nios2: add gpio led driver
nios2: convert ep1c20 board to use cfi flash and spi flash
nios2: convert ep1s10 board to use cfi flash
nios2: convert ep1s40 board to use cfi flash
nios2: convert pci5441 board to use cfi flash
nios2: convert pk1c20 board to use cfi flash and spi flash
nios2: add struct stat support in linux/stat.h

 MAINTAINERS                                |    1 +
 MAKEALL                                    |    1 +
 Makefile                                   |    3 +
 board/altera/common/cfide.c                |   79 +++
 board/altera/common/epled.c                |   12 +-
 board/altera/common/gpioled.c              |   31 +
 board/altera/ep1c20/Makefile               |    2 +-
 board/altera/ep1c20/config.mk              |    2 +-
 board/altera/ep1c20/u-boot.lds             |    1 +
 board/altera/ep1s10/Makefile               |    2 +-
 board/altera/ep1s10/config.mk              |    2 +-
 board/altera/ep1s10/u-boot.lds             |    1 +
 board/altera/ep1s40/Makefile               |    2 +-
 board/altera/ep1s40/config.mk              |    2 +-
 board/altera/ep1s40/u-boot.lds             |    1 +
 board/altera/nios2-generic/Makefile        |   57 ++
 board/altera/nios2-generic/config.mk       |   32 +
 board/altera/nios2-generic/custom_fpga.h   |  757 ++++++++++++++++++++++
 board/altera/nios2-generic/nios2-generic.c |   67 ++
 board/altera/nios2-generic/u-boot.lds      |  136 ++++
 board/psyent/pci5441/Makefile              |    2 +-
 board/psyent/pci5441/config.mk             |    2 +-
 board/psyent/pci5441/u-boot.lds            |    1 +
 board/psyent/pk1c20/Makefile               |    2 +-
 board/psyent/pk1c20/config.mk              |    2 +-
 board/psyent/pk1c20/led.c                  |   12 +-
 board/psyent/pk1c20/u-boot.lds             |    1 +
 cpu/nios2/Makefile                         |    2 +-
 cpu/nios2/interrupts.c                     |   64 +--
 cpu/nios2/start.S                          |    6 +
 cpu/nios2/timer.c                          |   98 +++
 drivers/mtd/cfi_flash.c                    |   94 +++-
 drivers/net/Makefile                       |    2 +
 drivers/net/altera_tse.c                   |  969 ++++++++++++++++++++++++++++
 drivers/net/altera_tse.h                   |  500 ++++++++++++++
 drivers/net/ethoc.c                        |  536 +++++++++++++++
 drivers/serial/Makefile                    |    3 +
 drivers/serial/altera_jtaguart.c           |  107 +++
 drivers/serial/altera_uart.c               |  116 ++++
 drivers/serial/yanu.c                      |  187 ++++++
 drivers/serial/yanu.h                      |  120 ++++
 drivers/spi/Makefile                       |    1 +
 drivers/spi/altera_spi.c                   |  103 +++
 include/asm-nios2/bitops.h                 |   14 +-
 include/asm-nios2/bitops/atomic.h          |  189 ++++++
 include/asm-nios2/bitops/ffs.h             |   41 ++
 include/asm-nios2/bitops/non-atomic.h      |  108 +++
 include/asm-nios2/byteorder.h              |    5 +
 include/asm-nios2/dma-mapping.h            |   14 +
 include/asm-nios2/errno.h                  |    1 +
 include/asm-nios2/gpio.h                   |   72 ++
 include/asm-nios2/io.h                     |   59 +-
 include/asm-nios2/system.h                 |   33 +
 include/configs/EP1C20.h                   |   60 ++-
 include/configs/EP1S10.h                   |   58 +-
 include/configs/EP1S40.h                   |   54 +-
 include/configs/PCI5441.h                  |   44 +-
 include/configs/PK1C20.h                   |   68 ++-
 include/configs/nios2-generic.h            |  360 +++++++++++
 include/linux/stat.h                       |    2 +-
 lib_nios2/board.c                          |   33 +
 lib_nios2/bootm.c                          |   19 +-
 62 files changed, 5110 insertions(+), 245 deletions(-)
 create mode 100644 board/altera/common/cfide.c
 create mode 100644 board/altera/common/gpioled.c
 create mode 100644 board/altera/nios2-generic/Makefile
 create mode 100644 board/altera/nios2-generic/config.mk
 create mode 100644 board/altera/nios2-generic/custom_fpga.h
 create mode 100644 board/altera/nios2-generic/nios2-generic.c
 create mode 100644 board/altera/nios2-generic/u-boot.lds
 create mode 100644 cpu/nios2/timer.c
 create mode 100644 drivers/net/altera_tse.c
 create mode 100644 drivers/net/altera_tse.h
 create mode 100644 drivers/net/ethoc.c
 create mode 100644 drivers/serial/altera_jtaguart.c
 create mode 100644 drivers/serial/altera_uart.c
 create mode 100644 drivers/serial/yanu.c
 create mode 100644 drivers/serial/yanu.h
 create mode 100644 drivers/spi/altera_spi.c
 create mode 100644 include/asm-nios2/bitops/atomic.h
 create mode 100644 include/asm-nios2/bitops/ffs.h
 create mode 100644 include/asm-nios2/bitops/non-atomic.h
 create mode 100644 include/asm-nios2/dma-mapping.h
 create mode 100644 include/asm-nios2/errno.h
 create mode 100644 include/asm-nios2/gpio.h
 create mode 100644 include/configs/nios2-generic.h

This is a generic approach to port u-boot for nios2 boards. It uses a new set of device drivers, such as the cfi flash, spi lash, nand flash and new ethernet drivers.

You may find the usage of this approach on the nios2 wiki,
http://nioswiki.com/DasUBoot

In order to better support MMU and NOMMU targets, we will use virtual addressing in the config file. All references to devices except for the main memory (sdram), should be mapped to uncached (bypass), IO region. While the main memory should use cached, kernel region.

For MMU,
the uncached, IO region is 0xe0000000-0xffffffff. #define IO_REGION_BASE 0xe0000000
the cached, kernel region is 0xc000000-0xdfffffff. #define KERNEL_REGION_BASE 0xc0000000

For NOMMU,
the uncached, IO region is 0x8000000-0xffffffff. #define IO_REGION_BASE 0x80000000
the cached, kernel region is 0x00000000-0x7fffffff. #define KERNEL_REGION_BASE 0x00000000

In stead of editing the hex number of base address, we will use the resource header file generated with tools.

An example SMC device def will become,
#define CONFIG_SMC91111_BASE (ENET_BASE | IO_REGION_BASE)
where the ENET_BASE will be defined in the generated file ../board/altera/nios2-generic/custom_fpga.h .

Then when you reassign the base address or turn on/off the MMU, you will only need to regenerate the header file.

---
 MAINTAINERS                                |    1 +
 MAKEALL                                    |    1 +
 Makefile                                   |    3 +
 board/altera/nios2-generic/Makefile        |   57 +++
 board/altera/nios2-generic/config.mk       |   32 ++
 board/altera/nios2-generic/custom_fpga.h   |  757 ++++++++++++++++++++++++++++
 board/altera/nios2-generic/nios2-generic.c |   67 +++
 board/altera/nios2-generic/u-boot.lds      |  136 +++++
 include/configs/nios2-generic.h            |  360 +++++++++++++
 9 files changed, 1414 insertions(+), 0 deletions(-)
 create mode 100644 board/altera/nios2-generic/Makefile
 create mode 100644 board/altera/nios2-generic/config.mk
 create mode 100644 board/altera/nios2-generic/custom_fpga.h
 create mode 100644 board/altera/nios2-generic/nios2-generic.c
 create mode 100644 board/altera/nios2-generic/u-boot.lds
 create mode 100644 include/configs/nios2-generic.h

index 80057ce..2e1976a 100644
@@ -851,6 +851,7 @@ Scott McNutt <[email protected]>
 	EP1C20		Nios-II
 	EP1S10		Nios-II
 	EP1S40		Nios-II
+	nios2-generic	Nios-II
 
 #########################################################################
 # MicroBlaze Systems:							#

index beacb5f..f27694e 100755
@@ -826,6 +826,7 @@ LIST_nios2="		\
 	EP1S40		\
 	PCI5441		\
 	PK1C20		\
+	nios2-generic	\
 "
 
 #########################################################################

index d801e25..7035169 100644
@@ -3549,6 +3549,9 @@ PK1C20_config : unconfig
 PCI5441_config : unconfig
 	@$(MKCONFIG)  PCI5441 nios2 nios2 pci5441 psyent
 
+nios2-generic_config : unconfig
+	@$(MKCONFIG) $(@:_config=) nios2 nios2 nios2-generic altera
+
 #========================================================================
 ## Microblaze
 #========================================================================

new file mode 100644
index 0000000..dd4577b
@@ -0,0 +1,32 @@
+#
+# (C) Copyright 2005, Psyent Corporation <www.psyent.com>
+# Scott McNutt <[email protected]>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+# This is not actually used for nios2 boards so do not change it
+#TEXT_BASE = do-not-use-me
+
+PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
+PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include
+
+ifeq ($(debug),1)
+PLATFORM_CPPFLAGS += -DDEBUG
+endif

1.6.6.1

This patch adds status polling method to offer an alternative to data toggle method for amd flash chips.

This patch is needed for nios2 cfi flash interface, where the bus controller performs 4 bytes read cycles for a single byte read instruction. The data toggle method can not detect chip busy status correctly. So we have to poll DQ7, which will be inverted when the chip is busy.

This feature is enabled with the config def,
CONFIG_SYS_CFI_FLASH_STATUS_POLL

---
 drivers/mtd/cfi_flash.c |   94 ++++++++++++++++++++++++++++++++++++++++++++++-
 1 files changed, 92 insertions(+), 2 deletions(-)

index fdba297..4baa9dc 100644
@@ -555,6 +555,50 @@ static int flash_status_check (flash_info_t * info, flash_sect_t sector,
 	return ERR_OK;
 }
 
+#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
+static int flash_status_poll(flash_info_t *info, cfiword_t cword, void *addr,
+			     ulong tout, char *prompt)
+{
+	ulong start;
+	int ready;
+
+#if CONFIG_SYS_HZ != 1000
+	tout *= CONFIG_SYS_HZ/1000;
+#endif
+
+	/* Wait for command completion */
+	start = get_timer(0);
+	while (1) {
+		switch (info->portwidth) {
+		case FLASH_CFI_8BIT:
+			ready = flash_read8(addr) == cword.c;
+			break;
+		case FLASH_CFI_16BIT:
+			ready = flash_read16(addr) == cword.w;
+			break;
+		case FLASH_CFI_32BIT:
+			ready = flash_read32(addr) == cword.l;
+			break;
+		case FLASH_CFI_64BIT:
+			ready = flash_read64(addr) == cword.ll;
+			break;
+		default:
+			ready = 0;
+			break;
+		}
+		if (ready)
+			break;
+		if (get_timer(start) > tout) {
+			printf("Flash %s timeout at address %lx data %lx\n",
+			       prompt, (ulong)addr, (ulong)flash_read8(addr));
+			return ERR_TIMOUT;
+		}
+		udelay(1);		/* also triggers watchdog */
+	}
+	return ERR_OK;
+}
+#endif
+
 /*-----------------------------------------------------------------------
  * Wait for XSR.7 to be set, if it times out print an error, otherwise
  * do a full status check.

@@ -749,6 +793,13 @@ static int flash_write_cfiword (flash_info_t * info, ulong dest,
 	if (!sect_found)
 		sect = find_sector (info, dest);
 
+#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
+	if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
+	    info->vendor == CFI_CMDSET_AMD_STANDARD)
+		return flash_status_poll(info, cword, dstaddr,
+					 info->write_tout, "write");
+	else
+#endif
 	return flash_full_status_check (info, sect, info->write_tout, "write");
 }
 

@@ -767,6 +818,7 @@ static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
 	uint offset = 0;
 	unsigned int shift;
 	uchar write_cmd;
+	cfiword_t cword;
 
 	switch (info->portwidth) {
 	case FLASH_CFI_8BIT:

@@ -911,9 +963,35 @@ static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
 		}
 
 		flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
+#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
+		switch (info->portwidth) {
+		case FLASH_CFI_8BIT:
+			cword.c = flash_read8(src - 1);
+			dst -= 1;
+			break;
+		case FLASH_CFI_16BIT:
+			cword.w = flash_read16(src - 2);
+			dst -= 2;
+			break;
+		case FLASH_CFI_32BIT:
+			cword.l = flash_read32(src - 4);
+			dst -= 4;
+			break;
+		case FLASH_CFI_64BIT:
+			cword.ll = flash_read64(src - 8);
+			dst -= 8;
+			break;
+		default:
+			retcode = ERR_INVAL;
+			goto out_unmap;
+		}
+		retcode = flash_status_poll(info, cword, dst,
+				info->buffer_write_tout, "buffer write");
+#else
 		retcode = flash_full_status_check (info, sector,
 						   info->buffer_write_tout,
 						   "buffer write");
+#endif
 		break;
 
 	default:

@@ -935,6 +1013,8 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
 	int rcode = 0;
 	int prot;
 	flash_sect_t sect;
+	cfiword_t cword = (cfiword_t) 0xffffffffffffffffULL;
+	ulong dest;
 
 	if (info->flash_id != FLASH_MAN_CFI) {
 		puts ("Can't erase unknown flash type - aborted\n");

@@ -998,6 +1078,17 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
 				break;
 			}
 
+#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
+			dest = (ulong)flash_map(info, sect, 0);
+			flash_unmap(info, sect, 0, (void *)dest);
+			if ((info->vendor == CFI_CMDSET_AMD_EXTENDED ||
+			     info->vendor == CFI_CMDSET_AMD_STANDARD) &&
+			    flash_status_poll(info, cword, (void *)dest,
+					      info->erase_blk_tout, "erase"))
+				rcode = 1;
+			else
+
+#endif
 			if (flash_full_status_check
 			    (info, sect, info->erase_blk_tout, "erase")) {
 				rcode = 1;

@@ -1980,8 +2071,7 @@ unsigned long flash_init (void)
 	}
 
 	/* Monitor protection ON by default */
-#if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
-	(!defined(CONFIG_MONITOR_IS_IN_RAM))
+#if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
 	flash_protect (FLAG_PROTECT_SET,
 		       CONFIG_SYS_MONITOR_BASE,
 		       CONFIG_SYS_MONITOR_BASE + monitor_flash_len  - 1,

1.6.6.1

This patch moves the altera uart driver from cpu/nios2/serial.c to drivers/serial/altera_uart.c.

The registers access is changed from "volatile struct" to readl()/ writel(). This is consistent with Altera HAL and Linux.

---
 drivers/serial/Makefile      |    1 +
 drivers/serial/altera_uart.c |  116 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 117 insertions(+), 0 deletions(-)
 create mode 100644 drivers/serial/altera_uart.c

index 3c77a7c..7ce920d 100644
@@ -25,6 +25,7 @@ include $(TOPDIR)/config.mk
 
 LIB	:= $(obj)libserial.a
 
+COBJS-$(CONFIG_ALTERA_UART) += altera_uart.o
 COBJS-$(CONFIG_ARM_DCC) += arm_dcc.o
 COBJS-$(CONFIG_AT91RM9200_USART) += at91rm9200_usart.o
 COBJS-$(CONFIG_ATMEL_USART) += atmel_usart.o

1.6.6.1

This patch moves the altera jtaguart driver from cpu/nios2/serial.c to drivers/serial/altera_jtaguart.c.

The registers access is changed from "volatile struct" to readl()/ writel(). This is consistent with Altera HAL and Linux.

---
 drivers/serial/Makefile          |    1 +
 drivers/serial/altera_jtaguart.c |  107 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 108 insertions(+), 0 deletions(-)
 create mode 100644 drivers/serial/altera_jtaguart.c

index 7ce920d..a7278ae 100644
@@ -25,6 +25,7 @@ include $(TOPDIR)/config.mk
 
 LIB	:= $(obj)libserial.a
 
+COBJS-$(CONFIG_ALTERA_JTAGUART) += altera_jtaguart.o
 COBJS-$(CONFIG_ALTERA_UART) += altera_uart.o
 COBJS-$(CONFIG_ARM_DCC) += arm_dcc.o
 COBJS-$(CONFIG_AT91RM9200_USART) += at91rm9200_usart.o

1.6.6.1

This patch moves the opencore yanu serial driver to the drivers/serial directory.

The nios2-yanu.h header is moved to drivers/serial/yanu.h. The args of writel() are changed to writel(val, port).

---
 drivers/serial/Makefile |    1 +
 drivers/serial/yanu.c   |  187 +++++++++++++++++++++++++++++++++++++++++++++++
 drivers/serial/yanu.h   |  120 ++++++++++++++++++++++++++++++
 3 files changed, 308 insertions(+), 0 deletions(-)
 create mode 100644 drivers/serial/yanu.c
 create mode 100644 drivers/serial/yanu.h

index a7278ae..6d0f9c8 100644
@@ -55,6 +55,7 @@ COBJS-$(CONFIG_S3C44B0_SERIAL) += serial_s3c44b0.o
 COBJS-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o
 COBJS-$(CONFIG_SCIF_CONSOLE) += serial_sh.o
 COBJS-$(CONFIG_USB_TTY) += usbtty.o
+COBJS-$(CONFIG_YANU) += yanu.o
 
 COBJS	:= $(sort $(COBJS-y))
 SRCS	:= $(COBJS:.o=.c)

1.6.6.1

This patch adds the driver of altera spi controller, which is also used as epcs/spi flash controller.

With the spi_flash driver, they can replace the epcs driver at cpu/nios2/epcs.c.

---
 drivers/spi/Makefile     |    1 +
 drivers/spi/altera_spi.c |  103 ++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 104 insertions(+), 0 deletions(-)
 create mode 100644 drivers/spi/altera_spi.c

index f112ed0..dfcbb8b 100644
@@ -25,6 +25,7 @@ include $(TOPDIR)/config.mk
 
 LIB	:= $(obj)libspi.a
 
+COBJS-$(CONFIG_ALTERA_SPI) += altera_spi.o
 COBJS-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
 COBJS-$(CONFIG_ATMEL_SPI) += atmel_spi.o
 COBJS-$(CONFIG_BFIN_SPI) += bfin_spi.o

1.6.6.1

This driver supports the opencore 10/100 ethernet mac.

---
 drivers/net/Makefile |    1 +
 drivers/net/ethoc.c  |  536 ++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 537 insertions(+), 0 deletions(-)
 create mode 100644 drivers/net/ethoc.c

index 1ec0ba1..0e68e52 100644
@@ -39,6 +39,7 @@ COBJS-$(CONFIG_E1000) += e1000.o
 COBJS-$(CONFIG_EEPRO100) += eepro100.o
 COBJS-$(CONFIG_ENC28J60) += enc28j60.o
 COBJS-$(CONFIG_EP93XX) += ep93xx_eth.o
+COBJS-$(CONFIG_ETHOC) += ethoc.o
 COBJS-$(CONFIG_FEC_MXC) += fec_mxc.o
 COBJS-$(CONFIG_FSLDMAFEC) += fsl_mcdmafec.o mcfmii.o
 COBJS-$(CONFIG_FTMAC100) += ftmac100.o

1.6.6.1

This driver supports the altera triple speeds 10/100/1000 ethernet mac.

---
 drivers/net/Makefile     |    1 +
 drivers/net/altera_tse.c |  969 ++++++++++++++++++++++++++++++++++++++++++++++
 drivers/net/altera_tse.h |  500 ++++++++++++++++++++++++
 3 files changed, 1470 insertions(+), 0 deletions(-)
 create mode 100644 drivers/net/altera_tse.c
 create mode 100644 drivers/net/altera_tse.h

index 0e68e52..b75c02f 100644
@@ -27,6 +27,7 @@ LIB	:= $(obj)libnet.a
 
 COBJS-$(CONFIG_DRIVER_3C589) += 3c589.o
 COBJS-$(CONFIG_PPC4xx_EMAC) += 4xx_enet.o
+COBJS-$(CONFIG_ALTERA_TSE) += altera_tse.o
 COBJS-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o
 COBJS-$(CONFIG_DRIVER_AX88180) += ax88180.o
 COBJS-$(CONFIG_BCM570x) += bcm570x.o bcm570x_autoneg.o 5701rls.o

1.6.6.1

The port address should be mapped to uncached (bypass) io region before calling these writel()/readl() functions. Similar to the ioremap() of Linux.

The uncached address mapping is (phyaddr | IO_REGION). here IO_REGION is
0x80000000 for NOMMU,
0xe0000000 for MMU.

The cache bypass asm macros, ldwio/stwio, are removed. Mixing physical address and uncached virtual address in the config file is confusing. We shall use uncached virtual address for all devices except the main memory (sdram), which should be cached.

The args to writel() is changed to (val,port), which is consistent with other archs.

---
 include/asm-nios2/io.h |   59 +++++++++++++++++++----------------------------
 1 files changed, 24 insertions(+), 35 deletions(-)

index 01d11ef..11f59ea 100644
@@ -58,41 +58,30 @@ static inline phys_addr_t virt_to_phys(void * vaddr)
 	return (phys_addr_t)(vaddr);
 }
 
-extern unsigned char inb (unsigned char *port);
-extern unsigned short inw (unsigned short *port);
-extern unsigned inl (unsigned port);
-
-#define __raw_writeb(v,a)       (*(volatile unsigned char  *)(a) = (v))
-#define __raw_writew(v,a)       (*(volatile unsigned short *)(a) = (v))
-#define __raw_writel(v,a)       (*(volatile unsigned int   *)(a) = (v))
-
-#define __raw_readb(a)          (*(volatile unsigned char  *)(a))
-#define __raw_readw(a)          (*(volatile unsigned short *)(a))
-#define __raw_readl(a)          (*(volatile unsigned int   *)(a))
-
-#define readb(addr)\
-	({unsigned char val;\
-	 asm volatile( "ldbio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;})
-#define readw(addr)\
-	({unsigned short val;\
-	 asm volatile( "ldhio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;})
-#define readl(addr)\
-	({unsigned long val;\
-	 asm volatile( "ldwio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;})
-
-#define writeb(addr,val)\
-	asm volatile ("stbio %1, 0(%0)" : : "r" (addr), "r" (val))
-#define writew(addr,val)\
-	asm volatile ("sthio %1, 0(%0)" : : "r" (addr), "r" (val))
-#define writel(addr,val)\
-	asm volatile ("stwio %1, 0(%0)" : : "r" (addr), "r" (val))
-
-#define inb(addr)	readb(addr)
-#define inw(addr)	readw(addr)
-#define inl(addr)	readl(addr)
-#define outb(addr,val)	writeb(addr,val)
-#define outw(addr,val)	writew(addr,val)
-#define outl(addr,val)	writel(addr,val)
+#define readb(addr) \
+    ({ unsigned char __v = (*(volatile unsigned char *) (addr)); __v; })
+#define readw(addr) \
+    ({ unsigned short __v = (*(volatile unsigned short *) (addr)); __v; })
+#define readl(addr) \
+    ({ unsigned int __v = (*(volatile unsigned int *) (addr)); __v; })
+
+#define writeb(b, addr) (void)((*(volatile unsigned char *) (addr)) = (b))
+#define writew(b, addr) (void)((*(volatile unsigned short *) (addr)) = (b))
+#define writel(b, addr) (void)((*(volatile unsigned int *) (addr)) = (b))
+
+#define __raw_readb readb
+#define __raw_readw readw
+#define __raw_readl readl
+#define __raw_writeb writeb
+#define __raw_writew writew
+#define __raw_writel writel
+
+#define inb(addr)    readb(addr)
+#define inw(addr)    readw(addr)
+#define inl(addr)    readl(addr)
+#define outb(x, addr) ((void) writeb(x, addr))
+#define outw(x, addr) ((void) writew(x, addr))
+#define outl(x, addr) ((void) writel(x, addr))
 
 static inline void insb (unsigned long port, void *dst, unsigned long count)
 {

1.6.6.1

Just pull in asm-generic.

---
 include/asm-nios2/errno.h |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)
 create mode 100644 include/asm-nios2/errno.h

new file mode 100644
index 0000000..4c82b50
@@ -0,0 +1 @@
+#include <asm-generic/errno.h>

1.6.6.1

Copy from linux header. This is needed for generic bitops.

---
 include/asm-nios2/system.h |   33 +++++++++++++++++++++++++++++++++
 1 files changed, 33 insertions(+), 0 deletions(-)

index ec84f59..bb03ca5 100644
@@ -23,4 +23,37 @@
 #ifndef __ASM_NIOS2_SYSTEM_H_
 #define __ASM_NIOS2_SYSTEM_H_
 
+#define local_irq_enable() __asm__ __volatile__ (  \
+	"rdctl	r8, status\n"			   \
+	"ori	r8, r8, 1\n"			   \
+	"wrctl	status, r8\n"			   \
+	: : : "r8")
+
+#define local_irq_disable() __asm__ __volatile__ ( \
+	"rdctl	r8, status\n"			   \
+	"andi	r8, r8, 0xfffe\n"		   \
+	"wrctl	status, r8\n"			   \
+	: : : "r8")
+
+#define local_save_flags(x) __asm__ __volatile__ (	\
+	"rdctl	r8, status\n"				\
+	"mov	%0, r8\n"				\
+	: "=r" (x) : : "r8", "memory")
+
+#define local_irq_restore(x) __asm__ __volatile__ (	\
+	"mov	r8, %0\n"				\
+	"wrctl	status, r8\n"				\
+	: : "r" (x) : "r8", "memory")
+
+/* For spinlocks etc */
+#define local_irq_save(x) do { local_save_flags(x); local_irq_disable(); } \
+	while (0)
+
+#define	irqs_disabled()					\
+({							\
+	unsigned long flags;				\
+	local_save_flags(flags);			\
+	((flags & NIOS2_STATUS_PIE_MSK) == 0x0);	\
+})
+
 #endif /* __ASM_NIOS2_SYSTEM_H */

1.6.6.1

These are needed to use ubi/ubifs.

---
 include/asm-nios2/bitops.h            |   14 +--
 include/asm-nios2/bitops/atomic.h     |  189 +++++++++++++++++++++++++++++++++
 include/asm-nios2/bitops/ffs.h        |   41 +++++++
 include/asm-nios2/bitops/non-atomic.h |  108 +++++++++++++++++++
 4 files changed, 342 insertions(+), 10 deletions(-)
 create mode 100644 include/asm-nios2/bitops/atomic.h
 create mode 100644 include/asm-nios2/bitops/ffs.h
 create mode 100644 include/asm-nios2/bitops/non-atomic.h

index 5776bda..cf48ff7 100644
@@ -24,15 +24,9 @@
 #ifndef __ASM_NIOS2_BITOPS_H_
 #define __ASM_NIOS2_BITOPS_H_
 
-
-extern void set_bit(int nr, volatile void * a);
-extern void clear_bit(int nr, volatile void * a);
-extern int test_and_clear_bit(int nr, volatile void * a);
-extern void change_bit(unsigned long nr, volatile void *addr);
-extern int test_and_set_bit(int nr, volatile void * a);
-extern int test_and_change_bit(int nr, volatile void * addr);
-extern int test_bit(int nr, volatile void * a);
-extern int ffs(int i);
-#define PLATFORM_FFS
+/* copied from linux-2.6/include/asm-generic/bitops */
+#include <asm/bitops/atomic.h>
+#include <asm/bitops/non-atomic.h>
+#include <asm/bitops/ffs.h>
 
 #endif /* __ASM_NIOS2_BITOPS_H */

1.6.6.1

---
 include/asm-nios2/byteorder.h |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)

index 495c823..dbee62e 100644
@@ -25,6 +25,11 @@
 #define __ASM_NIOS2_BYTEORDER_H_
 
 #include <asm/types.h>
+#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
+#  define __BYTEORDER_HAS_U64__
+#  define __SWAB_64_THRU_32__
+#endif
+
 #include <linux/byteorder/little_endian.h>
 
 #endif /* __ASM_NIOS2_BYTEORDER_H_ */

1.6.6.1

This function return cache-line aligned allocation which is mapped to uncached io region.

---
 include/asm-nios2/dma-mapping.h |   14 ++++++++++++++
 1 files changed, 14 insertions(+), 0 deletions(-)
 create mode 100644 include/asm-nios2/dma-mapping.h

new file mode 100644
index 0000000..69d2cc6
@@ -0,0 +1,14 @@
+#ifndef __ASM_NIOS2_DMA_MAPPING_H
+#define __ASM_NIOS2_DMA_MAPPING_H
+
+static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
+{
+	void *addr = malloc(len + CONFIG_SYS_DCACHELINE_SIZE);
+	flush_dcache((unsigned long)addr, len + CONFIG_SYS_DCACHELINE_SIZE);
+	*handle = ((unsigned long)addr +
+		   (CONFIG_SYS_DCACHELINE_SIZE - 1)) &
+		~(CONFIG_SYS_DCACHELINE_SIZE - 1) & ~(IO_REGION_BASE);
+	return (void *)(*handle | IO_REGION_BASE);
+}
+
+#endif /* __ASM_NIOS2_DMA_MAPPING_H */

1.6.6.1

This gpio core is described in http://nioswiki.com/GPIO.

---
 include/asm-nios2/gpio.h |   72 ++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 72 insertions(+), 0 deletions(-)
 create mode 100644 include/asm-nios2/gpio.h

new file mode 100644
index 0000000..3a98a0d
@@ -0,0 +1,72 @@
+/*
+ * Altera GPIO driver
+ *
+ * The gpio core and usage is described in http://nioswiki.com/GPIO
+ *
+ * Copyright (C) 2010 Thomas Chou <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _ASM_NIOS2_GPIO_H_
+#define _ASM_NIOS2_GPIO_H_ 1
+
+#include <asm/io.h>
+
+#define AVALON_GPIO_PORT(p) (CONFIG_SYS_GPIO_BASE + ((p) << 2))
+
+static inline int gpio_is_valid(int number)
+{
+	return 1;
+}
+
+static inline int gpio_request(unsigned gpio, const char *label)
+{
+	return 0;
+}
+
+static inline void gpio_free(unsigned gpio)
+{
+}
+
+static inline int gpio_direction_input(unsigned gpio)
+{
+	writel(1, AVALON_GPIO_PORT(gpio));
+	return 0;
+}
+
+static inline int gpio_direction_output(unsigned gpio, int value)
+{
+	writel(value ? 3 : 2, AVALON_GPIO_PORT(gpio));
+	return 0;
+}
+
+static inline int gpio_get_value(unsigned gpio)
+{
+	return readl(AVALON_GPIO_PORT(gpio));
+}
+
+static inline void gpio_set_value(unsigned gpio, int value)
+{
+	writel(value ? 3 : 2, AVALON_GPIO_PORT(gpio));
+}
+
+static inline int gpio_cansleep(unsigned gpio)
+{
+	return 0;
+}
+
+static inline int gpio_get_value_cansleep(unsigned gpio)
+{
+	return gpio_get_value(gpio);
+}
+
+static inline void gpio_set_value_cansleep(unsigned gpio, int value)
+{
+	gpio_set_value(gpio, value);
+}
+
+#undef AVALON_GPIO_PORT
+#endif /* _ASM_NIOS2_GPIO_H_ */

1.6.6.1

This patch move the timer handler from interrupt.c to timer.c. It will be cleaner to seperate time management from interrupt management.

The registers access is changed from "volatile struct" to readl()/ writel(). This is consistent with Altera HAL and Linux.

The cpu/nios2/Makefile is updated with the removal of serial.c and epcs.c, as the serial drivers are moved to drivers/serial/ and the epcs flash is supported with altera_spi and spi_flash drivers.

---
 cpu/nios2/Makefile     |    2 +-
 cpu/nios2/interrupts.c |   64 +------------------------------
 cpu/nios2/timer.c      |   98 ++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 101 insertions(+), 63 deletions(-)
 create mode 100644 cpu/nios2/timer.c

index 75f30b4..9ced9dd 100644
@@ -27,7 +27,7 @@ LIB	= $(obj)lib$(CPU).a
 
 START	= start.o
 SOBJS	= exceptions.o
-COBJS	= cpu.o interrupts.o serial.o sysid.o traps.o epcs.o
+COBJS	= cpu.o interrupts.o sysid.o traps.o timer.o
 
 SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))

1.6.6.1

We will remove the TEXT_BASE def in board config.mk. And compute the text base in board config header file.

---
 cpu/nios2/start.S |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)

index 31cd5b0..4b4c560 100644
@@ -26,6 +26,12 @@
 #include <timestamp.h>
 #include <version.h>
 
+#ifdef CONFIG_SYS_TEXT_BASE
+	/* text base used in link script u-boot.lds */
+	.global text_base
+	.equ text_base,CONFIG_SYS_TEXT_BASE
+#endif
+
 /*************************************************************************
  * RESTART
  ************************************************************************/

1.6.6.1

The bootargs passing to nios2 linux is enabled with 'NIOS' magic as the first argument.

---
 lib_nios2/bootm.c |   19 ++++++++++++-------
 1 files changed, 12 insertions(+), 7 deletions(-)

index 675bfac..302f709 100644
@@ -26,21 +26,26 @@
 #include <asm/byteorder.h>
 #include <asm/cache.h>
 
+#define NIOS_MAGIC 0x534f494e /* enable command line and initrd passing */
+
 int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
 {
-	void (*kernel)(void) = (void (*)(void))images->ep;
+	void (*kernel)(int, int, int, char *) = (void (*)(void))images->ep;
+	char *commandline = getenv("bootargs");
+	ulong initrd_start = images->rd_start;
+	ulong initrd_end = images->rd_end;
 
 	if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
 		return 1;
 
 	/* flushes data and instruction caches before calling the kernel */
-	flush_dcache (0,CONFIG_SYS_DCACHE_SIZE);
-	flush_icache (0,CONFIG_SYS_ICACHE_SIZE);
+	disable_interrupts();
+	flush_dcache((unsigned long) kernel, CONFIG_SYS_DCACHE_SIZE);
+	flush_icache((unsigned long) kernel, CONFIG_SYS_ICACHE_SIZE);
 
-	/* For now we assume the Microtronix linux ... which only
-	 * needs to be called ;-)
-	 */
-	kernel ();
+	printf("bootargs=%s @ 0x%x\n", commandline, &commandline);
+	printf("initrd=0x%x-0x%x\n", initrd_start, initrd_end);
+	kernel(NIOS_MAGIC, initrd_start, initrd_end, commandline);
 	/* does not return */
 
 	return 1;

1.6.6.1

This patch adds various initializations for eth, flash protection, no flash, nand flash and mmc.

---
 lib_nios2/board.c |   33 +++++++++++++++++++++++++++++++++
 1 files changed, 33 insertions(+), 0 deletions(-)

index 41d3297..34d811e 100644
@@ -38,6 +38,8 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+unsigned long monitor_flash_len = CONFIG_SYS_MONITOR_LEN;
+
 /*
  * All attempts to come up with a "common" initialization sequence
  * that works for all boards and architectures failed: some of the

@@ -78,6 +80,21 @@ init_fnc_t *init_sequence[] = {
 };
 
 
+static void board_net_init_r(bd_t *bd)
+{
+#ifdef CONFIG_CMD_NET
+	char *s = getenv("bootfile");
+
+	if (s != NULL)
+		copy_filename(BootFile, s, sizeof(BootFile));
+
+	bd->bi_ip_addr = getenv_IPaddr("ipaddr");
+
+	printf("Net:   ");
+	eth_initialize(gd->bd);
+#endif
+}
+
 /***********************************************************************/
 void board_init (void)
 {

@@ -100,7 +117,9 @@ void board_init (void)
 	bd = gd->bd;
 	bd->bi_memstart	= CONFIG_SYS_SDRAM_BASE;
 	bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
+#ifndef CONFIG_SYS_NO_FLASH
 	bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
+#endif
 #if	defined(CONFIG_SYS_SRAM_BASE) && defined(CONFIG_SYS_SRAM_SIZE)
 	bd->bi_sramstart= CONFIG_SYS_SRAM_BASE;
 	bd->bi_sramsize	= CONFIG_SYS_SRAM_SIZE;

@@ -119,8 +138,20 @@ void board_init (void)
 	/* The Malloc area is immediately below the monitor copy in RAM */
 	mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN);
 
+#ifndef CONFIG_SYS_NO_FLASH
 	WATCHDOG_RESET ();
 	bd->bi_flashsize = flash_init();
+#endif
+
+#ifdef CONFIG_CMD_NAND
+	puts("NAND:  ");
+	nand_init();		/* go init the NAND */
+#endif
+
+#ifdef CONFIG_GENERIC_MMC
+	puts("MMC:  ");
+	mmc_initialize(bd);
+#endif
 
 	WATCHDOG_RESET ();
 	env_relocate();

@@ -135,6 +166,8 @@ void board_init (void)
 	WATCHDOG_RESET ();
 	interrupt_init ();
 
+	board_net_init_r(bd);
+
 #if defined(CONFIG_BOARD_LATE_INIT)
 	board_late_init ();
 #endif

1.6.6.1

The args to writel() is changed to (val,port).

The base address is renamed to CONFIG_SYS_LED_PIO_BASE, which is consistent with the name used in altera example designs.

---
 board/altera/common/epled.c |   12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)

index e5e7705..d092011 100644
@@ -33,30 +33,30 @@ static led_id_t val = 0;
 
 void __led_init (led_id_t mask, int state)
 {
-	nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LEDPIO_ADDR;
+	nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LED_PIO_BASE;
 
 	if (state == STATUS_LED_ON)
 		val &= ~mask;
 	else
 		val |= mask;
-	writel (&pio->data, val);
+	writel (val, &pio->data);
 }
 
 void __led_set (led_id_t mask, int state)
 {
-	nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LEDPIO_ADDR;
+	nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LED_PIO_BASE;
 
 	if (state == STATUS_LED_ON)
 		val &= ~mask;
 	else
 		val |= mask;
-	writel (&pio->data, val);
+	writel (val, &pio->data);
 }
 
 void __led_toggle (led_id_t mask)
 {
-	nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LEDPIO_ADDR;
+	nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LED_PIO_BASE;
 
 	val ^= mask;
-	writel (&pio->data, val);
+	writel (val, &pio->data);
 }

1.6.6.1

This patch adds the init and reset of cf card controllers.

---
 board/altera/common/cfide.c |   79 +++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 79 insertions(+), 0 deletions(-)
 create mode 100644 board/altera/common/cfide.c

new file mode 100644
index 0000000..acd1e1d
@@ -0,0 +1,79 @@
+/*
+ * (C) Copyright 2005, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <[email protected]>
+ * (C) Copyright 2010, Thomas Chou <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <netdev.h>
+#include <asm/io.h>
+#include <nios2-io.h>
+
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_SYS_CF_CTL_BASE)
+/* ide_set_reset for Altera CF interface */
+#define ALTERA_CF_CTL_STATUS            	0
+#define ALTERA_CF_IDE_CTL               	4
+#define ALTERA_CF_CTL_STATUS_PRESENT_MSK       (0x1)
+#define ALTERA_CF_CTL_STATUS_POWER_MSK         (0x2)
+#define ALTERA_CF_CTL_STATUS_RESET_MSK         (0x4)
+#define ALTERA_CF_CTL_STATUS_IRQ_EN_MSK        (0x8)
+#define ALTERA_CF_IDE_CTL_IRQ_EN_MSK           (0x1)
+
+void ide_set_reset(int idereset)
+{
+	if (idereset) {
+		writel(0,	/* disable ide irq */
+		       CONFIG_SYS_CF_CTL_BASE + ALTERA_CF_IDE_CTL);
+		writel(ALTERA_CF_CTL_STATUS_RESET_MSK,	/* power down */
+		       CONFIG_SYS_CF_CTL_BASE + ALTERA_CF_CTL_STATUS);
+		udelay(500 * 1000);	/* 0.5 sec delay */
+		writel(ALTERA_CF_CTL_STATUS_POWER_MSK,	/* power up */
+		       CONFIG_SYS_CF_CTL_BASE + ALTERA_CF_CTL_STATUS);
+		udelay(500 * 1000);	/* 0.5 sec delay */
+	}
+}
+#endif
+
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_SYS_CF_PRESENT)
+/* ide_preinit for PK1C20 */
+int ide_preinit(void)
+{
+	nios_pio_t *present = (nios_pio_t *) CONFIG_SYS_CF_PRESENT;
+	nios_pio_t *power = (nios_pio_t *) CONFIG_SYS_CF_POWER;
+	nios_pio_t *atasel = (nios_pio_t *) CONFIG_SYS_CF_ATASEL;
+
+	/* setup data direction registers */
+	present->direction = NIOS_PIO_IN;
+	power->direction = NIOS_PIO_OUT;
+	atasel->direction = NIOS_PIO_OUT;
+
+	/* Check for presence of card */
+	if (present->data)
+		return 1;
+	printf("Ok\n");
+
+	/* Finish setup */
+	power->data = 1;	/* Turn on power FET */
+	atasel->data = 0;	/* Put in ATA mode */
+
+	return 0;
+}
+#endif

1.6.6.1

Ths patch adds status led driver based on gpio interface. The STATUS_LED_BIT specifies the gpio pin number.

---
 board/altera/common/gpioled.c |   31 +++++++++++++++++++++++++++++++
 1 files changed, 31 insertions(+), 0 deletions(-)
 create mode 100644 board/altera/common/gpioled.c

new file mode 100644
index 0000000..13e0032
@@ -0,0 +1,31 @@
+/*
+ * LED driver based on gpio
+ *
+ * Copyright (C) 2010 Thomas Chou <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <common.h>
+#include <status_led.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+
+/* assume led is active low */
+
+void __led_init(led_id_t mask, int state)
+{
+	gpio_direction_output(mask, (state == STATUS_LED_ON) ? 0 : 1);
+}
+
+void __led_set(led_id_t mask, int state)
+{
+	gpio_set_value(mask, (state == STATUS_LED_ON) ? 0 : 1);
+}
+
+void __led_toggle(led_id_t mask)
+{
+	gpio_set_value(mask, !gpio_get_value(mask));
+}

1.6.6.1

The patch converts the ep1c20 board to use the common cfi flash and spi driver.

The addressing of devices is changed to virtual address.

---
 board/altera/ep1c20/Makefile   |    2 +-
 board/altera/ep1c20/config.mk  |    2 +-
 board/altera/ep1c20/u-boot.lds |    1 +
 include/configs/EP1C20.h       |   60 ++++++++++++++++++++++++++-------------
 4 files changed, 43 insertions(+), 22 deletions(-)

index acad2aa..c57ef1a 100644
@@ -28,7 +28,7 @@ endif
 
 LIB	= $(obj)lib$(BOARD).a
 
-COMOBJS := ../common/AMDLV065D.o ../common/epled.o
+COMOBJS := ../common/epled.o
 
 COBJS	:= $(BOARD).o $(COMOBJS)
 

index dab2740..6cb9629 100644
@@ -21,7 +21,7 @@
 # MA 02111-1307 USA
 #
 
-TEXT_BASE = 0x01fc0000
+#TEXT_BASE = 0x01fc0000
 
 PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
 PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include

index e2eb3aa..fa7ed30 100644
@@ -28,6 +28,7 @@ ENTRY(_start)
 
 SECTIONS
 {
+	. = text_base;
 	.text :
 	{
 	  cpu/nios2/start.o (.text)

1.6.6.1

The patch converts the ep1s10 board to use the common cfi flash driver.

The addressing of devices is changed to virtual address.

---
 board/altera/ep1s10/Makefile   |    2 +-
 board/altera/ep1s10/config.mk  |    2 +-
 board/altera/ep1s10/u-boot.lds |    1 +
 include/configs/EP1S10.h       |   58 ++++++++++++++++++++++++----------------
 4 files changed, 38 insertions(+), 25 deletions(-)

index acad2aa..c57ef1a 100644
@@ -28,7 +28,7 @@ endif
 
 LIB	= $(obj)lib$(BOARD).a
 
-COMOBJS := ../common/AMDLV065D.o ../common/epled.o
+COMOBJS := ../common/epled.o
 
 COBJS	:= $(BOARD).o $(COMOBJS)
 

index dab2740..6cb9629 100644
@@ -21,7 +21,7 @@
 # MA 02111-1307 USA
 #
 
-TEXT_BASE = 0x01fc0000
+#TEXT_BASE = 0x01fc0000
 
 PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
 PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include

index e2eb3aa..fa7ed30 100644
@@ -28,6 +28,7 @@ ENTRY(_start)
 
 SECTIONS
 {
+	. = text_base;
 	.text :
 	{
 	  cpu/nios2/start.o (.text)

1.6.6.1

The patch converts the ep1s40 board to use the common cfi flash driver.

The addressing of devices is changed to virtual address.

---
 board/altera/ep1s40/Makefile   |    2 +-
 board/altera/ep1s40/config.mk  |    2 +-
 board/altera/ep1s40/u-boot.lds |    1 +
 include/configs/EP1S40.h       |   54 ++++++++++++++++++++++++---------------
 4 files changed, 36 insertions(+), 23 deletions(-)

index acad2aa..c57ef1a 100644
@@ -28,7 +28,7 @@ endif
 
 LIB	= $(obj)lib$(BOARD).a
 
-COMOBJS := ../common/AMDLV065D.o ../common/epled.o
+COMOBJS := ../common/epled.o
 
 COBJS	:= $(BOARD).o $(COMOBJS)
 

index dab2740..6cb9629 100644
@@ -21,7 +21,7 @@
 # MA 02111-1307 USA
 #
 
-TEXT_BASE = 0x01fc0000
+#TEXT_BASE = 0x01fc0000
 
 PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
 PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include

index e2eb3aa..fa7ed30 100644
@@ -28,6 +28,7 @@ ENTRY(_start)
 
 SECTIONS
 {
+	. = text_base;
 	.text :
 	{
 	  cpu/nios2/start.o (.text)

1.6.6.1

The patch converts the pci5441 board to use the common cfi flash driver.

The addressing of devices is changed to virtual address.

---
 board/psyent/pci5441/Makefile   |    2 +-
 board/psyent/pci5441/config.mk  |    2 +-
 board/psyent/pci5441/u-boot.lds |    1 +
 include/configs/PCI5441.h       |   44 +++++++++++++++++++++++---------------
 4 files changed, 30 insertions(+), 19 deletions(-)

index 301b4a0..18f2f55 100644
@@ -28,7 +28,7 @@ endif
 
 LIB	= $(obj)lib$(BOARD).a
 
-COMOBJS := ../common/AMDLV065D.o
+COMOBJS :=
 
 COBJS	:= $(BOARD).o $(COMOBJS)
 

index d72bcee..9c67ec3 100644
@@ -21,7 +21,7 @@
 # MA 02111-1307 USA
 #
 
-TEXT_BASE = 0x018e0000
+#TEXT_BASE = 0x018e0000
 
 PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
 PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include

index b2d88a5..5c26351 100644
@@ -28,6 +28,7 @@ ENTRY(_start)
 
 SECTIONS
 {
+	. = text_base;
 	.text :
 	{
 	  cpu/nios2/start.o (.text)

1.6.6.1

The patch converts the pk1c20 board to use the common cfi flash and spi driver.

The addressing of devices is changed to virtual address. The args to writel() is changed to (val,port) in led.c.

---
 board/psyent/pk1c20/Makefile   |    2 +-
 board/psyent/pk1c20/config.mk  |    2 +-
 board/psyent/pk1c20/led.c      |   12 +++---
 board/psyent/pk1c20/u-boot.lds |    1 +
 include/configs/PK1C20.h       |   68 ++++++++++++++++++++++++++--------------
 5 files changed, 53 insertions(+), 32 deletions(-)

index e23a17b..84db953 100644
@@ -28,7 +28,7 @@ endif
 
 LIB	= $(obj)lib$(BOARD).a
 
-COMOBJS := ../common/AMDLV065D.o
+COMOBJS :=
 
 COBJS	:= $(BOARD).o led.o $(COMOBJS)
 

index d65780d..ff49287 100644
@@ -21,7 +21,7 @@
 # MA 02111-1307 USA
 #
 
-TEXT_BASE = 0x01fc0000
+#TEXT_BASE = 0x01fc0000
 
 PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
 PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include

index e5e7705..d092011 100644
@@ -33,30 +33,30 @@ static led_id_t val = 0;
 
 void __led_init (led_id_t mask, int state)
 {
-	nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LEDPIO_ADDR;
+	nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LED_PIO_BASE;
 
 	if (state == STATUS_LED_ON)
 		val &= ~mask;
 	else
 		val |= mask;
-	writel (&pio->data, val);
+	writel (val, &pio->data);
 }
 
 void __led_set (led_id_t mask, int state)
 {
-	nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LEDPIO_ADDR;
+	nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LED_PIO_BASE;
 
 	if (state == STATUS_LED_ON)
 		val &= ~mask;
 	else
 		val |= mask;
-	writel (&pio->data, val);
+	writel (val, &pio->data);
 }
 
 void __led_toggle (led_id_t mask)
 {
-	nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LEDPIO_ADDR;
+	nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LED_PIO_BASE;
 
 	val ^= mask;
-	writel (&pio->data, val);
+	writel (val, &pio->data);
 }

index b2d88a5..5c26351 100644
@@ -28,6 +28,7 @@ ENTRY(_start)
 
 SECTIONS
 {
+	. = text_base;
 	.text :
 	{
 	  cpu/nios2/start.o (.text)

1.6.6.1

This is needed for jffs2 support.

---
 include/linux/stat.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

index 2ce1c25..cef6369 100644
@@ -68,7 +68,7 @@ struct stat {
 #endif	/* __PPC__ */
 
 #if defined (__ARM__) || defined (__I386__) || defined (__M68K__) || defined (__bfin__) ||\
-	defined (__microblaze__)
+	defined (__microblaze__) || defined (__nios2__)
 
 struct stat {
 	unsigned short st_dev;

1.6.6.1

Hi Thomas,

<snip>

Hi Ben,

Does it make sense to return 0 always, as we don't have cpu_eth_init()?

OK.

Best regards,
Thomas

No, it should return the number of interfaces initialized. I realize that the caller doesn't currently do anything with this number, and intend to make a return code of -1 be interpreted as an error, but that's currently not the case. If there's an error in board_eth_init(), return 0 and print an error message.

regards,
Ben

Please disregard these patches. I will resubmit after reorganization.

- Thomas

Hi Thomas,
When you resubmit, please use the "--no-chain-reply-to" option for git send-email. It will properly thread your patch series to prevent the later patches from creeping off the right side of everyone's email clients.

Best,
Peter

OK. I added it using git config.

Cheers,
Thomas

Dear Peter Tyser,

No, don't!

Peter, I strongly disagree here. If your mailer cannot handle (long) threads correctly, then this is your local problem.

To me it makes perfect sense that a patch series is threaded - some people forget to number the patches, and quite often patch arrive out of order. It is much easier to have these threded correctly.

Thanks.

Best regards,

Wolfgang Denk

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Time is an illusion perpetrated by the manufacturers of space.

It is not a local problem, it is a common problem. Some people might claim that us not wanting to see HTML on the mailing list is a local problem with our mail clients, too. :-)

And I'm not entirely sure how you're proposing that a mail client *should* deal with such a thread. It's a tradeoff between displaying less of the subject text, or breaking the display of the thread structure earlier. Either one is going to be worse for certain inputs -- and given that in an actual discussion the subject doesn't often change, I'd rather see more of the thread structure.

Even when they don't go off the right edge, chained patchsets are hard on the eyes IMHO. It's semantically a list, not a (fully unbalanced) tree. I'm used to lists going straight down, not diagonally.

So why not insist on people numbering their patches rather than creating a huge reply-to chain?

-Scott

Dear Scott Wood,

I'm not an expert in the design of MUAs, nor in user interfaces in general. I'm using an ancient MUA myself, which has far fromperfect threading capabilities, and usually I don;t even use a threaded display. But when reviewing patch series, I definitely want to see the threads of a series (and the replies to these postings) properly threaded, which includes the correct sequence of the patches. That means that patch N+1 must be marked as successor of patch N.

The thread information may also be essential for any automatic tools that try to process such a thread series.

Agreed.

But then, for the MUA there is probably no way to decide which message is the next message in the list (that should not get indented), and which is a follow-up to one of the the messages so it _should_ get indented. AFAICT mail headers don't carry that type of information.

But "--no-chain-reply-to" means you have NO list of messages at all - just all messages hanging under the first one, without any before-after references. To me, this is les order and thus much worse.

I think we should have _both_. People sometimes forget something - if you have both threading and numbering you still can reconstruct the intended sequence.

Best regards,

Wolfgang Denk

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Anything free is worth what you pay for it.

Hi Wolfgang,

I personally think that looking at a "deep threaded" patch series with lots of responses is much harder to grasp than the "shallow threaded". As a basic example:
http://article.gmane.org/gmane.comp.version-control.git/109790

I would guess that the majority of other users prefer the "shallow threaded" style too.

<snip>

I'm pretty sure in the --no-chain-reply-to case, git makes sure the email dates increment properly, and no 2 are the same. Thus any sane email client should order them properly when using shallow threading.

I believe the default behavior of git has also been changed to --no-chain-reply-to for what its worth. The fact that patch order can be determined by both timestamp and patch title (assuming proper generation) seems sufficient to me to use the --no-chain-reply-to option.

Best,
Peter

Dear Peter,

Thanks for the link - I was not aware of this discussion.

I can only guess that, too. But I know my own preferences :-)

IIRC git-send-email will indeed make sure to have at least second increments.

Well, as the default behavior has been changed, it seems I'm overruled anyway, and there is no need to take additional action.

Best regards,

Wolfgang Denk

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Never worry about theory as long as  the  machinery  does  what  it's
supposed to do.                                      - R. A. Heinlein