Fix ioremap_cached()/ioremap_wc() for SMP platforms
PATCH 1/1 Fix ioremap_cached()/ioremap_wc() for SMP platforms
Write combining/cached device mappings are not setting the shared bit, which could potentially cause problems on SMP systems since the cache lines won't participate in the cache coherency protocol.
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This doesn't make it any more legal to use ioremap*() on main system RAM than it was before this change; it does mean that ioremap_wc() regions are correctly marked as shared which happens to agree with the main system RAM mappings. Strictly to the arch. spec. for ARMv6+, it remains "unpredictable" to use ioremap*() on main system RAM.
arch/arm/mm/mmu.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)
arch/arm/mm/mmu.c +4 -0
@@ -420,6 +420,10 @@ static void __init build_mem_type_table(void) user_pgprot |=L_PTE_SHARED ; kern_pgprot |=L_PTE_SHARED ; vecs_pgprot |=L_PTE_SHARED ; + mem_types[MT_DEVICE_WC ].prot_sect |=PMD_SECT_S ; + mem_types[MT_DEVICE_WC ].prot_pte |=L_PTE_SHARED ; + mem_types[MT_DEVICE_CACHED ].prot_sect |=PMD_SECT_S ; + mem_types[MT_DEVICE_CACHED ].prot_pte |=L_PTE_SHARED ; mem_types[MT_MEMORY ].prot_sect |=PMD_SECT_S ; mem_types[MT_MEMORY_NONCACHED ].prot_sect |=PMD_SECT_S ;#endif
PATCH 1/1 Fix ioremap_cached()/ioremap_wc() for SMP platforms
Santosh,
Any chance of checking this please? This should result in the query about the OMAP framebuffer mappings sharedness being resolved.
Thanks.
Quoted 35 lines · Russell King - ARM Linux
Write combining/cached device mappings are not setting the shared bit, which could potentially cause problems on SMP systems since the cache lines won't participate in the cache coherency protocol.
Signed-off-by Russell King <[email protected]>--
This doesn't make it any more legal to use ioremap*() on main system RAM than it was before this change; it does mean thatioremap_wc()regions are correctly marked as shared which happens to agree with the main system RAM mappings. Strictly to the arch. spec. for ARMv6+, it remains "unpredictable" to use ioremap*() on main system RAM.arch/arm/mm/mmu.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)arch/arm/mm/mmu.c +4
-0@@ -420,6 +420,10 @@ static void __init build_mem_type_table(void) user_pgprot |=L_PTE_SHARED ; kern_pgprot |=L_PTE_SHARED ; vecs_pgprot |=L_PTE_SHARED ; + mem_types[MT_DEVICE_WC ].prot_sect |=PMD_SECT_S ; + mem_types[MT_DEVICE_WC ].prot_pte |=L_PTE_SHARED ; + mem_types[MT_DEVICE_CACHED ].prot_sect |=PMD_SECT_S ; + mem_types[MT_DEVICE_CACHED ].prot_pte |=L_PTE_SHARED ; mem_types[MT_MEMORY ].prot_sect |=PMD_SECT_S ; mem_types[MT_MEMORY_NONCACHED ].prot_sect |=PMD_SECT_S ;#endif _______________________________________________
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PATCH 1/1 Fix ioremap_cached()/ioremap_wc() for SMP platforms
Quoted 7 lines
-----Original Message-----
From: Russell King - ARM Linux [mailto:linux at arm.linux.org.uk]
Sent: Friday, April 09, 2010 7:17 PM
To: Shilimkar, Santosh
Cc: linux-arm-kernel at lists.infradead.org
Subject: Re: [PATCH] Fix ioremap_cached()/ioremap_wc() for SMP platforms
Quoted 5 lines
Santosh,
Any chance of checking this please? This should result in the query about the OMAP framebuffer mappings sharedness being resolved.
Oh Yes. I tested this and it does fix the "shared" bit issue of frame buffer
Quoted 37 lines · Russell King - ARM Linux
Quoted 35 lines
Write combining/cached device mappings are not setting the shared bit, which could potentially cause problems on SMP systems since the cache lines won't participate in the cache coherency protocol.
Signed-off-by Russell King <[email protected]>--
This doesn't make it any more legal to use ioremap*() on main system RAM than it was before this change; it does mean thatioremap_wc()regions are correctly marked as shared which happens to agree with the main system RAM mappings. Strictly to the arch. spec. for ARMv6+, it remains "unpredictable" to use ioremap*() on main system RAM.arch/arm/mm/mmu.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)arch/arm/mm/mmu.c +4
-0@@ -420,6 +420,10 @@ static void __init build_mem_type_table(void) user_pgprot |=L_PTE_SHARED ; kern_pgprot |=L_PTE_SHARED ; vecs_pgprot |=L_PTE_SHARED ; + mem_types[MT_DEVICE_WC ].prot_sect |=PMD_SECT_S ; + mem_types[MT_DEVICE_WC ].prot_pte |=L_PTE_SHARED ; + mem_types[MT_DEVICE_CACHED ].prot_sect |=PMD_SECT_S ; + mem_types[MT_DEVICE_CACHED ].prot_pte |=L_PTE_SHARED ; mem_types[MT_MEMORY ].prot_sect |=PMD_SECT_S ; mem_types[MT_MEMORY_NONCACHED ].prot_sect |=PMD_SECT_S ;#endif _______________________________________________
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